Lines Matching refs:vmcs_write
797 vmcs_write(VMCS_HOST_IA32_PAT, vmm_get_host_pat()); in vmx_vminit()
798 vmcs_write(VMCS_HOST_IA32_EFER, vmm_get_host_efer()); in vmx_vminit()
801 vmcs_write(VMCS_HOST_CR0, vmm_get_host_cr0()); in vmx_vminit()
802 vmcs_write(VMCS_HOST_CR4, vmm_get_host_cr4() | CR4_VMXE); in vmx_vminit()
805 vmcs_write(VMCS_HOST_CS_SELECTOR, vmm_get_host_codesel()); in vmx_vminit()
807 vmcs_write(VMCS_HOST_ES_SELECTOR, datasel); in vmx_vminit()
808 vmcs_write(VMCS_HOST_SS_SELECTOR, datasel); in vmx_vminit()
809 vmcs_write(VMCS_HOST_DS_SELECTOR, datasel); in vmx_vminit()
811 vmcs_write(VMCS_HOST_FS_SELECTOR, vmm_get_host_fssel()); in vmx_vminit()
812 vmcs_write(VMCS_HOST_GS_SELECTOR, vmm_get_host_gssel()); in vmx_vminit()
813 vmcs_write(VMCS_HOST_TR_SELECTOR, vmm_get_host_tsssel()); in vmx_vminit()
820 vmcs_write(VMCS_HOST_IA32_SYSENTER_CS, KCS_SEL); in vmx_vminit()
821 vmcs_write(VMCS_HOST_IA32_SYSENTER_EIP, in vmx_vminit()
825 vmcs_write(VMCS_HOST_RIP, (uint64_t)vmx_exit_guest); in vmx_vminit()
828 vmcs_write(VMCS_LINK_POINTER, ~0); in vmx_vminit()
830 vmcs_write(VMCS_EPTP, vmx->eptp); in vmx_vminit()
831 vmcs_write(VMCS_PIN_BASED_CTLS, pin_ctls); in vmx_vminit()
832 vmcs_write(VMCS_PRI_PROC_BASED_CTLS, proc_ctls); in vmx_vminit()
837 vmcs_write(VMCS_SEC_PROC_BASED_CTLS, use_proc2_ctls); in vmx_vminit()
839 vmcs_write(VMCS_EXIT_CTLS, exit_ctls); in vmx_vminit()
840 vmcs_write(VMCS_ENTRY_CTLS, entry_ctls); in vmx_vminit()
841 vmcs_write(VMCS_MSR_BITMAP, msr_bitmap_pa); in vmx_vminit()
842 vmcs_write(VMCS_VPID, vpid[i]); in vmx_vminit()
845 vmcs_write(VMCS_ENTRY_MSR_LOAD, in vmx_vminit()
847 vmcs_write(VMCS_ENTRY_MSR_LOAD_COUNT, in vmx_vminit()
849 vmcs_write(VMCS_EXIT_MSR_STORE, 0); in vmx_vminit()
850 vmcs_write(VMCS_EXIT_MSR_STORE_COUNT, 0); in vmx_vminit()
858 vmcs_write(VMCS_EXCEPTION_BITMAP, exc_bitmap); in vmx_vminit()
861 vmcs_write(VMCS_GUEST_DR7, DBREG_DR7_RESERVED1); in vmx_vminit()
864 vmcs_write(VMCS_VIRTUAL_APIC, apic_page_pa); in vmx_vminit()
868 vmcs_write(VMCS_APIC_ACCESS, apic_access_pa); in vmx_vminit()
869 vmcs_write(VMCS_EOI_EXIT0, 0); in vmx_vminit()
870 vmcs_write(VMCS_EOI_EXIT1, 0); in vmx_vminit()
871 vmcs_write(VMCS_EOI_EXIT2, 0); in vmx_vminit()
872 vmcs_write(VMCS_EOI_EXIT3, 0); in vmx_vminit()
875 vmcs_write(VMCS_PIR_VECTOR, pirvec); in vmx_vminit()
876 vmcs_write(VMCS_PIR_DESC, pir_desc_pa); in vmx_vminit()
885 vmcs_write(VMCS_CR0_MASK, cr0_ones_mask | cr0_zeros_mask); in vmx_vminit()
886 vmcs_write(VMCS_CR0_SHADOW, 0x60000010); in vmx_vminit()
887 vmcs_write(VMCS_CR4_MASK, cr4_ones_mask | cr4_zeros_mask); in vmx_vminit()
888 vmcs_write(VMCS_CR4_SHADOW, 0); in vmx_vminit()
1030 vmcs_write(VMCS_HOST_IA32_SYSENTER_ESP, rdmsr(MSR_SYSENTER_ESP_MSR)); in vmx_set_pcpu_defaults()
1047 vmcs_write(VMCS_HOST_IDTR_BASE, vmm_get_host_idtrbase()); in vmx_set_pcpu_defaults()
1048 vmcs_write(VMCS_HOST_TR_BASE, vmm_get_host_trbase()); in vmx_set_pcpu_defaults()
1049 vmcs_write(VMCS_HOST_GDTR_BASE, vmm_get_host_gdtrbase()); in vmx_set_pcpu_defaults()
1050 vmcs_write(VMCS_HOST_GS_BASE, vmm_get_host_gsbase()); in vmx_set_pcpu_defaults()
1066 vmcs_write(VMCS_PRI_PROC_BASED_CTLS, vmx->cap[vcpu].proc_ctls); in vmx_set_int_window_exiting()
1075 vmcs_write(VMCS_PRI_PROC_BASED_CTLS, vmx->cap[vcpu].proc_ctls); in vmx_clear_int_window_exiting()
1089 vmcs_write(VMCS_PRI_PROC_BASED_CTLS, vmx->cap[vcpu].proc_ctls); in vmx_set_nmi_window_exiting()
1097 vmcs_write(VMCS_PRI_PROC_BASED_CTLS, vmx->cap[vcpu].proc_ctls); in vmx_clear_nmi_window_exiting()
1115 vmcs_write(VMCS_TSC_OFFSET, offset); in vmx_apply_tsc_adjust()
1179 vmcs_write(VMCS_ENTRY_INTR_INFO, 0); in vmx_stash_intinfo()
1180 vmcs_write(VMCS_ENTRY_EXCEPTION_ERROR, 0); in vmx_stash_intinfo()
1210 vmcs_write(VMCS_ENTRY_EXCEPTION_ERROR, in vmx_inject_intinfo()
1213 vmcs_write(VMCS_ENTRY_INTR_INFO, inject); in vmx_inject_intinfo()
1231 vmcs_write(VMCS_ENTRY_INTR_INFO, in vmx_inject_nmi()
1262 vmcs_write(VMCS_GUEST_INTERRUPTIBILITY, gi); in vmx_inject_events()
1325 vmcs_write(VMCS_ENTRY_INTR_INFO, in vmx_inject_events()
1371 vmcs_write(VMCS_GUEST_INTR_STATUS, status_new); in vmx_inject_vlapic()
1397 vmcs_write(VMCS_ENTRY_INTR_INFO, in vmx_inject_vlapic()
1462 vmcs_write(VMCS_GUEST_INTERRUPTIBILITY, gi); in vmx_restore_nmi_blocking()
1472 vmcs_write(VMCS_GUEST_INTERRUPTIBILITY, gi); in vmx_clear_nmi_blocking()
1628 vmcs_write(VMCS_GUEST_RSP, regval); in vmx_set_guest_reg()
1684 vmcs_write(VMCS_ENTRY_CTLS, ctrl); in vmx_sync_efer_state()
1698 vmcs_write(VMCS_CR0_SHADOW, regval); in vmx_emulate_cr0_access()
1710 vmcs_write(VMCS_GUEST_CR0, crval); in vmx_emulate_cr0_access()
1719 vmcs_write(VMCS_GUEST_IA32_EFER, efer); in vmx_emulate_cr0_access()
1738 vmcs_write(VMCS_CR4_SHADOW, regval); in vmx_emulate_cr4_access()
1742 vmcs_write(VMCS_GUEST_CR4, crval); in vmx_emulate_cr4_access()
2269 vmcs_write(VMCS_ENTRY_INST_LENGTH, vmexit->inst_length); in vmx_exit_process()
2480 vmcs_write(VMCS_ENTRY_INST_LENGTH, vmexit->inst_length); in vmx_exit_process()
2609 vmcs_write(VMCS_GUEST_RIP, vmexit->rip); in vmx_exit_process()
2792 vmcs_write(VMCS_HOST_CR3, rcr3()); in vmx_run()
2794 vmcs_write(VMCS_GUEST_RIP, rip); in vmx_run()
3168 vmcs_write(VMCS_GUEST_INTERRUPTIBILITY, gi); in vmx_setreg()
3178 vmcs_write(encoding, val); in vmx_setreg()
3191 vmcs_write(VMCS_CR0_SHADOW, val); in vmx_setreg()
3192 vmcs_write(encoding, vmx_fix_cr0(val)); in vmx_setreg()
3196 vmcs_write(VMCS_CR4_SHADOW, val); in vmx_setreg()
3197 vmcs_write(encoding, vmx_fix_cr4(val)); in vmx_setreg()
3200 vmcs_write(encoding, val); in vmx_setreg()
3215 vmcs_write(encoding, val); in vmx_setreg()
3258 vmcs_write(base, desc->base); in vmx_setdesc()
3259 vmcs_write(limit, desc->limit); in vmx_setdesc()
3261 vmcs_write(access, desc->access); in vmx_setdesc()
3338 vmcs_write(vmcs_enc, val); in vmx_msr_set()
3464 vmcs_write(reg, baseval); in vmx_setcap()
3613 vmcs_write(VMCS_EOI_EXIT0, ((uint64_t)tmrs[1] << 32) | tmrs[0]); in vmx_apicv_sync_tmr()
3614 vmcs_write(VMCS_EOI_EXIT1, ((uint64_t)tmrs[3] << 32) | tmrs[2]); in vmx_apicv_sync_tmr()
3615 vmcs_write(VMCS_EOI_EXIT2, ((uint64_t)tmrs[5] << 32) | tmrs[4]); in vmx_apicv_sync_tmr()
3616 vmcs_write(VMCS_EOI_EXIT3, ((uint64_t)tmrs[7] << 32) | tmrs[6]); in vmx_apicv_sync_tmr()
3637 vmcs_write(VMCS_PRI_PROC_BASED_CTLS, proc_ctls); in vmx_enable_x2apic_mode_ts()
3660 vmcs_write(VMCS_SEC_PROC_BASED_CTLS, proc_ctls2); in vmx_enable_x2apic_mode_vid()
3748 vmcs_write(VMCS_TPR_THRESHOLD, vlapic_get_cr8(vlapic)); in vmx_tpr_shadow_enter()