Lines Matching refs:halg

3674 		      .halg.digestsize = MD5_DIGEST_SIZE,
3675 .halg.base = {
3695 .halg.digestsize = MD5_DIGEST_SIZE,
3696 .halg.base = {
3713 .halg.digestsize = SHA1_DIGEST_SIZE,
3714 .halg.base = {
3731 .halg.digestsize = SHA1_DIGEST_SIZE,
3732 .halg.base = {
3749 .halg.digestsize = SHA224_DIGEST_SIZE,
3750 .halg.base = {
3767 .halg.digestsize = SHA224_DIGEST_SIZE,
3768 .halg.base = {
3785 .halg.digestsize = SHA256_DIGEST_SIZE,
3786 .halg.base = {
3803 .halg.digestsize = SHA256_DIGEST_SIZE,
3804 .halg.base = {
3822 .halg.digestsize = SHA384_DIGEST_SIZE,
3823 .halg.base = {
3841 .halg.digestsize = SHA384_DIGEST_SIZE,
3842 .halg.base = {
3860 .halg.digestsize = SHA512_DIGEST_SIZE,
3861 .halg.base = {
3879 .halg.digestsize = SHA512_DIGEST_SIZE,
3880 .halg.base = {
3898 .halg.digestsize = SHA3_224_DIGEST_SIZE,
3899 .halg.base = {
3917 .halg.digestsize = SHA3_224_DIGEST_SIZE,
3918 .halg.base = {
3936 .halg.digestsize = SHA3_256_DIGEST_SIZE,
3937 .halg.base = {
3955 .halg.digestsize = SHA3_256_DIGEST_SIZE,
3956 .halg.base = {
3974 .halg.digestsize = SHA3_384_DIGEST_SIZE,
3975 .halg.base = {
3993 .halg.digestsize = SHA3_384_DIGEST_SIZE,
3994 .halg.base = {
4012 .halg.digestsize = SHA3_512_DIGEST_SIZE,
4013 .halg.base = {
4031 .halg.digestsize = SHA3_512_DIGEST_SIZE,
4032 .halg.base = {
4050 .halg.digestsize = AES_BLOCK_SIZE,
4051 .halg.base = {
4069 .halg.digestsize = AES_BLOCK_SIZE,
4070 .halg.base = {
4413 hash->halg.base.cra_module = THIS_MODULE; in spu_register_ahash()
4414 hash->halg.base.cra_priority = hash_pri; in spu_register_ahash()
4415 hash->halg.base.cra_alignmask = 0; in spu_register_ahash()
4416 hash->halg.base.cra_ctxsize = sizeof(struct iproc_ctx_s); in spu_register_ahash()
4417 hash->halg.base.cra_init = ahash_cra_init; in spu_register_ahash()
4418 hash->halg.base.cra_exit = generic_cra_exit; in spu_register_ahash()
4419 hash->halg.base.cra_flags = CRYPTO_ALG_ASYNC | in spu_register_ahash()
4421 hash->halg.statesize = sizeof(struct spu_hash_export_s); in spu_register_ahash()
4450 hash->halg.base.cra_driver_name); in spu_register_ahash()
4683 cdn = driver_algs[i].alg.hash.halg.base.cra_driver_name; in bcm_spu_remove()