Lines Matching refs:REG_DMACR
71 REG_DMACR, enumerator
99 [REG_DMACR] = UART011_DMACR,
187 [REG_DMACR] = UART011_DMACR,
550 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_callback()
651 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_refill()
686 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_irq()
712 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_stop()
744 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
755 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
772 pl011_write(dmacr, uap, REG_DMACR); in pl011_dma_tx_start()
798 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_flush_buffer()
838 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_trigger_dma()
945 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_irq()
1029 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_rx_stop()
1133 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_startup()
1169 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_shutdown()