Lines Matching refs:par
57 void NVLockUnlock(struct nvidia_par *par, int Lock) in NVLockUnlock() argument
61 VGA_WR08(par->PCIO, 0x3D4, 0x1F); in NVLockUnlock()
62 VGA_WR08(par->PCIO, 0x3D5, Lock ? 0x99 : 0x57); in NVLockUnlock()
64 VGA_WR08(par->PCIO, 0x3D4, 0x11); in NVLockUnlock()
65 cr11 = VGA_RD08(par->PCIO, 0x3D5); in NVLockUnlock()
70 VGA_WR08(par->PCIO, 0x3D5, cr11); in NVLockUnlock()
73 int NVShowHideCursor(struct nvidia_par *par, int ShowHide) in NVShowHideCursor() argument
75 int cur = par->CurrentState->cursor1; in NVShowHideCursor()
77 par->CurrentState->cursor1 = (par->CurrentState->cursor1 & 0xFE) | in NVShowHideCursor()
79 VGA_WR08(par->PCIO, 0x3D4, 0x31); in NVShowHideCursor()
80 VGA_WR08(par->PCIO, 0x3D5, par->CurrentState->cursor1); in NVShowHideCursor()
82 if (par->Architecture == NV_ARCH_40) in NVShowHideCursor()
83 NV_WR32(par->PRAMDAC, 0x0300, NV_RD32(par->PRAMDAC, 0x0300)); in NVShowHideCursor()
141 static void nvGetClocks(struct nvidia_par *par, unsigned int *MClk, in nvGetClocks() argument
146 if (par->Architecture >= NV_ARCH_40) { in nvGetClocks()
147 pll = NV_RD32(par->PMC, 0x4020); in nvGetClocks()
149 pll = NV_RD32(par->PMC, 0x4024); in nvGetClocks()
152 if (((par->Chipset & 0xfff0) == 0x0290) || in nvGetClocks()
153 ((par->Chipset & 0xfff0) == 0x0390)) { in nvGetClocks()
160 *MClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P; in nvGetClocks()
162 pll = NV_RD32(par->PMC, 0x4000); in nvGetClocks()
164 pll = NV_RD32(par->PMC, 0x4004); in nvGetClocks()
170 *NVClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P; in nvGetClocks()
171 } else if (par->twoStagePLL) { in nvGetClocks()
172 pll = NV_RD32(par->PRAMDAC0, 0x0504); in nvGetClocks()
176 pll = NV_RD32(par->PRAMDAC0, 0x0574); in nvGetClocks()
184 *MClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P; in nvGetClocks()
186 pll = NV_RD32(par->PRAMDAC0, 0x0500); in nvGetClocks()
190 pll = NV_RD32(par->PRAMDAC0, 0x0570); in nvGetClocks()
198 *NVClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P; in nvGetClocks()
200 if (((par->Chipset & 0x0ff0) == 0x0300) || in nvGetClocks()
201 ((par->Chipset & 0x0ff0) == 0x0330)) { in nvGetClocks()
202 pll = NV_RD32(par->PRAMDAC0, 0x0504); in nvGetClocks()
213 *MClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P; in nvGetClocks()
215 pll = NV_RD32(par->PRAMDAC0, 0x0500); in nvGetClocks()
226 *NVClk = ((N * NB * par->CrystalFreqKHz) / (M * MB)) >> P; in nvGetClocks()
228 pll = NV_RD32(par->PRAMDAC0, 0x0504); in nvGetClocks()
232 *MClk = (N * par->CrystalFreqKHz / M) >> P; in nvGetClocks()
234 pll = NV_RD32(par->PRAMDAC0, 0x0500); in nvGetClocks()
238 *NVClk = (N * par->CrystalFreqKHz / M) >> P; in nvGetClocks()
383 unsigned *lwm, struct nvidia_par *par) in nv4UpdateArbitrationSettings() argument
389 nvGetClocks(par, &MClk, &NVClk); in nv4UpdateArbitrationSettings()
391 cfg1 = NV_RD32(par->PFB, 0x00000204); in nv4UpdateArbitrationSettings()
395 sim_data.memory_width = (NV_RD32(par->PEXTDEV, 0x0000) & 0x10) ? in nv4UpdateArbitrationSettings()
622 struct nvidia_par *par) in nv10UpdateArbitrationSettings() argument
628 nvGetClocks(par, &MClk, &NVClk); in nv10UpdateArbitrationSettings()
630 cfg1 = NV_RD32(par->PFB, 0x0204); in nv10UpdateArbitrationSettings()
634 sim_data.memory_type = (NV_RD32(par->PFB, 0x0200) & 0x01) ? 1 : 0; in nv10UpdateArbitrationSettings()
635 sim_data.memory_width = (NV_RD32(par->PEXTDEV, 0x0000) & 0x10) ? in nv10UpdateArbitrationSettings()
656 struct nvidia_par *par, in nv30UpdateArbitrationSettings() argument
668 nvGetClocks(par, &MClk, &NVClk); in nv30UpdateArbitrationSettings()
680 struct nvidia_par *par) in nForceUpdateArbitrationSettings() argument
686 int domain = pci_domain_nr(par->pci_dev->bus); in nForceUpdateArbitrationSettings()
688 if ((par->Chipset & 0x0FF0) == 0x01A0) { in nForceUpdateArbitrationSettings()
703 pll = NV_RD32(par->PRAMDAC0, 0x0500); in nForceUpdateArbitrationSettings()
707 NVClk = (N * par->CrystalFreqKHz / M) >> P; in nForceUpdateArbitrationSettings()
767 int *clockOut, u32 * pllOut, struct nvidia_par *par) in CalcVClock() argument
778 if (par->CrystalFreqKHz == 13500) { in CalcVClock()
790 N = ((VClk << P) * M) / par->CrystalFreqKHz; in CalcVClock()
793 ((par->CrystalFreqKHz * N) / in CalcVClock()
814 u32 * pllBOut, struct nvidia_par *par) in CalcVClock2Stage() argument
831 (par->CrystalFreqKHz << 2); in CalcVClock2Stage()
834 (((par->CrystalFreqKHz << 2) * N) / in CalcVClock2Stage()
856 void NVCalcStateExt(struct nvidia_par *par, in NVCalcStateExt() argument
873 if (par->twoStagePLL) in NVCalcStateExt()
875 par); in NVCalcStateExt()
877 CalcVClock(dotClock, &VClk, &state->pll, par); in NVCalcStateExt()
879 switch (par->Architecture) { in NVCalcStateExt()
884 &(state->arbitration1), par); in NVCalcStateExt()
896 if (!par->FlatPanel) in NVCalcStateExt()
897 state->control = NV_RD32(par->PRAMDAC0, 0x0580) & in NVCalcStateExt()
904 if ((par->Chipset & 0xfff0) == 0x0240 || in NVCalcStateExt()
905 (par->Chipset & 0xfff0) == 0x03d0) { in NVCalcStateExt()
908 } else if (((par->Chipset & 0xffff) == 0x01A0) || in NVCalcStateExt()
909 ((par->Chipset & 0xffff) == 0x01f0)) { in NVCalcStateExt()
914 par); in NVCalcStateExt()
915 } else if (par->Architecture < NV_ARCH_30) { in NVCalcStateExt()
920 par); in NVCalcStateExt()
922 nv30UpdateArbitrationSettings(par, in NVCalcStateExt()
927 state->cursor0 = 0x80 | (par->CursorStart >> 17); in NVCalcStateExt()
928 state->cursor1 = (par->CursorStart >> 11) << 2; in NVCalcStateExt()
929 state->cursor2 = par->CursorStart >> 24; in NVCalcStateExt()
933 state->config = NV_RD32(par->PFB, 0x00000200); in NVCalcStateExt()
946 void NVLoadStateExt(struct nvidia_par *par, RIVA_HW_STATE * state) in NVLoadStateExt() argument
950 NV_WR32(par->PMC, 0x0140, 0x00000000); in NVLoadStateExt()
951 NV_WR32(par->PMC, 0x0200, 0xFFFF00FF); in NVLoadStateExt()
952 NV_WR32(par->PMC, 0x0200, 0xFFFFFFFF); in NVLoadStateExt()
954 NV_WR32(par->PTIMER, 0x0200 * 4, 0x00000008); in NVLoadStateExt()
955 NV_WR32(par->PTIMER, 0x0210 * 4, 0x00000003); in NVLoadStateExt()
956 NV_WR32(par->PTIMER, 0x0140 * 4, 0x00000000); in NVLoadStateExt()
957 NV_WR32(par->PTIMER, 0x0100 * 4, 0xFFFFFFFF); in NVLoadStateExt()
959 if (par->Architecture == NV_ARCH_04) { in NVLoadStateExt()
961 NV_WR32(par->PFB, 0x0200, state->config); in NVLoadStateExt()
962 } else if ((par->Architecture < NV_ARCH_40) || in NVLoadStateExt()
963 (par->Chipset & 0xfff0) == 0x0040) { in NVLoadStateExt()
965 NV_WR32(par->PFB, 0x0240 + (i * 0x10), 0); in NVLoadStateExt()
966 NV_WR32(par->PFB, 0x0244 + (i * 0x10), in NVLoadStateExt()
967 par->FbMapSize - 1); in NVLoadStateExt()
972 if (((par->Chipset & 0xfff0) == 0x0090) || in NVLoadStateExt()
973 ((par->Chipset & 0xfff0) == 0x01D0) || in NVLoadStateExt()
974 ((par->Chipset & 0xfff0) == 0x0290) || in NVLoadStateExt()
975 ((par->Chipset & 0xfff0) == 0x0390) || in NVLoadStateExt()
976 ((par->Chipset & 0xfff0) == 0x03D0)) in NVLoadStateExt()
979 NV_WR32(par->PFB, 0x0600 + (i * 0x10), 0); in NVLoadStateExt()
980 NV_WR32(par->PFB, 0x0604 + (i * 0x10), in NVLoadStateExt()
981 par->FbMapSize - 1); in NVLoadStateExt()
985 if (par->Architecture >= NV_ARCH_40) { in NVLoadStateExt()
986 NV_WR32(par->PRAMIN, 0x0000 * 4, 0x80000010); in NVLoadStateExt()
987 NV_WR32(par->PRAMIN, 0x0001 * 4, 0x00101202); in NVLoadStateExt()
988 NV_WR32(par->PRAMIN, 0x0002 * 4, 0x80000011); in NVLoadStateExt()
989 NV_WR32(par->PRAMIN, 0x0003 * 4, 0x00101204); in NVLoadStateExt()
990 NV_WR32(par->PRAMIN, 0x0004 * 4, 0x80000012); in NVLoadStateExt()
991 NV_WR32(par->PRAMIN, 0x0005 * 4, 0x00101206); in NVLoadStateExt()
992 NV_WR32(par->PRAMIN, 0x0006 * 4, 0x80000013); in NVLoadStateExt()
993 NV_WR32(par->PRAMIN, 0x0007 * 4, 0x00101208); in NVLoadStateExt()
994 NV_WR32(par->PRAMIN, 0x0008 * 4, 0x80000014); in NVLoadStateExt()
995 NV_WR32(par->PRAMIN, 0x0009 * 4, 0x0010120A); in NVLoadStateExt()
996 NV_WR32(par->PRAMIN, 0x000A * 4, 0x80000015); in NVLoadStateExt()
997 NV_WR32(par->PRAMIN, 0x000B * 4, 0x0010120C); in NVLoadStateExt()
998 NV_WR32(par->PRAMIN, 0x000C * 4, 0x80000016); in NVLoadStateExt()
999 NV_WR32(par->PRAMIN, 0x000D * 4, 0x0010120E); in NVLoadStateExt()
1000 NV_WR32(par->PRAMIN, 0x000E * 4, 0x80000017); in NVLoadStateExt()
1001 NV_WR32(par->PRAMIN, 0x000F * 4, 0x00101210); in NVLoadStateExt()
1002 NV_WR32(par->PRAMIN, 0x0800 * 4, 0x00003000); in NVLoadStateExt()
1003 NV_WR32(par->PRAMIN, 0x0801 * 4, par->FbMapSize - 1); in NVLoadStateExt()
1004 NV_WR32(par->PRAMIN, 0x0802 * 4, 0x00000002); in NVLoadStateExt()
1005 NV_WR32(par->PRAMIN, 0x0808 * 4, 0x02080062); in NVLoadStateExt()
1006 NV_WR32(par->PRAMIN, 0x0809 * 4, 0x00000000); in NVLoadStateExt()
1007 NV_WR32(par->PRAMIN, 0x080A * 4, 0x00001200); in NVLoadStateExt()
1008 NV_WR32(par->PRAMIN, 0x080B * 4, 0x00001200); in NVLoadStateExt()
1009 NV_WR32(par->PRAMIN, 0x080C * 4, 0x00000000); in NVLoadStateExt()
1010 NV_WR32(par->PRAMIN, 0x080D * 4, 0x00000000); in NVLoadStateExt()
1011 NV_WR32(par->PRAMIN, 0x0810 * 4, 0x02080043); in NVLoadStateExt()
1012 NV_WR32(par->PRAMIN, 0x0811 * 4, 0x00000000); in NVLoadStateExt()
1013 NV_WR32(par->PRAMIN, 0x0812 * 4, 0x00000000); in NVLoadStateExt()
1014 NV_WR32(par->PRAMIN, 0x0813 * 4, 0x00000000); in NVLoadStateExt()
1015 NV_WR32(par->PRAMIN, 0x0814 * 4, 0x00000000); in NVLoadStateExt()
1016 NV_WR32(par->PRAMIN, 0x0815 * 4, 0x00000000); in NVLoadStateExt()
1017 NV_WR32(par->PRAMIN, 0x0818 * 4, 0x02080044); in NVLoadStateExt()
1018 NV_WR32(par->PRAMIN, 0x0819 * 4, 0x02000000); in NVLoadStateExt()
1019 NV_WR32(par->PRAMIN, 0x081A * 4, 0x00000000); in NVLoadStateExt()
1020 NV_WR32(par->PRAMIN, 0x081B * 4, 0x00000000); in NVLoadStateExt()
1021 NV_WR32(par->PRAMIN, 0x081C * 4, 0x00000000); in NVLoadStateExt()
1022 NV_WR32(par->PRAMIN, 0x081D * 4, 0x00000000); in NVLoadStateExt()
1023 NV_WR32(par->PRAMIN, 0x0820 * 4, 0x02080019); in NVLoadStateExt()
1024 NV_WR32(par->PRAMIN, 0x0821 * 4, 0x00000000); in NVLoadStateExt()
1025 NV_WR32(par->PRAMIN, 0x0822 * 4, 0x00000000); in NVLoadStateExt()
1026 NV_WR32(par->PRAMIN, 0x0823 * 4, 0x00000000); in NVLoadStateExt()
1027 NV_WR32(par->PRAMIN, 0x0824 * 4, 0x00000000); in NVLoadStateExt()
1028 NV_WR32(par->PRAMIN, 0x0825 * 4, 0x00000000); in NVLoadStateExt()
1029 NV_WR32(par->PRAMIN, 0x0828 * 4, 0x020A005C); in NVLoadStateExt()
1030 NV_WR32(par->PRAMIN, 0x0829 * 4, 0x00000000); in NVLoadStateExt()
1031 NV_WR32(par->PRAMIN, 0x082A * 4, 0x00000000); in NVLoadStateExt()
1032 NV_WR32(par->PRAMIN, 0x082B * 4, 0x00000000); in NVLoadStateExt()
1033 NV_WR32(par->PRAMIN, 0x082C * 4, 0x00000000); in NVLoadStateExt()
1034 NV_WR32(par->PRAMIN, 0x082D * 4, 0x00000000); in NVLoadStateExt()
1035 NV_WR32(par->PRAMIN, 0x0830 * 4, 0x0208009F); in NVLoadStateExt()
1036 NV_WR32(par->PRAMIN, 0x0831 * 4, 0x00000000); in NVLoadStateExt()
1037 NV_WR32(par->PRAMIN, 0x0832 * 4, 0x00001200); in NVLoadStateExt()
1038 NV_WR32(par->PRAMIN, 0x0833 * 4, 0x00001200); in NVLoadStateExt()
1039 NV_WR32(par->PRAMIN, 0x0834 * 4, 0x00000000); in NVLoadStateExt()
1040 NV_WR32(par->PRAMIN, 0x0835 * 4, 0x00000000); in NVLoadStateExt()
1041 NV_WR32(par->PRAMIN, 0x0838 * 4, 0x0208004A); in NVLoadStateExt()
1042 NV_WR32(par->PRAMIN, 0x0839 * 4, 0x02000000); in NVLoadStateExt()
1043 NV_WR32(par->PRAMIN, 0x083A * 4, 0x00000000); in NVLoadStateExt()
1044 NV_WR32(par->PRAMIN, 0x083B * 4, 0x00000000); in NVLoadStateExt()
1045 NV_WR32(par->PRAMIN, 0x083C * 4, 0x00000000); in NVLoadStateExt()
1046 NV_WR32(par->PRAMIN, 0x083D * 4, 0x00000000); in NVLoadStateExt()
1047 NV_WR32(par->PRAMIN, 0x0840 * 4, 0x02080077); in NVLoadStateExt()
1048 NV_WR32(par->PRAMIN, 0x0841 * 4, 0x00000000); in NVLoadStateExt()
1049 NV_WR32(par->PRAMIN, 0x0842 * 4, 0x00001200); in NVLoadStateExt()
1050 NV_WR32(par->PRAMIN, 0x0843 * 4, 0x00001200); in NVLoadStateExt()
1051 NV_WR32(par->PRAMIN, 0x0844 * 4, 0x00000000); in NVLoadStateExt()
1052 NV_WR32(par->PRAMIN, 0x0845 * 4, 0x00000000); in NVLoadStateExt()
1053 NV_WR32(par->PRAMIN, 0x084C * 4, 0x00003002); in NVLoadStateExt()
1054 NV_WR32(par->PRAMIN, 0x084D * 4, 0x00007FFF); in NVLoadStateExt()
1055 NV_WR32(par->PRAMIN, 0x084E * 4, in NVLoadStateExt()
1056 par->FbUsableSize | 0x00000002); in NVLoadStateExt()
1059 NV_WR32(par->PRAMIN, 0x080A * 4, in NVLoadStateExt()
1060 NV_RD32(par->PRAMIN, 0x080A * 4) | 0x01000000); in NVLoadStateExt()
1061 NV_WR32(par->PRAMIN, 0x0812 * 4, in NVLoadStateExt()
1062 NV_RD32(par->PRAMIN, 0x0812 * 4) | 0x01000000); in NVLoadStateExt()
1063 NV_WR32(par->PRAMIN, 0x081A * 4, in NVLoadStateExt()
1064 NV_RD32(par->PRAMIN, 0x081A * 4) | 0x01000000); in NVLoadStateExt()
1065 NV_WR32(par->PRAMIN, 0x0822 * 4, in NVLoadStateExt()
1066 NV_RD32(par->PRAMIN, 0x0822 * 4) | 0x01000000); in NVLoadStateExt()
1067 NV_WR32(par->PRAMIN, 0x082A * 4, in NVLoadStateExt()
1068 NV_RD32(par->PRAMIN, 0x082A * 4) | 0x01000000); in NVLoadStateExt()
1069 NV_WR32(par->PRAMIN, 0x0832 * 4, in NVLoadStateExt()
1070 NV_RD32(par->PRAMIN, 0x0832 * 4) | 0x01000000); in NVLoadStateExt()
1071 NV_WR32(par->PRAMIN, 0x083A * 4, in NVLoadStateExt()
1072 NV_RD32(par->PRAMIN, 0x083A * 4) | 0x01000000); in NVLoadStateExt()
1073 NV_WR32(par->PRAMIN, 0x0842 * 4, in NVLoadStateExt()
1074 NV_RD32(par->PRAMIN, 0x0842 * 4) | 0x01000000); in NVLoadStateExt()
1075 NV_WR32(par->PRAMIN, 0x0819 * 4, 0x01000000); in NVLoadStateExt()
1076 NV_WR32(par->PRAMIN, 0x0839 * 4, 0x01000000); in NVLoadStateExt()
1079 NV_WR32(par->PRAMIN, 0x0000 * 4, 0x80000010); in NVLoadStateExt()
1080 NV_WR32(par->PRAMIN, 0x0001 * 4, 0x80011201); in NVLoadStateExt()
1081 NV_WR32(par->PRAMIN, 0x0002 * 4, 0x80000011); in NVLoadStateExt()
1082 NV_WR32(par->PRAMIN, 0x0003 * 4, 0x80011202); in NVLoadStateExt()
1083 NV_WR32(par->PRAMIN, 0x0004 * 4, 0x80000012); in NVLoadStateExt()
1084 NV_WR32(par->PRAMIN, 0x0005 * 4, 0x80011203); in NVLoadStateExt()
1085 NV_WR32(par->PRAMIN, 0x0006 * 4, 0x80000013); in NVLoadStateExt()
1086 NV_WR32(par->PRAMIN, 0x0007 * 4, 0x80011204); in NVLoadStateExt()
1087 NV_WR32(par->PRAMIN, 0x0008 * 4, 0x80000014); in NVLoadStateExt()
1088 NV_WR32(par->PRAMIN, 0x0009 * 4, 0x80011205); in NVLoadStateExt()
1089 NV_WR32(par->PRAMIN, 0x000A * 4, 0x80000015); in NVLoadStateExt()
1090 NV_WR32(par->PRAMIN, 0x000B * 4, 0x80011206); in NVLoadStateExt()
1091 NV_WR32(par->PRAMIN, 0x000C * 4, 0x80000016); in NVLoadStateExt()
1092 NV_WR32(par->PRAMIN, 0x000D * 4, 0x80011207); in NVLoadStateExt()
1093 NV_WR32(par->PRAMIN, 0x000E * 4, 0x80000017); in NVLoadStateExt()
1094 NV_WR32(par->PRAMIN, 0x000F * 4, 0x80011208); in NVLoadStateExt()
1095 NV_WR32(par->PRAMIN, 0x0800 * 4, 0x00003000); in NVLoadStateExt()
1096 NV_WR32(par->PRAMIN, 0x0801 * 4, par->FbMapSize - 1); in NVLoadStateExt()
1097 NV_WR32(par->PRAMIN, 0x0802 * 4, 0x00000002); in NVLoadStateExt()
1098 NV_WR32(par->PRAMIN, 0x0803 * 4, 0x00000002); in NVLoadStateExt()
1099 if (par->Architecture >= NV_ARCH_10) in NVLoadStateExt()
1100 NV_WR32(par->PRAMIN, 0x0804 * 4, 0x01008062); in NVLoadStateExt()
1102 NV_WR32(par->PRAMIN, 0x0804 * 4, 0x01008042); in NVLoadStateExt()
1103 NV_WR32(par->PRAMIN, 0x0805 * 4, 0x00000000); in NVLoadStateExt()
1104 NV_WR32(par->PRAMIN, 0x0806 * 4, 0x12001200); in NVLoadStateExt()
1105 NV_WR32(par->PRAMIN, 0x0807 * 4, 0x00000000); in NVLoadStateExt()
1106 NV_WR32(par->PRAMIN, 0x0808 * 4, 0x01008043); in NVLoadStateExt()
1107 NV_WR32(par->PRAMIN, 0x0809 * 4, 0x00000000); in NVLoadStateExt()
1108 NV_WR32(par->PRAMIN, 0x080A * 4, 0x00000000); in NVLoadStateExt()
1109 NV_WR32(par->PRAMIN, 0x080B * 4, 0x00000000); in NVLoadStateExt()
1110 NV_WR32(par->PRAMIN, 0x080C * 4, 0x01008044); in NVLoadStateExt()
1111 NV_WR32(par->PRAMIN, 0x080D * 4, 0x00000002); in NVLoadStateExt()
1112 NV_WR32(par->PRAMIN, 0x080E * 4, 0x00000000); in NVLoadStateExt()
1113 NV_WR32(par->PRAMIN, 0x080F * 4, 0x00000000); in NVLoadStateExt()
1114 NV_WR32(par->PRAMIN, 0x0810 * 4, 0x01008019); in NVLoadStateExt()
1115 NV_WR32(par->PRAMIN, 0x0811 * 4, 0x00000000); in NVLoadStateExt()
1116 NV_WR32(par->PRAMIN, 0x0812 * 4, 0x00000000); in NVLoadStateExt()
1117 NV_WR32(par->PRAMIN, 0x0813 * 4, 0x00000000); in NVLoadStateExt()
1118 NV_WR32(par->PRAMIN, 0x0814 * 4, 0x0100A05C); in NVLoadStateExt()
1119 NV_WR32(par->PRAMIN, 0x0815 * 4, 0x00000000); in NVLoadStateExt()
1120 NV_WR32(par->PRAMIN, 0x0816 * 4, 0x00000000); in NVLoadStateExt()
1121 NV_WR32(par->PRAMIN, 0x0817 * 4, 0x00000000); in NVLoadStateExt()
1122 if (par->WaitVSyncPossible) in NVLoadStateExt()
1123 NV_WR32(par->PRAMIN, 0x0818 * 4, 0x0100809F); in NVLoadStateExt()
1125 NV_WR32(par->PRAMIN, 0x0818 * 4, 0x0100805F); in NVLoadStateExt()
1126 NV_WR32(par->PRAMIN, 0x0819 * 4, 0x00000000); in NVLoadStateExt()
1127 NV_WR32(par->PRAMIN, 0x081A * 4, 0x12001200); in NVLoadStateExt()
1128 NV_WR32(par->PRAMIN, 0x081B * 4, 0x00000000); in NVLoadStateExt()
1129 NV_WR32(par->PRAMIN, 0x081C * 4, 0x0100804A); in NVLoadStateExt()
1130 NV_WR32(par->PRAMIN, 0x081D * 4, 0x00000002); in NVLoadStateExt()
1131 NV_WR32(par->PRAMIN, 0x081E * 4, 0x00000000); in NVLoadStateExt()
1132 NV_WR32(par->PRAMIN, 0x081F * 4, 0x00000000); in NVLoadStateExt()
1133 NV_WR32(par->PRAMIN, 0x0820 * 4, 0x01018077); in NVLoadStateExt()
1134 NV_WR32(par->PRAMIN, 0x0821 * 4, 0x00000000); in NVLoadStateExt()
1135 NV_WR32(par->PRAMIN, 0x0822 * 4, 0x12001200); in NVLoadStateExt()
1136 NV_WR32(par->PRAMIN, 0x0823 * 4, 0x00000000); in NVLoadStateExt()
1137 NV_WR32(par->PRAMIN, 0x0824 * 4, 0x00003002); in NVLoadStateExt()
1138 NV_WR32(par->PRAMIN, 0x0825 * 4, 0x00007FFF); in NVLoadStateExt()
1139 NV_WR32(par->PRAMIN, 0x0826 * 4, in NVLoadStateExt()
1140 par->FbUsableSize | 0x00000002); in NVLoadStateExt()
1141 NV_WR32(par->PRAMIN, 0x0827 * 4, 0x00000002); in NVLoadStateExt()
1143 NV_WR32(par->PRAMIN, 0x0804 * 4, in NVLoadStateExt()
1144 NV_RD32(par->PRAMIN, 0x0804 * 4) | 0x00080000); in NVLoadStateExt()
1145 NV_WR32(par->PRAMIN, 0x0808 * 4, in NVLoadStateExt()
1146 NV_RD32(par->PRAMIN, 0x0808 * 4) | 0x00080000); in NVLoadStateExt()
1147 NV_WR32(par->PRAMIN, 0x080C * 4, in NVLoadStateExt()
1148 NV_RD32(par->PRAMIN, 0x080C * 4) | 0x00080000); in NVLoadStateExt()
1149 NV_WR32(par->PRAMIN, 0x0810 * 4, in NVLoadStateExt()
1150 NV_RD32(par->PRAMIN, 0x0810 * 4) | 0x00080000); in NVLoadStateExt()
1151 NV_WR32(par->PRAMIN, 0x0814 * 4, in NVLoadStateExt()
1152 NV_RD32(par->PRAMIN, 0x0814 * 4) | 0x00080000); in NVLoadStateExt()
1153 NV_WR32(par->PRAMIN, 0x0818 * 4, in NVLoadStateExt()
1154 NV_RD32(par->PRAMIN, 0x0818 * 4) | 0x00080000); in NVLoadStateExt()
1155 NV_WR32(par->PRAMIN, 0x081C * 4, in NVLoadStateExt()
1156 NV_RD32(par->PRAMIN, 0x081C * 4) | 0x00080000); in NVLoadStateExt()
1157 NV_WR32(par->PRAMIN, 0x0820 * 4, in NVLoadStateExt()
1158 NV_RD32(par->PRAMIN, 0x0820 * 4) | 0x00080000); in NVLoadStateExt()
1159 NV_WR32(par->PRAMIN, 0x080D * 4, 0x00000001); in NVLoadStateExt()
1160 NV_WR32(par->PRAMIN, 0x081D * 4, 0x00000001); in NVLoadStateExt()
1163 if (par->Architecture < NV_ARCH_10) { in NVLoadStateExt()
1164 if ((par->Chipset & 0x0fff) == 0x0020) { in NVLoadStateExt()
1165 NV_WR32(par->PRAMIN, 0x0824 * 4, in NVLoadStateExt()
1166 NV_RD32(par->PRAMIN, 0x0824 * 4) | 0x00020000); in NVLoadStateExt()
1167 NV_WR32(par->PRAMIN, 0x0826 * 4, in NVLoadStateExt()
1168 NV_RD32(par->PRAMIN, in NVLoadStateExt()
1169 0x0826 * 4) + par->FbAddress); in NVLoadStateExt()
1171 NV_WR32(par->PGRAPH, 0x0080, 0x000001FF); in NVLoadStateExt()
1172 NV_WR32(par->PGRAPH, 0x0080, 0x1230C000); in NVLoadStateExt()
1173 NV_WR32(par->PGRAPH, 0x0084, 0x72111101); in NVLoadStateExt()
1174 NV_WR32(par->PGRAPH, 0x0088, 0x11D5F071); in NVLoadStateExt()
1175 NV_WR32(par->PGRAPH, 0x008C, 0x0004FF31); in NVLoadStateExt()
1176 NV_WR32(par->PGRAPH, 0x008C, 0x4004FF31); in NVLoadStateExt()
1177 NV_WR32(par->PGRAPH, 0x0140, 0x00000000); in NVLoadStateExt()
1178 NV_WR32(par->PGRAPH, 0x0100, 0xFFFFFFFF); in NVLoadStateExt()
1179 NV_WR32(par->PGRAPH, 0x0170, 0x10010100); in NVLoadStateExt()
1180 NV_WR32(par->PGRAPH, 0x0710, 0xFFFFFFFF); in NVLoadStateExt()
1181 NV_WR32(par->PGRAPH, 0x0720, 0x00000001); in NVLoadStateExt()
1182 NV_WR32(par->PGRAPH, 0x0810, 0x00000000); in NVLoadStateExt()
1183 NV_WR32(par->PGRAPH, 0x0608, 0xFFFFFFFF); in NVLoadStateExt()
1185 NV_WR32(par->PGRAPH, 0x0080, 0xFFFFFFFF); in NVLoadStateExt()
1186 NV_WR32(par->PGRAPH, 0x0080, 0x00000000); in NVLoadStateExt()
1188 NV_WR32(par->PGRAPH, 0x0140, 0x00000000); in NVLoadStateExt()
1189 NV_WR32(par->PGRAPH, 0x0100, 0xFFFFFFFF); in NVLoadStateExt()
1190 NV_WR32(par->PGRAPH, 0x0144, 0x10010100); in NVLoadStateExt()
1191 NV_WR32(par->PGRAPH, 0x0714, 0xFFFFFFFF); in NVLoadStateExt()
1192 NV_WR32(par->PGRAPH, 0x0720, 0x00000001); in NVLoadStateExt()
1193 NV_WR32(par->PGRAPH, 0x0710, in NVLoadStateExt()
1194 NV_RD32(par->PGRAPH, 0x0710) & 0x0007ff00); in NVLoadStateExt()
1195 NV_WR32(par->PGRAPH, 0x0710, in NVLoadStateExt()
1196 NV_RD32(par->PGRAPH, 0x0710) | 0x00020100); in NVLoadStateExt()
1198 if (par->Architecture == NV_ARCH_10) { in NVLoadStateExt()
1199 NV_WR32(par->PGRAPH, 0x0084, 0x00118700); in NVLoadStateExt()
1200 NV_WR32(par->PGRAPH, 0x0088, 0x24E00810); in NVLoadStateExt()
1201 NV_WR32(par->PGRAPH, 0x008C, 0x55DE0030); in NVLoadStateExt()
1204 NV_WR32(&par->PGRAPH[(0x0B00 / 4) + i], 0, in NVLoadStateExt()
1205 NV_RD32(&par->PFB[(0x0240 / 4) + i], in NVLoadStateExt()
1208 NV_WR32(par->PGRAPH, 0x640, 0); in NVLoadStateExt()
1209 NV_WR32(par->PGRAPH, 0x644, 0); in NVLoadStateExt()
1210 NV_WR32(par->PGRAPH, 0x684, par->FbMapSize - 1); in NVLoadStateExt()
1211 NV_WR32(par->PGRAPH, 0x688, par->FbMapSize - 1); in NVLoadStateExt()
1213 NV_WR32(par->PGRAPH, 0x0810, 0x00000000); in NVLoadStateExt()
1214 NV_WR32(par->PGRAPH, 0x0608, 0xFFFFFFFF); in NVLoadStateExt()
1216 if (par->Architecture >= NV_ARCH_40) { in NVLoadStateExt()
1217 NV_WR32(par->PGRAPH, 0x0084, 0x401287c0); in NVLoadStateExt()
1218 NV_WR32(par->PGRAPH, 0x008C, 0x60de8051); in NVLoadStateExt()
1219 NV_WR32(par->PGRAPH, 0x0090, 0x00008000); in NVLoadStateExt()
1220 NV_WR32(par->PGRAPH, 0x0610, 0x00be3c5f); in NVLoadStateExt()
1221 NV_WR32(par->PGRAPH, 0x0bc4, in NVLoadStateExt()
1222 NV_RD32(par->PGRAPH, 0x0bc4) | in NVLoadStateExt()
1225 j = NV_RD32(par->REGS, 0x1540) & 0xff; in NVLoadStateExt()
1229 NV_WR32(par->PGRAPH, 0x5000, i); in NVLoadStateExt()
1232 if ((par->Chipset & 0xfff0) == 0x0040) { in NVLoadStateExt()
1233 NV_WR32(par->PGRAPH, 0x09b0, in NVLoadStateExt()
1235 NV_WR32(par->PGRAPH, 0x09b4, in NVLoadStateExt()
1238 NV_WR32(par->PGRAPH, 0x0820, in NVLoadStateExt()
1240 NV_WR32(par->PGRAPH, 0x0824, in NVLoadStateExt()
1244 switch (par->Chipset & 0xfff0) { in NVLoadStateExt()
1247 NV_WR32(par->PGRAPH, 0x09b8, in NVLoadStateExt()
1249 NV_WR32(par->PGRAPH, 0x09bc, in NVLoadStateExt()
1251 NV_WR32(par->PFB, 0x033C, in NVLoadStateExt()
1252 NV_RD32(par->PFB, 0x33C) & in NVLoadStateExt()
1257 NV_WR32(par->PGRAPH, 0x0828, in NVLoadStateExt()
1259 NV_WR32(par->PGRAPH, 0x082C, in NVLoadStateExt()
1266 NV_WR32(par->PMC, 0x1700, in NVLoadStateExt()
1267 NV_RD32(par->PFB, 0x020C)); in NVLoadStateExt()
1268 NV_WR32(par->PMC, 0x1704, 0); in NVLoadStateExt()
1269 NV_WR32(par->PMC, 0x1708, 0); in NVLoadStateExt()
1270 NV_WR32(par->PMC, 0x170C, in NVLoadStateExt()
1271 NV_RD32(par->PFB, 0x020C)); in NVLoadStateExt()
1272 NV_WR32(par->PGRAPH, 0x0860, 0); in NVLoadStateExt()
1273 NV_WR32(par->PGRAPH, 0x0864, 0); in NVLoadStateExt()
1274 NV_WR32(par->PRAMDAC, 0x0608, in NVLoadStateExt()
1275 NV_RD32(par->PRAMDAC, in NVLoadStateExt()
1279 NV_WR32(par->PGRAPH, 0x0828, in NVLoadStateExt()
1281 NV_WR32(par->PGRAPH, 0x082C, in NVLoadStateExt()
1285 NV_WR32(par->PGRAPH, 0x0860, 0); in NVLoadStateExt()
1286 NV_WR32(par->PGRAPH, 0x0864, 0); in NVLoadStateExt()
1287 NV_WR32(par->PRAMDAC, 0x0608, in NVLoadStateExt()
1288 NV_RD32(par->PRAMDAC, 0x0608) | in NVLoadStateExt()
1294 NV_WR32(par->PRAMDAC, 0x0608, in NVLoadStateExt()
1295 NV_RD32(par->PRAMDAC, 0x0608) | in NVLoadStateExt()
1297 NV_WR32(par->PGRAPH, 0x0828, in NVLoadStateExt()
1299 NV_WR32(par->PGRAPH, 0x082C, in NVLoadStateExt()
1306 NV_WR32(par->PGRAPH, 0x0b38, 0x2ffff800); in NVLoadStateExt()
1307 NV_WR32(par->PGRAPH, 0x0b3c, 0x00006000); in NVLoadStateExt()
1308 NV_WR32(par->PGRAPH, 0x032C, 0x01000000); in NVLoadStateExt()
1309 NV_WR32(par->PGRAPH, 0x0220, 0x00001200); in NVLoadStateExt()
1310 } else if (par->Architecture == NV_ARCH_30) { in NVLoadStateExt()
1311 NV_WR32(par->PGRAPH, 0x0084, 0x40108700); in NVLoadStateExt()
1312 NV_WR32(par->PGRAPH, 0x0890, 0x00140000); in NVLoadStateExt()
1313 NV_WR32(par->PGRAPH, 0x008C, 0xf00e0431); in NVLoadStateExt()
1314 NV_WR32(par->PGRAPH, 0x0090, 0x00008000); in NVLoadStateExt()
1315 NV_WR32(par->PGRAPH, 0x0610, 0xf04b1f36); in NVLoadStateExt()
1316 NV_WR32(par->PGRAPH, 0x0B80, 0x1002d888); in NVLoadStateExt()
1317 NV_WR32(par->PGRAPH, 0x0B88, 0x62ff007f); in NVLoadStateExt()
1319 NV_WR32(par->PGRAPH, 0x0084, 0x00118700); in NVLoadStateExt()
1320 NV_WR32(par->PGRAPH, 0x008C, 0xF20E0431); in NVLoadStateExt()
1321 NV_WR32(par->PGRAPH, 0x0090, 0x00000000); in NVLoadStateExt()
1322 NV_WR32(par->PGRAPH, 0x009C, 0x00000040); in NVLoadStateExt()
1324 if ((par->Chipset & 0x0ff0) >= 0x0250) { in NVLoadStateExt()
1325 NV_WR32(par->PGRAPH, 0x0890, in NVLoadStateExt()
1327 NV_WR32(par->PGRAPH, 0x0610, in NVLoadStateExt()
1329 NV_WR32(par->PGRAPH, 0x0B80, in NVLoadStateExt()
1331 NV_WR32(par->PGRAPH, 0x0B84, in NVLoadStateExt()
1333 NV_WR32(par->PGRAPH, 0x0098, in NVLoadStateExt()
1335 NV_WR32(par->PGRAPH, 0x0B88, in NVLoadStateExt()
1338 NV_WR32(par->PGRAPH, 0x0880, in NVLoadStateExt()
1340 NV_WR32(par->PGRAPH, 0x0094, in NVLoadStateExt()
1342 NV_WR32(par->PGRAPH, 0x0B80, in NVLoadStateExt()
1344 NV_WR32(par->PGRAPH, 0x0B84, in NVLoadStateExt()
1346 NV_WR32(par->PGRAPH, 0x0098, in NVLoadStateExt()
1348 NV_WR32(par->PGRAPH, 0x0750, in NVLoadStateExt()
1350 NV_WR32(par->PGRAPH, 0x0754, in NVLoadStateExt()
1352 NV_WR32(par->PGRAPH, 0x0750, in NVLoadStateExt()
1354 NV_WR32(par->PGRAPH, 0x0754, in NVLoadStateExt()
1359 if ((par->Architecture < NV_ARCH_40) || in NVLoadStateExt()
1360 ((par->Chipset & 0xfff0) == 0x0040)) { in NVLoadStateExt()
1362 NV_WR32(par->PGRAPH, 0x0900 + i*4, in NVLoadStateExt()
1363 NV_RD32(par->PFB, 0x0240 +i*4)); in NVLoadStateExt()
1364 NV_WR32(par->PGRAPH, 0x6900 + i*4, in NVLoadStateExt()
1365 NV_RD32(par->PFB, 0x0240 +i*4)); in NVLoadStateExt()
1368 if (((par->Chipset & 0xfff0) == 0x0090) || in NVLoadStateExt()
1369 ((par->Chipset & 0xfff0) == 0x01D0) || in NVLoadStateExt()
1370 ((par->Chipset & 0xfff0) == 0x0290) || in NVLoadStateExt()
1371 ((par->Chipset & 0xfff0) == 0x0390) || in NVLoadStateExt()
1372 ((par->Chipset & 0xfff0) == 0x03D0)) { in NVLoadStateExt()
1374 NV_WR32(par->PGRAPH, in NVLoadStateExt()
1376 NV_RD32(par->PFB, in NVLoadStateExt()
1378 NV_WR32(par->PGRAPH, in NVLoadStateExt()
1380 NV_RD32(par->PFB, in NVLoadStateExt()
1385 NV_WR32(par->PGRAPH, in NVLoadStateExt()
1387 NV_RD32(par->PFB, in NVLoadStateExt()
1389 if(((par->Chipset & 0xfff0) in NVLoadStateExt()
1391 ((par->Chipset & 0xfff0) in NVLoadStateExt()
1393 ((par->Chipset & 0xfff0) in NVLoadStateExt()
1395 NV_WR32(par->PGRAPH, in NVLoadStateExt()
1397 NV_RD32(par->PFB, in NVLoadStateExt()
1403 if (par->Architecture >= NV_ARCH_40) { in NVLoadStateExt()
1404 if ((par->Chipset & 0xfff0) == 0x0040) { in NVLoadStateExt()
1405 NV_WR32(par->PGRAPH, 0x09A4, in NVLoadStateExt()
1406 NV_RD32(par->PFB, 0x0200)); in NVLoadStateExt()
1407 NV_WR32(par->PGRAPH, 0x09A8, in NVLoadStateExt()
1408 NV_RD32(par->PFB, 0x0204)); in NVLoadStateExt()
1409 NV_WR32(par->PGRAPH, 0x69A4, in NVLoadStateExt()
1410 NV_RD32(par->PFB, 0x0200)); in NVLoadStateExt()
1411 NV_WR32(par->PGRAPH, 0x69A8, in NVLoadStateExt()
1412 NV_RD32(par->PFB, 0x0204)); in NVLoadStateExt()
1414 NV_WR32(par->PGRAPH, 0x0820, 0); in NVLoadStateExt()
1415 NV_WR32(par->PGRAPH, 0x0824, 0); in NVLoadStateExt()
1416 NV_WR32(par->PGRAPH, 0x0864, in NVLoadStateExt()
1417 par->FbMapSize - 1); in NVLoadStateExt()
1418 NV_WR32(par->PGRAPH, 0x0868, in NVLoadStateExt()
1419 par->FbMapSize - 1); in NVLoadStateExt()
1421 if ((par->Chipset & 0xfff0) == 0x0090 || in NVLoadStateExt()
1422 (par->Chipset & 0xfff0) == 0x01D0 || in NVLoadStateExt()
1423 (par->Chipset & 0xfff0) == 0x0290 || in NVLoadStateExt()
1424 (par->Chipset & 0xfff0) == 0x0390) { in NVLoadStateExt()
1425 NV_WR32(par->PGRAPH, 0x0DF0, in NVLoadStateExt()
1426 NV_RD32(par->PFB, 0x0200)); in NVLoadStateExt()
1427 NV_WR32(par->PGRAPH, 0x0DF4, in NVLoadStateExt()
1428 NV_RD32(par->PFB, 0x0204)); in NVLoadStateExt()
1430 NV_WR32(par->PGRAPH, 0x09F0, in NVLoadStateExt()
1431 NV_RD32(par->PFB, 0x0200)); in NVLoadStateExt()
1432 NV_WR32(par->PGRAPH, 0x09F4, in NVLoadStateExt()
1433 NV_RD32(par->PFB, 0x0204)); in NVLoadStateExt()
1435 NV_WR32(par->PGRAPH, 0x69F0, in NVLoadStateExt()
1436 NV_RD32(par->PFB, 0x0200)); in NVLoadStateExt()
1437 NV_WR32(par->PGRAPH, 0x69F4, in NVLoadStateExt()
1438 NV_RD32(par->PFB, 0x0204)); in NVLoadStateExt()
1440 NV_WR32(par->PGRAPH, 0x0840, 0); in NVLoadStateExt()
1441 NV_WR32(par->PGRAPH, 0x0844, 0); in NVLoadStateExt()
1442 NV_WR32(par->PGRAPH, 0x08a0, in NVLoadStateExt()
1443 par->FbMapSize - 1); in NVLoadStateExt()
1444 NV_WR32(par->PGRAPH, 0x08a4, in NVLoadStateExt()
1445 par->FbMapSize - 1); in NVLoadStateExt()
1448 NV_WR32(par->PGRAPH, 0x09A4, in NVLoadStateExt()
1449 NV_RD32(par->PFB, 0x0200)); in NVLoadStateExt()
1450 NV_WR32(par->PGRAPH, 0x09A8, in NVLoadStateExt()
1451 NV_RD32(par->PFB, 0x0204)); in NVLoadStateExt()
1452 NV_WR32(par->PGRAPH, 0x0750, 0x00EA0000); in NVLoadStateExt()
1453 NV_WR32(par->PGRAPH, 0x0754, in NVLoadStateExt()
1454 NV_RD32(par->PFB, 0x0200)); in NVLoadStateExt()
1455 NV_WR32(par->PGRAPH, 0x0750, 0x00EA0004); in NVLoadStateExt()
1456 NV_WR32(par->PGRAPH, 0x0754, in NVLoadStateExt()
1457 NV_RD32(par->PFB, 0x0204)); in NVLoadStateExt()
1459 NV_WR32(par->PGRAPH, 0x0820, 0); in NVLoadStateExt()
1460 NV_WR32(par->PGRAPH, 0x0824, 0); in NVLoadStateExt()
1461 NV_WR32(par->PGRAPH, 0x0864, in NVLoadStateExt()
1462 par->FbMapSize - 1); in NVLoadStateExt()
1463 NV_WR32(par->PGRAPH, 0x0868, in NVLoadStateExt()
1464 par->FbMapSize - 1); in NVLoadStateExt()
1466 NV_WR32(par->PGRAPH, 0x0B20, 0x00000000); in NVLoadStateExt()
1467 NV_WR32(par->PGRAPH, 0x0B04, 0xFFFFFFFF); in NVLoadStateExt()
1470 NV_WR32(par->PGRAPH, 0x053C, 0); in NVLoadStateExt()
1471 NV_WR32(par->PGRAPH, 0x0540, 0); in NVLoadStateExt()
1472 NV_WR32(par->PGRAPH, 0x0544, 0x00007FFF); in NVLoadStateExt()
1473 NV_WR32(par->PGRAPH, 0x0548, 0x00007FFF); in NVLoadStateExt()
1475 NV_WR32(par->PFIFO, 0x0140 * 4, 0x00000000); in NVLoadStateExt()
1476 NV_WR32(par->PFIFO, 0x0141 * 4, 0x00000001); in NVLoadStateExt()
1477 NV_WR32(par->PFIFO, 0x0480 * 4, 0x00000000); in NVLoadStateExt()
1478 NV_WR32(par->PFIFO, 0x0494 * 4, 0x00000000); in NVLoadStateExt()
1479 if (par->Architecture >= NV_ARCH_40) in NVLoadStateExt()
1480 NV_WR32(par->PFIFO, 0x0481 * 4, 0x00010000); in NVLoadStateExt()
1482 NV_WR32(par->PFIFO, 0x0481 * 4, 0x00000100); in NVLoadStateExt()
1483 NV_WR32(par->PFIFO, 0x0490 * 4, 0x00000000); in NVLoadStateExt()
1484 NV_WR32(par->PFIFO, 0x0491 * 4, 0x00000000); in NVLoadStateExt()
1485 if (par->Architecture >= NV_ARCH_40) in NVLoadStateExt()
1486 NV_WR32(par->PFIFO, 0x048B * 4, 0x00001213); in NVLoadStateExt()
1488 NV_WR32(par->PFIFO, 0x048B * 4, 0x00001209); in NVLoadStateExt()
1489 NV_WR32(par->PFIFO, 0x0400 * 4, 0x00000000); in NVLoadStateExt()
1490 NV_WR32(par->PFIFO, 0x0414 * 4, 0x00000000); in NVLoadStateExt()
1491 NV_WR32(par->PFIFO, 0x0084 * 4, 0x03000100); in NVLoadStateExt()
1492 NV_WR32(par->PFIFO, 0x0085 * 4, 0x00000110); in NVLoadStateExt()
1493 NV_WR32(par->PFIFO, 0x0086 * 4, 0x00000112); in NVLoadStateExt()
1494 NV_WR32(par->PFIFO, 0x0143 * 4, 0x0000FFFF); in NVLoadStateExt()
1495 NV_WR32(par->PFIFO, 0x0496 * 4, 0x0000FFFF); in NVLoadStateExt()
1496 NV_WR32(par->PFIFO, 0x0050 * 4, 0x00000000); in NVLoadStateExt()
1497 NV_WR32(par->PFIFO, 0x0040 * 4, 0xFFFFFFFF); in NVLoadStateExt()
1498 NV_WR32(par->PFIFO, 0x0415 * 4, 0x00000001); in NVLoadStateExt()
1499 NV_WR32(par->PFIFO, 0x048C * 4, 0x00000000); in NVLoadStateExt()
1500 NV_WR32(par->PFIFO, 0x04A0 * 4, 0x00000000); in NVLoadStateExt()
1502 NV_WR32(par->PFIFO, 0x0489 * 4, 0x800F0078); in NVLoadStateExt()
1504 NV_WR32(par->PFIFO, 0x0489 * 4, 0x000F0078); in NVLoadStateExt()
1506 NV_WR32(par->PFIFO, 0x0488 * 4, 0x00000001); in NVLoadStateExt()
1507 NV_WR32(par->PFIFO, 0x0480 * 4, 0x00000001); in NVLoadStateExt()
1508 NV_WR32(par->PFIFO, 0x0494 * 4, 0x00000001); in NVLoadStateExt()
1509 NV_WR32(par->PFIFO, 0x0495 * 4, 0x00000001); in NVLoadStateExt()
1510 NV_WR32(par->PFIFO, 0x0140 * 4, 0x00000001); in NVLoadStateExt()
1513 par->CurrentState = NULL; in NVLoadStateExt()
1517 if (par->Architecture >= NV_ARCH_10) { in NVLoadStateExt()
1518 if (par->twoHeads) { in NVLoadStateExt()
1519 NV_WR32(par->PCRTC0, 0x0860, state->head); in NVLoadStateExt()
1520 NV_WR32(par->PCRTC0, 0x2860, state->head2); in NVLoadStateExt()
1522 NV_WR32(par->PRAMDAC, 0x0404, NV_RD32(par->PRAMDAC, 0x0404) | in NVLoadStateExt()
1525 NV_WR32(par->PMC, 0x8704, 1); in NVLoadStateExt()
1526 NV_WR32(par->PMC, 0x8140, 0); in NVLoadStateExt()
1527 NV_WR32(par->PMC, 0x8920, 0); in NVLoadStateExt()
1528 NV_WR32(par->PMC, 0x8924, 0); in NVLoadStateExt()
1529 NV_WR32(par->PMC, 0x8908, par->FbMapSize - 1); in NVLoadStateExt()
1530 NV_WR32(par->PMC, 0x890C, par->FbMapSize - 1); in NVLoadStateExt()
1531 NV_WR32(par->PMC, 0x1588, 0); in NVLoadStateExt()
1533 NV_WR32(par->PCRTC, 0x0810, state->cursorConfig); in NVLoadStateExt()
1534 NV_WR32(par->PCRTC, 0x0830, state->displayV - 3); in NVLoadStateExt()
1535 NV_WR32(par->PCRTC, 0x0834, state->displayV - 1); in NVLoadStateExt()
1537 if (par->FlatPanel) { in NVLoadStateExt()
1538 if ((par->Chipset & 0x0ff0) == 0x0110) { in NVLoadStateExt()
1539 NV_WR32(par->PRAMDAC, 0x0528, state->dither); in NVLoadStateExt()
1540 } else if (par->twoHeads) { in NVLoadStateExt()
1541 NV_WR32(par->PRAMDAC, 0x083C, state->dither); in NVLoadStateExt()
1544 VGA_WR08(par->PCIO, 0x03D4, 0x53); in NVLoadStateExt()
1545 VGA_WR08(par->PCIO, 0x03D5, state->timingH); in NVLoadStateExt()
1546 VGA_WR08(par->PCIO, 0x03D4, 0x54); in NVLoadStateExt()
1547 VGA_WR08(par->PCIO, 0x03D5, state->timingV); in NVLoadStateExt()
1548 VGA_WR08(par->PCIO, 0x03D4, 0x21); in NVLoadStateExt()
1549 VGA_WR08(par->PCIO, 0x03D5, 0xfa); in NVLoadStateExt()
1552 VGA_WR08(par->PCIO, 0x03D4, 0x41); in NVLoadStateExt()
1553 VGA_WR08(par->PCIO, 0x03D5, state->extra); in NVLoadStateExt()
1556 VGA_WR08(par->PCIO, 0x03D4, 0x19); in NVLoadStateExt()
1557 VGA_WR08(par->PCIO, 0x03D5, state->repaint0); in NVLoadStateExt()
1558 VGA_WR08(par->PCIO, 0x03D4, 0x1A); in NVLoadStateExt()
1559 VGA_WR08(par->PCIO, 0x03D5, state->repaint1); in NVLoadStateExt()
1560 VGA_WR08(par->PCIO, 0x03D4, 0x25); in NVLoadStateExt()
1561 VGA_WR08(par->PCIO, 0x03D5, state->screen); in NVLoadStateExt()
1562 VGA_WR08(par->PCIO, 0x03D4, 0x28); in NVLoadStateExt()
1563 VGA_WR08(par->PCIO, 0x03D5, state->pixel); in NVLoadStateExt()
1564 VGA_WR08(par->PCIO, 0x03D4, 0x2D); in NVLoadStateExt()
1565 VGA_WR08(par->PCIO, 0x03D5, state->horiz); in NVLoadStateExt()
1566 VGA_WR08(par->PCIO, 0x03D4, 0x1C); in NVLoadStateExt()
1567 VGA_WR08(par->PCIO, 0x03D5, state->fifo); in NVLoadStateExt()
1568 VGA_WR08(par->PCIO, 0x03D4, 0x1B); in NVLoadStateExt()
1569 VGA_WR08(par->PCIO, 0x03D5, state->arbitration0); in NVLoadStateExt()
1570 VGA_WR08(par->PCIO, 0x03D4, 0x20); in NVLoadStateExt()
1571 VGA_WR08(par->PCIO, 0x03D5, state->arbitration1); in NVLoadStateExt()
1573 if(par->Architecture >= NV_ARCH_30) { in NVLoadStateExt()
1574 VGA_WR08(par->PCIO, 0x03D4, 0x47); in NVLoadStateExt()
1575 VGA_WR08(par->PCIO, 0x03D5, state->arbitration1 >> 8); in NVLoadStateExt()
1578 VGA_WR08(par->PCIO, 0x03D4, 0x30); in NVLoadStateExt()
1579 VGA_WR08(par->PCIO, 0x03D5, state->cursor0); in NVLoadStateExt()
1580 VGA_WR08(par->PCIO, 0x03D4, 0x31); in NVLoadStateExt()
1581 VGA_WR08(par->PCIO, 0x03D5, state->cursor1); in NVLoadStateExt()
1582 VGA_WR08(par->PCIO, 0x03D4, 0x2F); in NVLoadStateExt()
1583 VGA_WR08(par->PCIO, 0x03D5, state->cursor2); in NVLoadStateExt()
1584 VGA_WR08(par->PCIO, 0x03D4, 0x39); in NVLoadStateExt()
1585 VGA_WR08(par->PCIO, 0x03D5, state->interlace); in NVLoadStateExt()
1587 if (!par->FlatPanel) { in NVLoadStateExt()
1588 if (par->Architecture >= NV_ARCH_40) in NVLoadStateExt()
1589 NV_WR32(par->PRAMDAC0, 0x0580, state->control); in NVLoadStateExt()
1591 NV_WR32(par->PRAMDAC0, 0x050C, state->pllsel); in NVLoadStateExt()
1592 NV_WR32(par->PRAMDAC0, 0x0508, state->vpll); in NVLoadStateExt()
1593 if (par->twoHeads) in NVLoadStateExt()
1594 NV_WR32(par->PRAMDAC0, 0x0520, state->vpll2); in NVLoadStateExt()
1595 if (par->twoStagePLL) { in NVLoadStateExt()
1596 NV_WR32(par->PRAMDAC0, 0x0578, state->vpllB); in NVLoadStateExt()
1597 NV_WR32(par->PRAMDAC0, 0x057C, state->vpll2B); in NVLoadStateExt()
1600 NV_WR32(par->PRAMDAC, 0x0848, state->scale); in NVLoadStateExt()
1601 NV_WR32(par->PRAMDAC, 0x0828, state->crtcSync + in NVLoadStateExt()
1602 par->PanelTweak); in NVLoadStateExt()
1605 NV_WR32(par->PRAMDAC, 0x0600, state->general); in NVLoadStateExt()
1607 NV_WR32(par->PCRTC, 0x0140, 0); in NVLoadStateExt()
1608 NV_WR32(par->PCRTC, 0x0100, 1); in NVLoadStateExt()
1610 par->CurrentState = state; in NVLoadStateExt()
1613 void NVUnloadStateExt(struct nvidia_par *par, RIVA_HW_STATE * state) { in NVUnloadStateExt() argument
1614 VGA_WR08(par->PCIO, 0x03D4, 0x19); in NVUnloadStateExt()
1615 state->repaint0 = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1616 VGA_WR08(par->PCIO, 0x03D4, 0x1A); in NVUnloadStateExt()
1617 state->repaint1 = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1618 VGA_WR08(par->PCIO, 0x03D4, 0x25); in NVUnloadStateExt()
1619 state->screen = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1620 VGA_WR08(par->PCIO, 0x03D4, 0x28); in NVUnloadStateExt()
1621 state->pixel = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1622 VGA_WR08(par->PCIO, 0x03D4, 0x2D); in NVUnloadStateExt()
1623 state->horiz = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1624 VGA_WR08(par->PCIO, 0x03D4, 0x1C); in NVUnloadStateExt()
1625 state->fifo = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1626 VGA_WR08(par->PCIO, 0x03D4, 0x1B); in NVUnloadStateExt()
1627 state->arbitration0 = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1628 VGA_WR08(par->PCIO, 0x03D4, 0x20); in NVUnloadStateExt()
1629 state->arbitration1 = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1631 if(par->Architecture >= NV_ARCH_30) { in NVUnloadStateExt()
1632 VGA_WR08(par->PCIO, 0x03D4, 0x47); in NVUnloadStateExt()
1633 state->arbitration1 |= (VGA_RD08(par->PCIO, 0x03D5) & 1) << 8; in NVUnloadStateExt()
1636 VGA_WR08(par->PCIO, 0x03D4, 0x30); in NVUnloadStateExt()
1637 state->cursor0 = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1638 VGA_WR08(par->PCIO, 0x03D4, 0x31); in NVUnloadStateExt()
1639 state->cursor1 = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1640 VGA_WR08(par->PCIO, 0x03D4, 0x2F); in NVUnloadStateExt()
1641 state->cursor2 = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1642 VGA_WR08(par->PCIO, 0x03D4, 0x39); in NVUnloadStateExt()
1643 state->interlace = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1644 state->vpll = NV_RD32(par->PRAMDAC0, 0x0508); in NVUnloadStateExt()
1645 if (par->twoHeads) in NVUnloadStateExt()
1646 state->vpll2 = NV_RD32(par->PRAMDAC0, 0x0520); in NVUnloadStateExt()
1647 if (par->twoStagePLL) { in NVUnloadStateExt()
1648 state->vpllB = NV_RD32(par->PRAMDAC0, 0x0578); in NVUnloadStateExt()
1649 state->vpll2B = NV_RD32(par->PRAMDAC0, 0x057C); in NVUnloadStateExt()
1651 state->pllsel = NV_RD32(par->PRAMDAC0, 0x050C); in NVUnloadStateExt()
1652 state->general = NV_RD32(par->PRAMDAC, 0x0600); in NVUnloadStateExt()
1653 state->scale = NV_RD32(par->PRAMDAC, 0x0848); in NVUnloadStateExt()
1654 state->config = NV_RD32(par->PFB, 0x0200); in NVUnloadStateExt()
1656 if (par->Architecture >= NV_ARCH_40 && !par->FlatPanel) in NVUnloadStateExt()
1657 state->control = NV_RD32(par->PRAMDAC0, 0x0580); in NVUnloadStateExt()
1659 if (par->Architecture >= NV_ARCH_10) { in NVUnloadStateExt()
1660 if (par->twoHeads) { in NVUnloadStateExt()
1661 state->head = NV_RD32(par->PCRTC0, 0x0860); in NVUnloadStateExt()
1662 state->head2 = NV_RD32(par->PCRTC0, 0x2860); in NVUnloadStateExt()
1663 VGA_WR08(par->PCIO, 0x03D4, 0x44); in NVUnloadStateExt()
1664 state->crtcOwner = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1666 VGA_WR08(par->PCIO, 0x03D4, 0x41); in NVUnloadStateExt()
1667 state->extra = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1668 state->cursorConfig = NV_RD32(par->PCRTC, 0x0810); in NVUnloadStateExt()
1670 if ((par->Chipset & 0x0ff0) == 0x0110) { in NVUnloadStateExt()
1671 state->dither = NV_RD32(par->PRAMDAC, 0x0528); in NVUnloadStateExt()
1672 } else if (par->twoHeads) { in NVUnloadStateExt()
1673 state->dither = NV_RD32(par->PRAMDAC, 0x083C); in NVUnloadStateExt()
1676 if (par->FlatPanel) { in NVUnloadStateExt()
1677 VGA_WR08(par->PCIO, 0x03D4, 0x53); in NVUnloadStateExt()
1678 state->timingH = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1679 VGA_WR08(par->PCIO, 0x03D4, 0x54); in NVUnloadStateExt()
1680 state->timingV = VGA_RD08(par->PCIO, 0x03D5); in NVUnloadStateExt()
1685 void NVSetStartAddress(struct nvidia_par *par, u32 start) in NVSetStartAddress() argument
1687 NV_WR32(par->PCRTC, 0x800, start); in NVSetStartAddress()