545 static i386_insn i;  variable
2072   return !((i.types[given].bitfield.byte  in match_operand_size()
2074 	   || (i.types[given].bitfield.word  in match_operand_size()
2076 	   || (i.types[given].bitfield.dword  in match_operand_size()
2078 	   || (i.types[given].bitfield.qword  in match_operand_size()
2080 	   || (i.types[given].bitfield.tbyte  in match_operand_size()
2091   return !((i.types[given].bitfield.xmmword  in match_simd_size()
2093 	   || (i.types[given].bitfield.ymmword  in match_simd_size()
2095 	   || (i.types[given].bitfield.zmmword  in match_simd_size()
2107 	  && !((i.types[given].bitfield.unspecified  in match_mem_size()
2108 		&& !i.broadcast  in match_mem_size()
2110 	       || (i.types[given].bitfield.fword  in match_mem_size()
2122 		   ? (i.types[given].bitfield.xmmword  in match_mem_size()
2123 		      || i.types[given].bitfield.ymmword  in match_mem_size()
2124 		      || i.types[given].bitfield.zmmword)  in match_mem_size()
2147   for (j = 0; j < i.operands; j++)  in operand_size_match()
2149       if (i.types[j].bitfield.class != Reg  in operand_size_match()
2150 	  && i.types[j].bitfield.class != RegSIMD  in operand_size_match()
2175       if ((i.flags[j] & Operand_Mem) && !match_mem_size (t, j, j))  in operand_size_match()
2186 	i.error = operand_size_mismatch;  in operand_size_match()
2191   gas_assert (i.operands >= 2 && i.operands <= 3);  in operand_size_match()
2193   for (j = 0; j < i.operands; j++)  in operand_size_match()
2195       unsigned int given = i.operands - j - 1;  in operand_size_match()
2210       if ((i.flags[given] & Operand_Mem) && !match_mem_size (t, j, given))  in operand_size_match()
2240   i.error = operand_type_mismatch;  in operand_type_match()
2287   i.error = register_type_mismatch;  in operand_type_register_match()
2366   int shift = i.memshift;  in fits_in_disp8()
2461       || i.prefix[ADDR_PREFIX])  in offset_in_range()
2504       if ((i.prefix[REX_PREFIX] & prefix & REX_W)  in add_prefix()
2505 	  || (i.prefix[REX_PREFIX] & prefix & REX_R)  in add_prefix()
2506 	  || (i.prefix[REX_PREFIX] & prefix & REX_X)  in add_prefix()
2507 	  || (i.prefix[REX_PREFIX] & prefix & REX_B))  in add_prefix()
2552       if (i.prefix[q] != 0)  in add_prefix()
2558       if (!i.prefix[q])  in add_prefix()
2559 	++i.prefixes;  in add_prefix()
2560       i.prefix[q] |= prefix;  in add_prefix()
3496   if (i.vex.register_specifier)  in build_vex_prefix()
3499 	~register_number (i.vex.register_specifier) & 0xf;  in build_vex_prefix()
3500       gas_assert ((i.vex.register_specifier->reg_flags & RegVRex) == 0);  in build_vex_prefix()
3507   if (i.reg_operands > 1  in build_vex_prefix()
3508       && i.vec_encoding != vex_encoding_vex3  in build_vex_prefix()
3509       && i.dir_encoding == dir_encoding_default  in build_vex_prefix()
3510       && i.operands == i.reg_operands  in build_vex_prefix()
3511       && operand_type_equal (&i.types[0], &i.types[i.operands - 1])  in build_vex_prefix()
3512       && i.tm.opcode_modifier.vexopcode == VEX0F  in build_vex_prefix()
3513       && (i.tm.opcode_modifier.load || i.tm.opcode_modifier.d)  in build_vex_prefix()
3514       && i.rex == REX_B)  in build_vex_prefix()
3516       unsigned int xchg = i.operands - 1;  in build_vex_prefix()
3520       temp_type = i.types[xchg];  in build_vex_prefix()
3521       i.types[xchg] = i.types[0];  in build_vex_prefix()
3522       i.types[0] = temp_type;  in build_vex_prefix()
3523       temp_op = i.op[xchg];  in build_vex_prefix()
3524       i.op[xchg] = i.op[0];  in build_vex_prefix()
3525       i.op[0] = temp_op;  in build_vex_prefix()
3527       gas_assert (i.rm.mode == 3);  in build_vex_prefix()
3529       i.rex = REX_R;  in build_vex_prefix()
3530       xchg = i.rm.regmem;  in build_vex_prefix()
3531       i.rm.regmem = i.rm.reg;  in build_vex_prefix()
3532       i.rm.reg = xchg;  in build_vex_prefix()
3534       if (i.tm.opcode_modifier.d)  in build_vex_prefix()
3535 	i.tm.base_opcode ^= (i.tm.base_opcode & 0xee) != 0x6e  in build_vex_prefix()
3538 	i.tm = t[1];  in build_vex_prefix()
3543   if (i.reg_operands >= 3  in build_vex_prefix()
3544       && i.vec_encoding != vex_encoding_vex3  in build_vex_prefix()
3545       && i.reg_operands == i.operands - i.imm_operands  in build_vex_prefix()
3546       && i.tm.opcode_modifier.vex  in build_vex_prefix()
3547       && i.tm.opcode_modifier.commutative  in build_vex_prefix()
3548       && (i.tm.opcode_modifier.sse2avx || optimize > 1)  in build_vex_prefix()
3549       && i.rex == REX_B  in build_vex_prefix()
3550       && i.vex.register_specifier  in build_vex_prefix()
3551       && !(i.vex.register_specifier->reg_flags & RegRex))  in build_vex_prefix()
3553       unsigned int xchg = i.operands - i.reg_operands;  in build_vex_prefix()
3557       gas_assert (i.tm.opcode_modifier.vexopcode == VEX0F);  in build_vex_prefix()
3558       gas_assert (!i.tm.opcode_modifier.sae);  in build_vex_prefix()
3559       gas_assert (operand_type_equal (&i.types[i.operands - 2],  in build_vex_prefix()
3560                                       &i.types[i.operands - 3]));  in build_vex_prefix()
3561       gas_assert (i.rm.mode == 3);  in build_vex_prefix()
3563       temp_type = i.types[xchg];  in build_vex_prefix()
3564       i.types[xchg] = i.types[xchg + 1];  in build_vex_prefix()
3565       i.types[xchg + 1] = temp_type;  in build_vex_prefix()
3566       temp_op = i.op[xchg];  in build_vex_prefix()
3567       i.op[xchg] = i.op[xchg + 1];  in build_vex_prefix()
3568       i.op[xchg + 1] = temp_op;  in build_vex_prefix()
3570       i.rex = 0;  in build_vex_prefix()
3571       xchg = i.rm.regmem | 8;  in build_vex_prefix()
3572       i.rm.regmem = ~register_specifier & 0xf;  in build_vex_prefix()
3573       gas_assert (!(i.rm.regmem & 8));  in build_vex_prefix()
3574       i.vex.register_specifier += xchg - i.rm.regmem;  in build_vex_prefix()
3578   if (i.tm.opcode_modifier.vex == VEXScalar)  in build_vex_prefix()
3580   else if (i.tm.opcode_modifier.vex == VEX256)  in build_vex_prefix()
3592 	    && i.types[op].bitfield.ymmword)  in build_vex_prefix()
3599   switch ((i.tm.base_opcode >> 8) & 0xff)  in build_vex_prefix()
3618   if (i.tm.opcode_modifier.vexw == VEXWIG)  in build_vex_prefix()
3619     w = (vexwig == vexw1 || (i.rex & REX_W)) ? 1 : 0;  in build_vex_prefix()
3620   else if (i.tm.opcode_modifier.vexw)  in build_vex_prefix()
3621     w = i.tm.opcode_modifier.vexw == VEXW1 ? 1 : 0;  in build_vex_prefix()
3623     w = (flag_code == CODE_64BIT ? i.rex & REX_W : vexwig == vexw1) ? 1 : 0;  in build_vex_prefix()
3627       && i.vec_encoding != vex_encoding_vex3  in build_vex_prefix()
3628       && i.tm.opcode_modifier.vexopcode == VEX0F  in build_vex_prefix()
3629       && (i.rex & (REX_W | REX_X | REX_B)) == 0)  in build_vex_prefix()
3634       i.vex.length = 2;  in build_vex_prefix()
3635       i.vex.bytes[0] = 0xc5;  in build_vex_prefix()
3638       r = (i.rex & REX_R) ? 0 : 1;  in build_vex_prefix()
3639       i.vex.bytes[1] = (r << 7  in build_vex_prefix()
3649       i.vex.length = 3;  in build_vex_prefix()
3651       switch (i.tm.opcode_modifier.vexopcode)  in build_vex_prefix()
3655 	  i.vex.bytes[0] = 0xc4;  in build_vex_prefix()
3659 	  i.vex.bytes[0] = 0xc4;  in build_vex_prefix()
3663 	  i.vex.bytes[0] = 0xc4;  in build_vex_prefix()
3667 	  i.vex.bytes[0] = 0x8f;  in build_vex_prefix()
3671 	  i.vex.bytes[0] = 0x8f;  in build_vex_prefix()
3675 	  i.vex.bytes[0] = 0x8f;  in build_vex_prefix()
3683       i.vex.bytes[1] = (~i.rex & 0x7) << 5 | m;  in build_vex_prefix()
3685       i.vex.bytes[2] = (w << 7  in build_vex_prefix()
3718   if (i.vex.register_specifier)  in build_evex_prefix()
3720       gas_assert ((i.vrex & REX_X) == 0);  in build_evex_prefix()
3722       register_specifier = i.vex.register_specifier->reg_num;  in build_evex_prefix()
3723       if ((i.vex.register_specifier->reg_flags & RegRex))  in build_evex_prefix()
3727       if (!(i.vex.register_specifier->reg_flags & RegVRex))  in build_evex_prefix()
3728 	i.vex.bytes[3] = 0x8;  in build_evex_prefix()
3737       if (!(i.vrex & REX_X))  in build_evex_prefix()
3738 	i.vex.bytes[3] = 0x8;  in build_evex_prefix()
3743   switch ((i.tm.base_opcode >> 8) & 0xff)  in build_evex_prefix()
3762   i.vex.length = 4;  in build_evex_prefix()
3763   i.vex.bytes[0] = 0x62;  in build_evex_prefix()
3766   switch (i.tm.opcode_modifier.vexopcode)  in build_evex_prefix()
3784   i.vex.bytes[1] = (~i.rex & 0x7) << 5 | m;  in build_evex_prefix()
3788   if (!(i.vrex & REX_R))  in build_evex_prefix()
3789     i.vex.bytes[1] |= 0x10;  in build_evex_prefix()
3793   if ((i.reg_operands + i.imm_operands) == i.operands)  in build_evex_prefix()
3799       if ((i.vrex & REX_B))  in build_evex_prefix()
3802 	  i.vex.bytes[1] &= ~0x40;  in build_evex_prefix()
3807   i.vrex &= ~vrex_used;  in build_evex_prefix()
3808   gas_assert (i.vrex == 0);  in build_evex_prefix()
3811   if (i.tm.opcode_modifier.vexw == VEXWIG)  in build_evex_prefix()
3812     w = (evexwig == evexw1 || (i.rex & REX_W)) ? 1 : 0;  in build_evex_prefix()
3813   else if (i.tm.opcode_modifier.vexw)  in build_evex_prefix()
3814     w = i.tm.opcode_modifier.vexw == VEXW1 ? 1 : 0;  in build_evex_prefix()
3816     w = (flag_code == CODE_64BIT ? i.rex & REX_W : evexwig == evexw1) ? 1 : 0;  in build_evex_prefix()
3822   i.vex.bytes[2] = (w << 7 | register_specifier << 3 | implied_prefix);  in build_evex_prefix()
3826   if (i.mask && i.mask->zeroing)  in build_evex_prefix()
3827     i.vex.bytes[3] |= 0x80;  in build_evex_prefix()
3830   if (!i.rounding)  in build_evex_prefix()
3835       if (!i.tm.opcode_modifier.evex  in build_evex_prefix()
3836 	  || i.tm.opcode_modifier.evex == EVEXDYN)  in build_evex_prefix()
3843 	  for (op = i.operands; op--;)  in build_evex_prefix()
3844 	    if (i.tm.operand_types[op].bitfield.xmmword  in build_evex_prefix()
3845 		+ i.tm.operand_types[op].bitfield.ymmword  in build_evex_prefix()
3846 		+ i.tm.operand_types[op].bitfield.zmmword > 1)  in build_evex_prefix()
3848 		if (i.types[op].bitfield.zmmword)  in build_evex_prefix()
3850 		    i.tm.opcode_modifier.evex = EVEX512;  in build_evex_prefix()
3853 		else if (i.types[op].bitfield.ymmword)  in build_evex_prefix()
3855 		    i.tm.opcode_modifier.evex = EVEX256;  in build_evex_prefix()
3858 		else if (i.types[op].bitfield.xmmword)  in build_evex_prefix()
3860 		    i.tm.opcode_modifier.evex = EVEX128;  in build_evex_prefix()
3863 		else if (i.broadcast && (int) op == i.broadcast->operand)  in build_evex_prefix()
3865 		    switch (i.broadcast->bytes)  in build_evex_prefix()
3868 			  i.tm.opcode_modifier.evex = EVEX512;  in build_evex_prefix()
3871 			  i.tm.opcode_modifier.evex = EVEX256;  in build_evex_prefix()
3874 			  i.tm.opcode_modifier.evex = EVEX128;  in build_evex_prefix()
3887       switch (i.tm.opcode_modifier.evex)  in build_evex_prefix()
3905       i.vex.bytes[3] |= vec_length;  in build_evex_prefix()
3907       if (i.broadcast)  in build_evex_prefix()
3908 	i.vex.bytes[3] |= 0x10;  in build_evex_prefix()
3912       if (i.rounding->type != saeonly)  in build_evex_prefix()
3913 	i.vex.bytes[3] |= 0x10 | (i.rounding->type << 5);  in build_evex_prefix()
3915 	i.vex.bytes[3] |= 0x10 | (evexrcig << 5);  in build_evex_prefix()
3918   if (i.mask && i.mask->mask)  in build_evex_prefix()
3919     i.vex.bytes[3] |= i.mask->mask->reg_num;  in build_evex_prefix()
3935   gas_assert (i.imm_operands <= 1  in process_immext()
3936 	      && (i.operands <= 2  in process_immext()
3937 		  || (is_any_vex_encoding (&i.tm)  in process_immext()
3938 		      && i.operands <= 4)));  in process_immext()
3940   exp = &im_expressions[i.imm_operands++];  in process_immext()
3941   i.op[i.operands].imms = exp;  in process_immext()
3942   i.types[i.operands] = imm8;  in process_immext()
3943   i.operands++;  in process_immext()
3945   exp->X_add_number = i.tm.extension_opcode;  in process_immext()
3946   i.tm.extension_opcode = None;  in process_immext()
3953   switch (i.tm.opcode_modifier.hleprefixok)  in check_hle()
3959 	      i.tm.name, i.hle_prefix);  in check_hle()
3962       if (i.prefix[LOCK_PREFIX])  in check_hle()
3964       as_bad (_("missing `lock' with `%s'"), i.hle_prefix);  in check_hle()
3969       if (i.prefix[HLE_PREFIX] != XRELEASE_PREFIX_OPCODE)  in check_hle()
3972 		  i.tm.name);  in check_hle()
3975       if (i.mem_operands == 0 || !(i.flags[i.operands - 1] & Operand_Mem))  in check_hle()
3978 		    " after `xrelease'"), i.tm.name);  in check_hle()
3993       && !is_any_vex_encoding (&i.tm)  in optimize_encoding()
3994       && i.reg_operands == 1  in optimize_encoding()
3995       && i.imm_operands == 1  in optimize_encoding()
3996       && !i.types[1].bitfield.byte  in optimize_encoding()
3997       && i.op[0].imms->X_op == O_constant  in optimize_encoding()
3998       && fits_in_imm7 (i.op[0].imms->X_add_number)  in optimize_encoding()
3999       && (i.tm.base_opcode == 0xa8  in optimize_encoding()
4000 	  || (i.tm.base_opcode == 0xf6  in optimize_encoding()
4001 	      && i.tm.extension_opcode == 0x0)))  in optimize_encoding()
4006       unsigned int base_regnum = i.op[1].regs->reg_num;  in optimize_encoding()
4009 	  i.types[1].bitfield.byte = 1;  in optimize_encoding()
4011 	  i.suffix = 0;  in optimize_encoding()
4013 	  if (i.types[1].bitfield.word)  in optimize_encoding()
4015 	  else if (i.types[1].bitfield.dword)  in optimize_encoding()
4019 	  if (!(i.op[1].regs->reg_flags & RegRex) && base_regnum < 4)  in optimize_encoding()
4021 	  i.op[1].regs -= j;  in optimize_encoding()
4025 	   && !is_any_vex_encoding (&i.tm)  in optimize_encoding()
4026 	   && ((i.types[1].bitfield.qword  in optimize_encoding()
4027 		&& i.reg_operands == 1  in optimize_encoding()
4028 		&& i.imm_operands == 1  in optimize_encoding()
4029 		&& i.op[0].imms->X_op == O_constant  in optimize_encoding()
4030 		&& ((i.tm.base_opcode == 0xb8  in optimize_encoding()
4031 		     && i.tm.extension_opcode == None  in optimize_encoding()
4032 		     && fits_in_unsigned_long (i.op[0].imms->X_add_number))  in optimize_encoding()
4033 		    || (fits_in_imm31 (i.op[0].imms->X_add_number)  in optimize_encoding()
4034 			&& ((i.tm.base_opcode == 0x24  in optimize_encoding()
4035 			     || i.tm.base_opcode == 0xa8)  in optimize_encoding()
4036 			    || (i.tm.base_opcode == 0x80  in optimize_encoding()
4037 				&& i.tm.extension_opcode == 0x4)  in optimize_encoding()
4038 			    || ((i.tm.base_opcode == 0xf6  in optimize_encoding()
4039 				 || (i.tm.base_opcode | 1) == 0xc7)  in optimize_encoding()
4040 				&& i.tm.extension_opcode == 0x0)))  in optimize_encoding()
4041 		    || (fits_in_imm7 (i.op[0].imms->X_add_number)  in optimize_encoding()
4042 			&& i.tm.base_opcode == 0x83  in optimize_encoding()
4043 			&& i.tm.extension_opcode == 0x4)))  in optimize_encoding()
4044 	       || (i.types[0].bitfield.qword  in optimize_encoding()
4045 		   && ((i.reg_operands == 2  in optimize_encoding()
4046 			&& i.op[0].regs == i.op[1].regs  in optimize_encoding()
4047 			&& (i.tm.base_opcode == 0x30  in optimize_encoding()
4048 			    || i.tm.base_opcode == 0x28))  in optimize_encoding()
4049 		       || (i.reg_operands == 1  in optimize_encoding()
4050 			   && i.operands == 1  in optimize_encoding()
4051 			   && i.tm.base_opcode == 0x30)))))  in optimize_encoding()
4062       i.tm.opcode_modifier.norex64 = 1;  in optimize_encoding()
4063       if (i.tm.base_opcode == 0xb8 || (i.tm.base_opcode | 1) == 0xc7)  in optimize_encoding()
4069 	  i.tm.operand_types[0].bitfield.imm32 = 1;  in optimize_encoding()
4070 	  i.tm.operand_types[0].bitfield.imm32s = 0;  in optimize_encoding()
4071 	  i.tm.operand_types[0].bitfield.imm64 = 0;  in optimize_encoding()
4072 	  i.types[0].bitfield.imm32 = 1;  in optimize_encoding()
4073 	  i.types[0].bitfield.imm32s = 0;  in optimize_encoding()
4074 	  i.types[0].bitfield.imm64 = 0;  in optimize_encoding()
4075 	  i.types[1].bitfield.dword = 1;  in optimize_encoding()
4076 	  i.types[1].bitfield.qword = 0;  in optimize_encoding()
4077 	  if ((i.tm.base_opcode | 1) == 0xc7)  in optimize_encoding()
4082 	      i.tm.base_opcode = 0xb8;  in optimize_encoding()
4083 	      i.tm.extension_opcode = None;  in optimize_encoding()
4084 	      i.tm.opcode_modifier.w = 0;  in optimize_encoding()
4085 	      i.tm.opcode_modifier.shortform = 1;  in optimize_encoding()
4086 	      i.tm.opcode_modifier.modrm = 0;  in optimize_encoding()
4092 	   && !is_any_vex_encoding (&i.tm)  in optimize_encoding()
4093 	   && i.reg_operands == 2  in optimize_encoding()
4094 	   && i.op[0].regs == i.op[1].regs  in optimize_encoding()
4095 	   && ((i.tm.base_opcode & ~(Opcode_D | 1)) == 0x8  in optimize_encoding()
4096 	       || (i.tm.base_opcode & ~(Opcode_D | 1)) == 0x20)  in optimize_encoding()
4097 	   && (flag_code != CODE_64BIT || !i.types[0].bitfield.dword))  in optimize_encoding()
4112       i.tm.base_opcode = 0x84 | (i.tm.base_opcode & 1);  in optimize_encoding()
4114   else if (i.reg_operands == 3  in optimize_encoding()
4115 	   && i.op[0].regs == i.op[1].regs  in optimize_encoding()
4116 	   && !i.types[2].bitfield.xmmword  in optimize_encoding()
4117 	   && (i.tm.opcode_modifier.vex  in optimize_encoding()
4118 	       || ((!i.mask || i.mask->zeroing)  in optimize_encoding()
4119 		   && !i.rounding  in optimize_encoding()
4120 		   && is_evex_encoding (&i.tm)  in optimize_encoding()
4121 		   && (i.vec_encoding != vex_encoding_evex  in optimize_encoding()
4123 		       || i.tm.cpu_flags.bitfield.cpuavx512vl  in optimize_encoding()
4124 		       || (i.tm.operand_types[2].bitfield.zmmword  in optimize_encoding()
4125 			   && i.types[2].bitfield.ymmword))))  in optimize_encoding()
4126 	   && ((i.tm.base_opcode == 0x55  in optimize_encoding()
4127 		|| i.tm.base_opcode == 0x6655  in optimize_encoding()
4128 		|| i.tm.base_opcode == 0x66df  in optimize_encoding()
4129 		|| i.tm.base_opcode == 0x57  in optimize_encoding()
4130 		|| i.tm.base_opcode == 0x6657  in optimize_encoding()
4131 		|| i.tm.base_opcode == 0x66ef  in optimize_encoding()
4132 		|| i.tm.base_opcode == 0x66f8  in optimize_encoding()
4133 		|| i.tm.base_opcode == 0x66f9  in optimize_encoding()
4134 		|| i.tm.base_opcode == 0x66fa  in optimize_encoding()
4135 		|| i.tm.base_opcode == 0x66fb  in optimize_encoding()
4136 		|| i.tm.base_opcode == 0x42  in optimize_encoding()
4137 		|| i.tm.base_opcode == 0x6642  in optimize_encoding()
4138 		|| i.tm.base_opcode == 0x47  in optimize_encoding()
4139 		|| i.tm.base_opcode == 0x6647)  in optimize_encoding()
4140 	       && i.tm.extension_opcode == None))  in optimize_encoding()
4177       if (is_evex_encoding (&i.tm))  in optimize_encoding()
4179 	  if (i.vec_encoding != vex_encoding_evex)  in optimize_encoding()
4181 	      i.tm.opcode_modifier.vex = VEX128;  in optimize_encoding()
4182 	      i.tm.opcode_modifier.vexw = VEXW0;  in optimize_encoding()
4183 	      i.tm.opcode_modifier.evex = 0;  in optimize_encoding()
4186 	    i.tm.opcode_modifier.evex = EVEX128;  in optimize_encoding()
4190       else if (i.tm.operand_types[0].bitfield.class == RegMask)  in optimize_encoding()
4192 	  i.tm.base_opcode &= 0xff;  in optimize_encoding()
4193 	  i.tm.opcode_modifier.vexw = VEXW0;  in optimize_encoding()
4196 	i.tm.opcode_modifier.vex = VEX128;  in optimize_encoding()
4198       if (i.tm.opcode_modifier.vex)  in optimize_encoding()
4201 	    i.types[j].bitfield.xmmword = 1;  in optimize_encoding()
4202 	    i.types[j].bitfield.ymmword = 0;  in optimize_encoding()
4205   else if (i.vec_encoding != vex_encoding_evex  in optimize_encoding()
4206 	   && !i.types[0].bitfield.zmmword  in optimize_encoding()
4207 	   && !i.types[1].bitfield.zmmword  in optimize_encoding()
4208 	   && !i.mask  in optimize_encoding()
4209 	   && !i.broadcast  in optimize_encoding()
4210 	   && is_evex_encoding (&i.tm)  in optimize_encoding()
4211 	   && ((i.tm.base_opcode & ~Opcode_SIMD_IntD) == 0x666f  in optimize_encoding()
4212 	       || (i.tm.base_opcode & ~Opcode_SIMD_IntD) == 0xf36f  in optimize_encoding()
4213 	       || (i.tm.base_opcode & ~Opcode_SIMD_IntD) == 0xf26f  in optimize_encoding()
4214 	       || (i.tm.base_opcode & ~4) == 0x66db  in optimize_encoding()
4215 	       || (i.tm.base_opcode & ~4) == 0x66eb)  in optimize_encoding()
4216 	   && i.tm.extension_opcode == None)  in optimize_encoding()
4243       for (j = 0; j < i.operands; j++)  in optimize_encoding()
4244 	if (operand_type_check (i.types[j], disp)  in optimize_encoding()
4245 	    && i.op[j].disps->X_op == O_constant)  in optimize_encoding()
4251 	    unsigned int memshift = i.memshift;  in optimize_encoding()
4252 	    offsetT n = i.op[j].disps->X_add_number;  in optimize_encoding()
4255 	    i.memshift = 0;  in optimize_encoding()
4259 		i.memshift = memshift;  in optimize_encoding()
4263 	    i.types[j].bitfield.disp8 = vex_disp8;  in optimize_encoding()
4266       if ((i.tm.base_opcode & ~Opcode_SIMD_IntD) == 0xf26f)  in optimize_encoding()
4267 	i.tm.base_opcode ^= 0xf36f ^ 0xf26f;  in optimize_encoding()
4268       i.tm.opcode_modifier.vex  in optimize_encoding()
4269 	= i.types[0].bitfield.ymmword ? VEX256 : VEX128;  in optimize_encoding()
4270       i.tm.opcode_modifier.vexw = VEXW0;  in optimize_encoding()
4272       if (i.reg_operands == 3 && i.tm.base_opcode != 0x66df)  in optimize_encoding()
4273 	i.tm.opcode_modifier.commutative = 1;  in optimize_encoding()
4274       i.tm.opcode_modifier.evex = 0;  in optimize_encoding()
4275       i.tm.opcode_modifier.masking = 0;  in optimize_encoding()
4276       i.tm.opcode_modifier.broadcast = 0;  in optimize_encoding()
4277       i.tm.opcode_modifier.disp8memshift = 0;  in optimize_encoding()
4278       i.memshift = 0;  in optimize_encoding()
4279       if (j < i.operands)  in optimize_encoding()
4280 	i.types[j].bitfield.disp8  in optimize_encoding()
4281 	  = fits_in_disp8 (i.op[j].disps->X_add_number);  in optimize_encoding()
4297   memset (&i, '\0', sizeof (i));  in md_assemble()
4299     i.reloc[j] = NO_RELOC;  in md_assemble()
4311   mnem_suffix = i.suffix;  in md_assemble()
4315   xfree (i.memop1_string);  in md_assemble()
4316   i.memop1_string = NULL;  in md_assemble()
4328       && i.operands > 1  in md_assemble()
4331       && !(operand_type_check (i.types[0], imm)  in md_assemble()
4332 	   && operand_type_check (i.types[1], imm)))  in md_assemble()
4337   if (i.imm_operands == 2  in md_assemble()
4342   if (i.imm_operands)  in md_assemble()
4347   if (i.disp_operands  in md_assemble()
4348       && i.disp_encoding != disp_encoding_32bit  in md_assemble()
4361       && !i.tm.opcode_modifier.noavx  in md_assemble()
4362       && !i.tm.cpu_flags.bitfield.cpuavx  in md_assemble()
4363       && !i.tm.cpu_flags.bitfield.cpuavx512f  in md_assemble()
4364       && (i.tm.cpu_flags.bitfield.cpusse  in md_assemble()
4365 	  || i.tm.cpu_flags.bitfield.cpusse2  in md_assemble()
4366 	  || i.tm.cpu_flags.bitfield.cpusse3  in md_assemble()
4367 	  || i.tm.cpu_flags.bitfield.cpussse3  in md_assemble()
4368 	  || i.tm.cpu_flags.bitfield.cpusse4_1  in md_assemble()
4369 	  || i.tm.cpu_flags.bitfield.cpusse4_2  in md_assemble()
4370 	  || i.tm.cpu_flags.bitfield.cpusse4a  in md_assemble()
4371 	  || i.tm.cpu_flags.bitfield.cpupclmul  in md_assemble()
4372 	  || i.tm.cpu_flags.bitfield.cpuaes  in md_assemble()
4373 	  || i.tm.cpu_flags.bitfield.cpusha  in md_assemble()
4374 	  || i.tm.cpu_flags.bitfield.cpugfni))  in md_assemble()
4378        : as_bad) (_("SSE instruction `%s' is used"), i.tm.name);  in md_assemble()
4385   if ((i.tm.base_opcode & ~9) == 0x0fb6)  in md_assemble()
4389       if (i.reg_operands != 2  in md_assemble()
4390 	  && !i.suffix  in md_assemble()
4392 	as_bad (_("ambiguous operand size for `%s'"), i.tm.name);  in md_assemble()
4394       i.suffix = 0;  in md_assemble()
4397   if (i.tm.opcode_modifier.fwait)  in md_assemble()
4402   if (i.rep_prefix && !i.tm.opcode_modifier.repprefixok)  in md_assemble()
4405 		i.tm.name, i.rep_prefix);  in md_assemble()
4411   if (i.prefix[LOCK_PREFIX]  in md_assemble()
4412       && (!i.tm.opcode_modifier.islockable  in md_assemble()
4413 	  || i.mem_operands == 0  in md_assemble()
4414 	  || (i.tm.base_opcode != 0x86  in md_assemble()
4415 	      && !(i.flags[i.operands - 1] & Operand_Mem))))  in md_assemble()
4422   if (i.prefix[DATA_PREFIX] && is_any_vex_encoding (&i.tm))  in md_assemble()
4424       as_bad (_("data size prefix invalid with `%s'"), i.tm.name);  in md_assemble()
4429   if (i.hle_prefix && !check_hle ())  in md_assemble()
4433   if (i.bnd_prefix && !i.tm.opcode_modifier.bndprefixok)  in md_assemble()
4437   if (i.notrack_prefix && !i.tm.opcode_modifier.notrackprefixok)  in md_assemble()
4440   if (i.tm.cpu_flags.bitfield.cpumpx)  in md_assemble()
4442       if (flag_code == CODE_64BIT && i.prefix[ADDR_PREFIX])  in md_assemble()
4445 	       ? i.prefix[ADDR_PREFIX]  in md_assemble()
4446 	       : i.mem_operands && !i.prefix[ADDR_PREFIX])  in md_assemble()
4451   if (add_bnd_prefix && i.tm.opcode_modifier.bndprefixok)  in md_assemble()
4453       if (!i.prefix[BND_PREFIX])  in md_assemble()
4455       else if (i.prefix[BND_PREFIX] != BND_PREFIX_OPCODE)  in md_assemble()
4458 	  i.prefix[BND_PREFIX] = BND_PREFIX_OPCODE;  in md_assemble()
4463   if (i.tm.opcode_modifier.isstring >= IS_STRING_ES_OP0)  in md_assemble()
4465       gas_assert (i.mem_operands);  in md_assemble()
4468       i.disp_operands = 0;  in md_assemble()
4471   if (optimize && !i.no_optimize && i.tm.opcode_modifier.optimize)  in md_assemble()
4478   for (j = 0; j < i.operands; j++)  in md_assemble()
4479     i.types[j] = operand_type_and (i.types[j], i.tm.operand_types[j]);  in md_assemble()
4486   if (i.types[0].bitfield.imm1)  in md_assemble()
4487     i.imm_operands = 0;	/* kludge for shift insns.  */  in md_assemble()
4491   if (i.operands <= 3)  in md_assemble()
4492     for (j = 0; j < i.operands; j++)  in md_assemble()
4493       if (i.types[j].bitfield.instance != InstanceNone  in md_assemble()
4494 	  && !i.types[j].bitfield.xmmword)  in md_assemble()
4495 	i.reg_operands--;  in md_assemble()
4498   if (!i.tm.opcode_modifier.sse2avx  in md_assemble()
4499       && i.tm.opcode_modifier.immext)  in md_assemble()
4503   if (i.operands)  in md_assemble()
4508   else if (!quiet_warnings && i.tm.opcode_modifier.ugh)  in md_assemble()
4511       as_warn (_("translating to `%sp'"), i.tm.name);  in md_assemble()
4514   if (is_any_vex_encoding (&i.tm))  in md_assemble()
4519 		  i.tm.name);  in md_assemble()
4523       if (i.tm.opcode_modifier.vex)  in md_assemble()
4532   if (i.tm.base_opcode == INT_OPCODE  in md_assemble()
4533       && !i.tm.opcode_modifier.modrm  in md_assemble()
4534       && i.op[0].imms->X_add_number == 3)  in md_assemble()
4536       i.tm.base_opcode = INT3_OPCODE;  in md_assemble()
4537       i.imm_operands = 0;  in md_assemble()
4540   if ((i.tm.opcode_modifier.jump == JUMP  in md_assemble()
4541        || i.tm.opcode_modifier.jump == JUMP_BYTE  in md_assemble()
4542        || i.tm.opcode_modifier.jump == JUMP_DWORD)  in md_assemble()
4543       && i.op[0].disps->X_op == O_constant)  in md_assemble()
4548       i.op[0].disps->X_add_symbol = &abs_symbol;  in md_assemble()
4549       i.op[0].disps->X_op = O_symbol;  in md_assemble()
4552   if (i.tm.opcode_modifier.rex64)  in md_assemble()
4553     i.rex |= REX_W;  in md_assemble()
4559   if ((i.types[0].bitfield.class == Reg && i.types[0].bitfield.byte  in md_assemble()
4560        && (i.op[0].regs->reg_flags & RegRex64) != 0)  in md_assemble()
4561       || (i.types[1].bitfield.class == Reg && i.types[1].bitfield.byte  in md_assemble()
4562 	  && (i.op[1].regs->reg_flags & RegRex64) != 0)  in md_assemble()
4563       || (((i.types[0].bitfield.class == Reg && i.types[0].bitfield.byte)  in md_assemble()
4564 	   || (i.types[1].bitfield.class == Reg && i.types[1].bitfield.byte))  in md_assemble()
4565 	  && i.rex != 0))  in md_assemble()
4569       i.rex |= REX_OPCODE;  in md_assemble()
4573 	  if (i.types[x].bitfield.class == Reg && i.types[x].bitfield.byte  in md_assemble()
4574 	      && (i.op[x].regs->reg_flags & RegRex64) == 0)  in md_assemble()
4576 	      gas_assert (!(i.op[x].regs->reg_flags & RegRex));  in md_assemble()
4578 	      if (i.op[x].regs->reg_num > 3)  in md_assemble()
4581 			register_prefix, i.op[x].regs->reg_name);  in md_assemble()
4587 	      i.op[x].regs = i.op[x].regs + 8;  in md_assemble()
4592   if (i.rex == 0 && i.rex_encoding)  in md_assemble()
4599 	if (i.types[x].bitfield.class == Reg  in md_assemble()
4600 	    && i.types[x].bitfield.byte  in md_assemble()
4601 	    && (i.op[x].regs->reg_flags & RegRex64) == 0  in md_assemble()
4602 	    && i.op[x].regs->reg_num > 3)  in md_assemble()
4604 	    gas_assert (!(i.op[x].regs->reg_flags & RegRex));  in md_assemble()
4605 	    i.rex_encoding = FALSE;  in md_assemble()
4609       if (i.rex_encoding)  in md_assemble()
4610 	i.rex = REX_OPCODE;  in md_assemble()
4613   if (i.rex != 0)  in md_assemble()
4614     add_prefix (REX_OPCODE | i.rex);  in md_assemble()
4621   if (i.tm.opcode_modifier.isprefix)  in md_assemble()
4624       last_insn.name = i.tm.name;  in md_assemble()
4710 		  i.disp_encoding = disp_encoding_8bit;  in parse_insn()
4714 		  i.disp_encoding = disp_encoding_32bit;  in parse_insn()
4718 		  i.dir_encoding = dir_encoding_load;  in parse_insn()
4722 		  i.dir_encoding = dir_encoding_store;  in parse_insn()
4726 		  i.vec_encoding = vex_encoding_vex;  in parse_insn()
4730 		  i.vec_encoding = vex_encoding_vex3;  in parse_insn()
4734 		  i.vec_encoding = vex_encoding_evex;  in parse_insn()
4738 		  i.rex_encoding = TRUE;  in parse_insn()
4742 		  i.no_optimize = TRUE;  in parse_insn()
4757 		    i.notrack_prefix = current_templates->start->name;  in parse_insn()
4761 		    i.hle_prefix = current_templates->start->name;  in parse_insn()
4763 		    i.bnd_prefix = current_templates->start->name;  in parse_insn()
4765 		    i.rep_prefix = current_templates->start->name;  in parse_insn()
4784 	i.dir_encoding = dir_encoding_swap;  in parse_insn()
4788 	i.disp_encoding = disp_encoding_8bit;  in parse_insn()
4793 	i.disp_encoding = disp_encoding_32bit;  in parse_insn()
4811 		i.suffix = SHORT_MNEM_SUFFIX;  in parse_insn()
4816 		i.suffix = mnem_p[-1];  in parse_insn()
4825 		  i.suffix = mnem_p[-1];  in parse_insn()
4837 		    i.suffix = SHORT_MNEM_SUFFIX;  in parse_insn()
4839 		    i.suffix = LONG_MNEM_SUFFIX;  in parse_insn()
4936 		  i.operands + 1);  in parse_operands()
4949 			    i.operands + 1);  in parse_operands()
4952 			    i.operands + 1);  in parse_operands()
4962 		      i.operands + 1);  in parse_operands()
4984 	  this_operand = i.operands++;  in parse_operands()
4985 	  if (i.operands > MAX_OPERANDS)  in parse_operands()
4991 	  i.types[this_operand].bitfield.unspecified = 1;  in parse_operands()
4995 	  if (i.mem_operands > 1)  in parse_operands()
5050   temp_type = i.types[xchg2];  in swap_2_operands()
5051   i.types[xchg2] = i.types[xchg1];  in swap_2_operands()
5052   i.types[xchg1] = temp_type;  in swap_2_operands()
5054   temp_flags = i.flags[xchg2];  in swap_2_operands()
5055   i.flags[xchg2] = i.flags[xchg1];  in swap_2_operands()
5056   i.flags[xchg1] = temp_flags;  in swap_2_operands()
5058   temp_op = i.op[xchg2];  in swap_2_operands()
5059   i.op[xchg2] = i.op[xchg1];  in swap_2_operands()
5060   i.op[xchg1] = temp_op;  in swap_2_operands()
5062   temp_reloc = i.reloc[xchg2];  in swap_2_operands()
5063   i.reloc[xchg2] = i.reloc[xchg1];  in swap_2_operands()
5064   i.reloc[xchg1] = temp_reloc;  in swap_2_operands()
5066   if (i.mask)  in swap_2_operands()
5068       if (i.mask->operand == xchg1)  in swap_2_operands()
5069 	i.mask->operand = xchg2;  in swap_2_operands()
5070       else if (i.mask->operand == xchg2)  in swap_2_operands()
5071 	i.mask->operand = xchg1;  in swap_2_operands()
5073   if (i.broadcast)  in swap_2_operands()
5075       if (i.broadcast->operand == xchg1)  in swap_2_operands()
5076 	i.broadcast->operand = xchg2;  in swap_2_operands()
5077       else if (i.broadcast->operand == xchg2)  in swap_2_operands()
5078 	i.broadcast->operand = xchg1;  in swap_2_operands()
5080   if (i.rounding)  in swap_2_operands()
5082       if (i.rounding->operand == xchg1)  in swap_2_operands()
5083 	i.rounding->operand = xchg2;  in swap_2_operands()
5084       else if (i.rounding->operand == xchg2)  in swap_2_operands()
5085 	i.rounding->operand = xchg1;  in swap_2_operands()
5092   switch (i.operands)  in swap_operands()
5096       swap_2_operands (1, i.operands - 2);  in swap_operands()
5100       swap_2_operands (0, i.operands - 1);  in swap_operands()
5106   if (i.mem_operands == 2)  in swap_operands()
5109       temp_seg = i.seg[0];  in swap_operands()
5110       i.seg[0] = i.seg[1];  in swap_operands()
5111       i.seg[1] = temp_seg;  in swap_operands()
5123   if (i.suffix)  in optimize_imm()
5124     guess_suffix = i.suffix;  in optimize_imm()
5125   else if (i.reg_operands)  in optimize_imm()
5131       for (op = i.operands; --op >= 0;)  in optimize_imm()
5132 	if (i.types[op].bitfield.class != Reg)  in optimize_imm()
5134 	else if (i.types[op].bitfield.byte)  in optimize_imm()
5139 	else if (i.types[op].bitfield.word)  in optimize_imm()
5144 	else if (i.types[op].bitfield.dword)  in optimize_imm()
5149 	else if (i.types[op].bitfield.qword)  in optimize_imm()
5155   else if ((flag_code == CODE_16BIT) ^ (i.prefix[DATA_PREFIX] != 0))  in optimize_imm()
5158   for (op = i.operands; --op >= 0;)  in optimize_imm()
5159     if (operand_type_check (i.types[op], imm))  in optimize_imm()
5161 	switch (i.op[op].imms->X_op)  in optimize_imm()
5168 		i.types[op].bitfield.imm32 = 1;  in optimize_imm()
5169 		i.types[op].bitfield.imm64 = 1;  in optimize_imm()
5172 		i.types[op].bitfield.imm16 = 1;  in optimize_imm()
5173 		i.types[op].bitfield.imm32 = 1;  in optimize_imm()
5174 		i.types[op].bitfield.imm32s = 1;  in optimize_imm()
5175 		i.types[op].bitfield.imm64 = 1;  in optimize_imm()
5178 		i.types[op].bitfield.imm8 = 1;  in optimize_imm()
5179 		i.types[op].bitfield.imm8s = 1;  in optimize_imm()
5180 		i.types[op].bitfield.imm16 = 1;  in optimize_imm()
5181 		i.types[op].bitfield.imm32 = 1;  in optimize_imm()
5182 		i.types[op].bitfield.imm32s = 1;  in optimize_imm()
5183 		i.types[op].bitfield.imm64 = 1;  in optimize_imm()
5192 	    if ((i.types[op].bitfield.imm16)  in optimize_imm()
5193 		&& (i.op[op].imms->X_add_number & ~(offsetT) 0xffff) == 0)  in optimize_imm()
5195 		i.op[op].imms->X_add_number =  in optimize_imm()
5196 		  (((i.op[op].imms->X_add_number & 0xffff) ^ 0x8000) - 0x8000);  in optimize_imm()
5200 	    if ((i.types[op].bitfield.imm32)  in optimize_imm()
5201 		&& ((i.op[op].imms->X_add_number & ~(((offsetT) 2 << 31) - 1))  in optimize_imm()
5204 		i.op[op].imms->X_add_number = ((i.op[op].imms->X_add_number  in optimize_imm()
5209 	    i.types[op]  in optimize_imm()
5210 	      = operand_type_or (i.types[op],  in optimize_imm()
5211 				 smallest_imm_type (i.op[op].imms->X_add_number));  in optimize_imm()
5216 	      i.types[op].bitfield.imm32 = 0;  in optimize_imm()
5262 		i.types[op] = operand_type_and (i.types[op], mask);  in optimize_imm()
5275   for (op = i.operands; --op >= 0;)  in optimize_disp()
5276     if (operand_type_check (i.types[op], disp))  in optimize_disp()
5278 	if (i.op[op].disps->X_op == O_constant)  in optimize_disp()
5280 	    offsetT op_disp = i.op[op].disps->X_add_number;  in optimize_disp()
5282 	    if (i.types[op].bitfield.disp16  in optimize_disp()
5289 		i.types[op].bitfield.disp64 = 0;  in optimize_disp()
5293 	    if (i.types[op].bitfield.disp32  in optimize_disp()
5301 		i.types[op].bitfield.disp64 = 0;  in optimize_disp()
5304 	    if (!op_disp && i.types[op].bitfield.baseindex)  in optimize_disp()
5306 		i.types[op].bitfield.disp8 = 0;  in optimize_disp()
5307 		i.types[op].bitfield.disp16 = 0;  in optimize_disp()
5308 		i.types[op].bitfield.disp32 = 0;  in optimize_disp()
5309 		i.types[op].bitfield.disp32s = 0;  in optimize_disp()
5310 		i.types[op].bitfield.disp64 = 0;  in optimize_disp()
5311 		i.op[op].disps = 0;  in optimize_disp()
5312 		i.disp_operands--;  in optimize_disp()
5318 		    i.types[op].bitfield.disp64 = 0;  in optimize_disp()
5319 		    i.types[op].bitfield.disp32s = 1;  in optimize_disp()
5321 		if (i.prefix[ADDR_PREFIX]  in optimize_disp()
5323 		  i.types[op].bitfield.disp32 = 1;  in optimize_disp()
5325 	    if ((i.types[op].bitfield.disp32  in optimize_disp()
5326 		 || i.types[op].bitfield.disp32s  in optimize_disp()
5327 		 || i.types[op].bitfield.disp16)  in optimize_disp()
5329 	      i.types[op].bitfield.disp8 = 1;  in optimize_disp()
5331 	else if (i.reloc[op] == BFD_RELOC_386_TLS_DESC_CALL  in optimize_disp()
5332 		 || i.reloc[op] == BFD_RELOC_X86_64_TLSDESC_CALL)  in optimize_disp()
5335 			 i.op[op].disps, 0, i.reloc[op]);  in optimize_disp()
5336 	    i.types[op].bitfield.disp8 = 0;  in optimize_disp()
5337 	    i.types[op].bitfield.disp16 = 0;  in optimize_disp()
5338 	    i.types[op].bitfield.disp32 = 0;  in optimize_disp()
5339 	    i.types[op].bitfield.disp32s = 0;  in optimize_disp()
5340 	    i.types[op].bitfield.disp64 = 0;  in optimize_disp()
5344 	  i.types[op].bitfield.disp64 = 0;  in optimize_disp()
5355 	   && i.types[given].bitfield.byte)  in match_broadcast_size()
5357 	      && i.types[given].bitfield.word)  in match_broadcast_size()
5359 	      && i.types[given].bitfield.dword)  in match_broadcast_size()
5361 	      && i.types[given].bitfield.qword));  in match_broadcast_size()
5386 	      && (i.types[op].bitfield.ymmword  in check_VecOperands()
5387 		  || i.types[op].bitfield.xmmword))  in check_VecOperands()
5389 	      i.error = unsupported;  in check_VecOperands()
5397       && i.index_reg  in check_VecOperands()
5398       && (i.index_reg->reg_type.bitfield.xmmword  in check_VecOperands()
5399 	  || i.index_reg->reg_type.bitfield.ymmword  in check_VecOperands()
5400 	  || i.index_reg->reg_type.bitfield.zmmword))  in check_VecOperands()
5402       i.error = unsupported_vector_index_register;  in check_VecOperands()
5408       && (!i.mask || i.mask->mask->reg_num == 0))  in check_VecOperands()
5410       i.error = no_default_mask;  in check_VecOperands()
5418       if (!i.index_reg  in check_VecOperands()
5420 		&& i.index_reg->reg_type.bitfield.xmmword)  in check_VecOperands()
5422 		   && i.index_reg->reg_type.bitfield.ymmword)  in check_VecOperands()
5424 		   && i.index_reg->reg_type.bitfield.zmmword)))  in check_VecOperands()
5426 	i.error = invalid_vsib_address;  in check_VecOperands()
5430       gas_assert (i.reg_operands == 2 || i.mask);  in check_VecOperands()
5431       if (i.reg_operands == 2 && !i.mask)  in check_VecOperands()
5433 	  gas_assert (i.types[0].bitfield.class == RegSIMD);  in check_VecOperands()
5434 	  gas_assert (i.types[0].bitfield.xmmword  in check_VecOperands()
5435 		      || i.types[0].bitfield.ymmword);  in check_VecOperands()
5436 	  gas_assert (i.types[2].bitfield.class == RegSIMD);  in check_VecOperands()
5437 	  gas_assert (i.types[2].bitfield.xmmword  in check_VecOperands()
5438 		      || i.types[2].bitfield.ymmword);  in check_VecOperands()
5441 	  if (register_number (i.op[0].regs)  in check_VecOperands()
5442 	      != register_number (i.index_reg)  in check_VecOperands()
5443 	      && register_number (i.op[2].regs)  in check_VecOperands()
5444 		 != register_number (i.index_reg)  in check_VecOperands()
5445 	      && register_number (i.op[0].regs)  in check_VecOperands()
5446 		 != register_number (i.op[2].regs))  in check_VecOperands()
5450 	      i.error = invalid_vector_register_set;  in check_VecOperands()
5455       else if (i.reg_operands == 1 && i.mask)  in check_VecOperands()
5457 	  if (i.types[1].bitfield.class == RegSIMD  in check_VecOperands()
5458 	      && (i.types[1].bitfield.xmmword  in check_VecOperands()
5459 	          || i.types[1].bitfield.ymmword  in check_VecOperands()
5460 	          || i.types[1].bitfield.zmmword)  in check_VecOperands()
5461 	      && (register_number (i.op[1].regs)  in check_VecOperands()
5462 		  == register_number (i.index_reg)))  in check_VecOperands()
5466 		  i.error = invalid_vector_register_set;  in check_VecOperands()
5477   if (i.broadcast)  in check_VecOperands()
5483       op = i.broadcast->operand;  in check_VecOperands()
5485 	  || !(i.flags[op] & Operand_Mem)  in check_VecOperands()
5486 	  || (!i.types[op].bitfield.unspecified  in check_VecOperands()
5490 	  i.error = unsupported_broadcast;  in check_VecOperands()
5494       i.broadcast->bytes = ((1 << (t->opcode_modifier.broadcast - 1))  in check_VecOperands()
5495 			    * i.broadcast->type);  in check_VecOperands()
5497       switch (i.broadcast->bytes)  in check_VecOperands()
5530 	  for (j = 0; j < i.operands; ++j)  in check_VecOperands()
5533 		  && !operand_type_register_match(i.types[j],  in check_VecOperands()
5543   else if (t->opcode_modifier.broadcast && i.mem_operands)  in check_VecOperands()
5546       for (op = 0; op < i.operands; op++)  in check_VecOperands()
5547 	if (i.flags[op] & Operand_Mem)  in check_VecOperands()
5549       gas_assert (op < i.operands);  in check_VecOperands()
5553 	  i.error = broadcast_needed;  in check_VecOperands()
5561   if (i.mask)  in check_VecOperands()
5568 	  if (i.mask->zeroing)  in check_VecOperands()
5571 	      i.error = unsupported_masking;  in check_VecOperands()
5577 	  if (i.mask->zeroing && i.mem_operands)  in check_VecOperands()
5580 	      for (op = 0; op < i.operands; op++)  in check_VecOperands()
5581 		if (i.flags[op] & Operand_Mem)  in check_VecOperands()
5583 	      gas_assert (op < i.operands);  in check_VecOperands()
5584 	      if (op == i.operands - 1)  in check_VecOperands()
5586 		  i.error = unsupported_masking;  in check_VecOperands()
5597   if (i.mask && (i.mask->operand != (int) (i.operands - 1)))  in check_VecOperands()
5599       i.error = mask_not_on_destination;  in check_VecOperands()
5604   if (i.rounding)  in check_VecOperands()
5607 	  || (i.rounding->type != saeonly && !t->opcode_modifier.staticrounding))  in check_VecOperands()
5609 	  i.error = unsupported_rc_sae;  in check_VecOperands()
5615       if (i.imm_operands > 1  in check_VecOperands()
5616 	  && i.rounding->operand != (int) (i.imm_operands - 1))  in check_VecOperands()
5618 	  i.error = rc_sae_operand_not_last_imm;  in check_VecOperands()
5625       && i.disp_encoding != disp_encoding_32bit)  in check_VecOperands()
5627       if (i.broadcast)  in check_VecOperands()
5628 	i.memshift = t->opcode_modifier.broadcast - 1;  in check_VecOperands()
5630 	i.memshift = t->opcode_modifier.disp8memshift;  in check_VecOperands()
5635 	  i.memshift = 0;  in check_VecOperands()
5636 	  for (op = 0; op < i.operands; op++)  in check_VecOperands()
5637 	    if (i.flags[op] & Operand_Mem)  in check_VecOperands()
5640 		  i.memshift = 2 + (i.suffix == QWORD_MNEM_SUFFIX);  in check_VecOperands()
5645 		else if (!i.types[op].bitfield.unspecified)  in check_VecOperands()
5646 		  type = &i.types[op];  in check_VecOperands()
5648 	    else if (i.types[op].bitfield.class == RegSIMD  in check_VecOperands()
5651 		if (i.types[op].bitfield.zmmword)  in check_VecOperands()
5652 		  i.memshift = 6;  in check_VecOperands()
5653 		else if (i.types[op].bitfield.ymmword && i.memshift < 5)  in check_VecOperands()
5654 		  i.memshift = 5;  in check_VecOperands()
5655 		else if (i.types[op].bitfield.xmmword && i.memshift < 4)  in check_VecOperands()
5656 		  i.memshift = 4;  in check_VecOperands()
5662 		i.memshift = 6;  in check_VecOperands()
5664 		i.memshift = 5;  in check_VecOperands()
5666 		i.memshift = 4;  in check_VecOperands()
5670 	  if (i.memshift == 0)  in check_VecOperands()
5671 	    i.memshift = -1;  in check_VecOperands()
5674       for (op = 0; op < i.operands; op++)  in check_VecOperands()
5675 	if (operand_type_check (i.types[op], disp)  in check_VecOperands()
5676 	    && i.op[op].disps->X_op == O_constant)  in check_VecOperands()
5678 	    if (fits_in_disp8 (i.op[op].disps->X_add_number))  in check_VecOperands()
5680 		i.types[op].bitfield.disp8 = 1;  in check_VecOperands()
5683 	    i.types[op].bitfield.disp8 = 0;  in check_VecOperands()
5687   i.memshift = 0;  in check_VecOperands()
5698   if (i.vec_encoding == vex_encoding_evex)  in VEX_check_operands()
5703 	  i.error = unsupported;  in VEX_check_operands()
5712       if (i.vec_encoding != vex_encoding_default)  in VEX_check_operands()
5714 	  i.error = unsupported;  in VEX_check_operands()
5723       if (i.op[0].imms->X_op != O_constant  in VEX_check_operands()
5724 	  || !fits_in_imm4 (i.op[0].imms->X_add_number))  in VEX_check_operands()
5726 	  i.error = bad_imm4;  in VEX_check_operands()
5731       operand_type_set (&i.types[0], 0);  in VEX_check_operands()
5783       if (i.suffix == LONG_DOUBLE_MNEM_SUFFIX)  in match_template()
5788   i.error = number_of_operands_mismatch;  in match_template()
5795       if (i.operands != t->operands)  in match_template()
5799       i.error = unsupported;  in match_template()
5804       i.error = unsupported_with_intel_mnemonic;  in match_template()
5809       i.error = unsupported_syntax;  in match_template()
5817       i.error = invalid_instruction_suffix;  in match_template()
5836       if (i.jumpabsolute && t->opcode_modifier.jump != JUMP_ABSOLUTE)  in match_template()
5838 	  i.error = operand_type_mismatch;  in match_template()
5846       if (i.suffix == QWORD_MNEM_SUFFIX  in match_template()
5862       else if (i.suffix == LONG_MNEM_SUFFIX  in match_template()
5892 	      bfd_boolean override = (i.prefix[ADDR_PREFIX] != 0);  in match_template()
5929       if (i.reloc[0] == BFD_RELOC_386_GOT32 && t->base_opcode == 0xa0)  in match_template()
5936 	  if (i.broadcast)  in match_template()
5937 	    check_register &= ~(1 << i.broadcast->operand);  in match_template()
5942       overlap0 = operand_type_and (i.types[0], operand_types[0]);  in match_template()
5946 	  if (!operand_type_match (overlap0, i.types[0]))  in match_template()
5956 	      && i.types[0].bitfield.instance == Accum  in match_template()
5957 	      && i.types[0].bitfield.dword  in match_template()
5958 	      && i.types[1].bitfield.instance == Accum  in match_template()
5959 	      && i.types[1].bitfield.dword)  in match_template()
5964 	      && i.hle_prefix  in match_template()
5966 	      && i.types[0].bitfield.instance == Accum  in match_template()
5967 	      && (i.flags[1] & Operand_Mem))  in match_template()
5980 	  if (t->opcode_modifier.d && i.reg_operands == i.operands  in match_template()
5982 	    switch (i.dir_encoding)  in match_template()
5985 		if (operand_type_check (operand_types[i.operands - 1], anymem)  in match_template()
5991 		if (!operand_type_check (operand_types[i.operands - 1], anymem)  in match_template()
6003 	  if ((i.dir_encoding == dir_encoding_store  in match_template()
6004 	       || i.dir_encoding == dir_encoding_swap)  in match_template()
6005 	      && i.mem_operands == 0  in match_template()
6011 	  overlap1 = operand_type_and (i.types[1], operand_types[1]);  in match_template()
6012 	  if (!operand_type_match (overlap0, i.types[0])  in match_template()
6013 	      || !operand_type_match (overlap1, i.types[1])  in match_template()
6015 		  && !operand_type_register_match (i.types[0],  in match_template()
6017 						   i.types[1],  in match_template()
6028 	      overlap0 = operand_type_and (i.types[0], operand_types[i.operands - 1]);  in match_template()
6029 	      overlap1 = operand_type_and (i.types[i.operands - 1], operand_types[0]);  in match_template()
6030 	      if (!operand_type_match (overlap0, i.types[0])  in match_template()
6031 		  || !operand_type_match (overlap1, i.types[i.operands - 1])  in match_template()
6033 		      && !operand_type_register_match (i.types[0],  in match_template()
6034 						       operand_types[i.operands - 1],  in match_template()
6035 						       i.types[i.operands - 1],  in match_template()
6048 		       || operand_types[i.operands - 1].bitfield.xmmword  in match_template()
6050 		       || operand_types[i.operands - 1].bitfield.class == RegMMX  in match_template()
6065 		  overlap4 = operand_type_and (i.types[4],  in match_template()
6069 		  overlap3 = operand_type_and (i.types[3],  in match_template()
6073 		  overlap2 = operand_type_and (i.types[2],  in match_template()
6081 		  if (!operand_type_match (overlap4, i.types[4])  in match_template()
6082 		      || !operand_type_register_match (i.types[3],  in match_template()
6084 						       i.types[4],  in match_template()
6089 		  if (!operand_type_match (overlap3, i.types[3])  in match_template()
6091 			  && !operand_type_register_match (i.types[1],  in match_template()
6093 							    i.types[3],  in match_template()
6096 			  && !operand_type_register_match (i.types[2],  in match_template()
6098 							    i.types[3],  in match_template()
6105 		  if (!operand_type_match (overlap2, i.types[2])  in match_template()
6107 			  && !operand_type_register_match (i.types[0],  in match_template()
6109 							    i.types[2],  in match_template()
6112 			  && !operand_type_register_match (i.types[1],  in match_template()
6114 							    i.types[2],  in match_template()
6127 	  specific_error = i.error;  in match_template()
6139       switch (specific_error ? specific_error : i.error)  in match_template()
6216 	  && (i.jumpabsolute != (t->opcode_modifier.jump == JUMP_ABSOLUTE)))  in match_template()
6229   i.tm = *t;  in match_template()
6232     i.tm.operand_types[addr_prefix_disp]  in match_template()
6241       i.tm.base_opcode ^= found_reverse_match;  in match_template()
6243       i.tm.operand_types[0] = operand_types[i.operands - 1];  in match_template()
6244       i.tm.operand_types[i.operands - 1] = operand_types[0];  in match_template()
6249       i.tm.opcode_modifier.regmem  in match_template()
6250 	= i.tm.opcode_modifier.modrm && i.tm.opcode_modifier.d  in match_template()
6251 	  && i.tm.operands > 2U - i.tm.opcode_modifier.sse2avx  in match_template()
6252 	  && !i.tm.opcode_modifier.regmem;  in match_template()
6261   unsigned int es_op = i.tm.opcode_modifier.isstring - IS_STRING_ES_OP0;  in check_string()
6262   unsigned int op = i.tm.operand_types[0].bitfield.baseindex ? es_op : 0;  in check_string()
6264   if (i.seg[op] != NULL && i.seg[op] != &es)  in check_string()
6267 	      i.tm.name,  in check_string()
6268 	      intel_syntax ? i.tm.operands - es_op : es_op + 1,  in check_string()
6277   i.seg[op] = i.seg[1];  in check_string()
6287   if (i.tm.opcode_modifier.size == SIZE16)  in process_suffix()
6288     i.suffix = WORD_MNEM_SUFFIX;  in process_suffix()
6289   else if (i.tm.opcode_modifier.size == SIZE32)  in process_suffix()
6290     i.suffix = LONG_MNEM_SUFFIX;  in process_suffix()
6291   else if (i.tm.opcode_modifier.size == SIZE64)  in process_suffix()
6292     i.suffix = QWORD_MNEM_SUFFIX;  in process_suffix()
6293   else if (i.reg_operands  in process_suffix()
6294 	   && (i.operands > 1 || i.types[0].bitfield.class == Reg))  in process_suffix()
6298       if (!i.suffix)  in process_suffix()
6304 	  if (i.tm.base_opcode == 0xf20f38f0  in process_suffix()
6305 	      && i.types[0].bitfield.class == Reg)  in process_suffix()
6307 	      if (i.types[0].bitfield.byte)  in process_suffix()
6308 		i.suffix = BYTE_MNEM_SUFFIX;  in process_suffix()
6309 	      else if (i.types[0].bitfield.word)  in process_suffix()
6310 		i.suffix = WORD_MNEM_SUFFIX;  in process_suffix()
6311 	      else if (i.types[0].bitfield.dword)  in process_suffix()
6312 		i.suffix = LONG_MNEM_SUFFIX;  in process_suffix()
6313 	      else if (i.types[0].bitfield.qword)  in process_suffix()
6314 		i.suffix = QWORD_MNEM_SUFFIX;  in process_suffix()
6317 	  if (!i.suffix)  in process_suffix()
6321 	      if (i.tm.base_opcode == 0xf20f38f0)  in process_suffix()
6325 			  i.tm.name);  in process_suffix()
6329 	      for (op = i.operands; --op >= 0;)  in process_suffix()
6330 		if (i.tm.operand_types[op].bitfield.instance == InstanceNone  in process_suffix()
6331 		    || i.tm.operand_types[op].bitfield.instance == Accum)  in process_suffix()
6333 		    if (i.types[op].bitfield.class != Reg)  in process_suffix()
6335 		    if (i.types[op].bitfield.byte)  in process_suffix()
6336 		      i.suffix = BYTE_MNEM_SUFFIX;  in process_suffix()
6337 		    else if (i.types[op].bitfield.word)  in process_suffix()
6338 		      i.suffix = WORD_MNEM_SUFFIX;  in process_suffix()
6339 		    else if (i.types[op].bitfield.dword)  in process_suffix()
6340 		      i.suffix = LONG_MNEM_SUFFIX;  in process_suffix()
6341 		    else if (i.types[op].bitfield.qword)  in process_suffix()
6342 		      i.suffix = QWORD_MNEM_SUFFIX;  in process_suffix()
6349       else if (i.suffix == BYTE_MNEM_SUFFIX)  in process_suffix()
6352 	      && i.tm.opcode_modifier.ignoresize  in process_suffix()
6353 	      && i.tm.opcode_modifier.no_bsuf)  in process_suffix()
6354 	    i.suffix = 0;  in process_suffix()
6358       else if (i.suffix == LONG_MNEM_SUFFIX)  in process_suffix()
6361 	      && i.tm.opcode_modifier.ignoresize  in process_suffix()
6362 	      && i.tm.opcode_modifier.no_lsuf  in process_suffix()
6363 	      && !i.tm.opcode_modifier.todword  in process_suffix()
6364 	      && !i.tm.opcode_modifier.toqword)  in process_suffix()
6365 	    i.suffix = 0;  in process_suffix()
6369       else if (i.suffix == QWORD_MNEM_SUFFIX)  in process_suffix()
6372 	      && i.tm.opcode_modifier.ignoresize  in process_suffix()
6373 	      && i.tm.opcode_modifier.no_qsuf  in process_suffix()
6374 	      && !i.tm.opcode_modifier.todword  in process_suffix()
6375 	      && !i.tm.opcode_modifier.toqword)  in process_suffix()
6376 	    i.suffix = 0;  in process_suffix()
6380       else if (i.suffix == WORD_MNEM_SUFFIX)  in process_suffix()
6383 	      && i.tm.opcode_modifier.ignoresize  in process_suffix()
6384 	      && i.tm.opcode_modifier.no_wsuf)  in process_suffix()
6385 	    i.suffix = 0;  in process_suffix()
6389       else if (intel_syntax && i.tm.opcode_modifier.ignoresize)  in process_suffix()
6395   else if (i.tm.opcode_modifier.defaultsize  in process_suffix()
6396 	   && !i.suffix  in process_suffix()
6398 	   && i.tm.opcode_modifier.no_ssuf  in process_suffix()
6400 	   && i.tm.base_opcode != 0x0f07)  in process_suffix()
6402       i.suffix = stackop_size;  in process_suffix()
6410 	  if (i.tm.base_opcode == 0xcf)  in process_suffix()
6412 	      i.suffix = WORD_MNEM_SUFFIX;  in process_suffix()
6416 	  else if ((i.tm.base_opcode | 1) == 0x07)  in process_suffix()
6418 		     i.tm.name);  in process_suffix()
6422 	   && !i.suffix  in process_suffix()
6423 	   && (i.tm.opcode_modifier.jump == JUMP_ABSOLUTE  in process_suffix()
6424 	       || i.tm.opcode_modifier.jump == JUMP_BYTE  in process_suffix()
6425 	       || i.tm.opcode_modifier.jump == JUMP_INTERSEGMENT  in process_suffix()
6426 	       || (i.tm.base_opcode == 0x0f01 /* [ls][gi]dt */  in process_suffix()
6427 		   && i.tm.extension_opcode <= 3)))  in process_suffix()
6432 	  if (!i.tm.opcode_modifier.no_qsuf)  in process_suffix()
6434 	      i.suffix = QWORD_MNEM_SUFFIX;  in process_suffix()
6439 	  if (!i.tm.opcode_modifier.no_lsuf)  in process_suffix()
6440 	    i.suffix = LONG_MNEM_SUFFIX;  in process_suffix()
6443 	  if (!i.tm.opcode_modifier.no_wsuf)  in process_suffix()
6444 	    i.suffix = WORD_MNEM_SUFFIX;  in process_suffix()
6449   if (!i.suffix)  in process_suffix()
6453 	  if (i.tm.opcode_modifier.w)  in process_suffix()
6464 	  suffixes = !i.tm.opcode_modifier.no_bsuf;  in process_suffix()
6465 	  if (!i.tm.opcode_modifier.no_wsuf)  in process_suffix()
6467 	  if (!i.tm.opcode_modifier.no_lsuf)  in process_suffix()
6469 	  if (!i.tm.opcode_modifier.no_ldsuf)  in process_suffix()
6471 	  if (!i.tm.opcode_modifier.no_ssuf)  in process_suffix()
6473 	  if (flag_code == CODE_64BIT && !i.tm.opcode_modifier.no_qsuf)  in process_suffix()
6477 	  if (i.tm.opcode_modifier.w  in process_suffix()
6479 		  && !i.tm.opcode_modifier.defaultsize  in process_suffix()
6480 		  && !i.tm.opcode_modifier.ignoresize))  in process_suffix()
6482 	      as_bad (_("ambiguous operand size for `%s'"), i.tm.name);  in process_suffix()
6489   switch (i.suffix)  in process_suffix()
6493       if (i.tm.opcode_modifier.floatmf)  in process_suffix()
6495 	  i.tm.base_opcode ^= 4;  in process_suffix()
6502       if (i.tm.opcode_modifier.w)  in process_suffix()
6504 	  if (i.tm.opcode_modifier.shortform)  in process_suffix()
6505 	    i.tm.base_opcode |= 8;  in process_suffix()
6507 	    i.tm.base_opcode |= 1;  in process_suffix()
6514       if (i.reg_operands > 0  in process_suffix()
6515 	  && i.types[0].bitfield.class == Reg  in process_suffix()
6516 	  && i.tm.opcode_modifier.addrprefixopreg  in process_suffix()
6517 	  && (i.tm.operand_types[0].bitfield.instance == Accum  in process_suffix()
6518 	      || i.operands == 1))  in process_suffix()
6523 	       && i.op[0].regs->reg_type.bitfield.word)  in process_suffix()
6525 		  && i.op[0].regs->reg_type.bitfield.dword))  in process_suffix()
6529       else if (i.suffix != QWORD_MNEM_SUFFIX  in process_suffix()
6530 	       && !i.tm.opcode_modifier.ignoresize  in process_suffix()
6531 	       && !i.tm.opcode_modifier.floatmf  in process_suffix()
6532 	       && !is_any_vex_encoding (&i.tm)  in process_suffix()
6533 	       && ((i.suffix == LONG_MNEM_SUFFIX) == (flag_code == CODE_16BIT)  in process_suffix()
6535 		       && i.tm.opcode_modifier.jump == JUMP_BYTE)))  in process_suffix()
6539 	  if (i.tm.opcode_modifier.jump == JUMP_BYTE) /* jcxz, loop */  in process_suffix()
6547       if (i.suffix == QWORD_MNEM_SUFFIX  in process_suffix()
6549 	  && !i.tm.opcode_modifier.norex64  in process_suffix()
6552 	  && ! (i.operands == 2  in process_suffix()
6553 		&& i.tm.base_opcode == 0x90  in process_suffix()
6554 		&& i.tm.extension_opcode == None  in process_suffix()
6555 		&& i.types[0].bitfield.instance == Accum  in process_suffix()
6556 		&& i.types[0].bitfield.qword  in process_suffix()
6557 		&& i.types[1].bitfield.instance == Accum  in process_suffix()
6558 		&& i.types[1].bitfield.qword))  in process_suffix()
6559 	i.rex |= REX_W;  in process_suffix()
6564   if (i.reg_operands != 0  in process_suffix()
6565       && i.operands > 1  in process_suffix()
6566       && i.tm.opcode_modifier.addrprefixopreg  in process_suffix()
6567       && i.tm.operand_types[0].bitfield.instance != Accum)  in process_suffix()
6575 	need = i.prefix[ADDR_PREFIX] ? need_word : need_dword;  in process_suffix()
6578 	  if (i.prefix[ADDR_PREFIX])  in process_suffix()
6584       for (op = 0; op < i.operands; op++)  in process_suffix()
6585 	if (i.types[op].bitfield.class == Reg  in process_suffix()
6587 		 && !i.op[op].regs->reg_type.bitfield.word)  in process_suffix()
6589 		    && !i.op[op].regs->reg_type.bitfield.dword)  in process_suffix()
6591 		    && !i.op[op].regs->reg_type.bitfield.qword)))  in process_suffix()
6594 		    i.tm.name);  in process_suffix()
6607   for (op = i.operands; --op >= 0;)  in check_byte_reg()
6610       if (i.types[op].bitfield.class != Reg)  in check_byte_reg()
6616       if (i.types[op].bitfield.byte)  in check_byte_reg()
6620       if (i.tm.operand_types[op].bitfield.instance == RegD  in check_byte_reg()
6621 	  && i.tm.operand_types[op].bitfield.word)  in check_byte_reg()
6625       if (i.tm.base_opcode == 0xf20f38f0)  in check_byte_reg()
6628       if ((i.types[op].bitfield.word  in check_byte_reg()
6629 	   || i.types[op].bitfield.dword  in check_byte_reg()
6630 	   || i.types[op].bitfield.qword)  in check_byte_reg()
6631 	  && i.op[op].regs->reg_num < 4  in check_byte_reg()
6640 		     (i.op[op].regs + (i.types[op].bitfield.word  in check_byte_reg()
6644 		     i.op[op].regs->reg_name,  in check_byte_reg()
6645 		     i.suffix);  in check_byte_reg()
6650       if (i.types[op].bitfield.class == Reg  in check_byte_reg()
6651 	  || i.types[op].bitfield.class == RegMMX  in check_byte_reg()
6652 	  || i.types[op].bitfield.class == RegSIMD  in check_byte_reg()
6653 	  || i.types[op].bitfield.class == SReg  in check_byte_reg()
6654 	  || i.types[op].bitfield.class == RegCR  in check_byte_reg()
6655 	  || i.types[op].bitfield.class == RegDR  in check_byte_reg()
6656 	  || i.types[op].bitfield.class == RegTR)  in check_byte_reg()
6660 		  i.op[op].regs->reg_name,  in check_byte_reg()
6661 		  i.tm.name,  in check_byte_reg()
6662 		  i.suffix);  in check_byte_reg()
6674   for (op = i.operands; --op >= 0;)  in check_long_reg()
6676     if (i.types[op].bitfield.class != Reg)  in check_long_reg()
6680     else if (i.types[op].bitfield.byte  in check_long_reg()
6681 	     && (i.tm.operand_types[op].bitfield.class == Reg  in check_long_reg()
6682 		 || i.tm.operand_types[op].bitfield.instance == Accum)  in check_long_reg()
6683 	     && (i.tm.operand_types[op].bitfield.word  in check_long_reg()
6684 		 || i.tm.operand_types[op].bitfield.dword))  in check_long_reg()
6688 		i.op[op].regs->reg_name,  in check_long_reg()
6689 		i.tm.name,  in check_long_reg()
6690 		i.suffix);  in check_long_reg()
6695 	     && i.types[op].bitfield.word  in check_long_reg()
6696 	     && (i.tm.operand_types[op].bitfield.class == Reg  in check_long_reg()
6697 		 || i.tm.operand_types[op].bitfield.instance == Accum)  in check_long_reg()
6698 	     && i.tm.operand_types[op].bitfield.dword)  in check_long_reg()
6705 		    register_prefix, i.op[op].regs->reg_name,  in check_long_reg()
6706 		    i.suffix);  in check_long_reg()
6712 		 (i.op[op].regs + REGNAM_EAX - REGNAM_AX)->reg_name,  in check_long_reg()
6713 		 register_prefix, i.op[op].regs->reg_name, i.suffix);  in check_long_reg()
6717     else if (i.types[op].bitfield.qword  in check_long_reg()
6718 	     && (i.tm.operand_types[op].bitfield.class == Reg  in check_long_reg()
6719 		 || i.tm.operand_types[op].bitfield.instance == Accum)  in check_long_reg()
6720 	     && i.tm.operand_types[op].bitfield.dword)  in check_long_reg()
6723 	    && i.tm.opcode_modifier.toqword  in check_long_reg()
6724 	    && i.types[0].bitfield.class != RegSIMD)  in check_long_reg()
6727 	    i.suffix = QWORD_MNEM_SUFFIX;  in check_long_reg()
6732 		    register_prefix, i.op[op].regs->reg_name,  in check_long_reg()
6733 		    i.suffix);  in check_long_reg()
6745   for (op = i.operands; --op >= 0; )  in check_qword_reg()
6747     if (i.types[op].bitfield.class != Reg)  in check_qword_reg()
6751     else if (i.types[op].bitfield.byte  in check_qword_reg()
6752 	     && (i.tm.operand_types[op].bitfield.class == Reg  in check_qword_reg()
6753 		 || i.tm.operand_types[op].bitfield.instance == Accum)  in check_qword_reg()
6754 	     && (i.tm.operand_types[op].bitfield.word  in check_qword_reg()
6755 		 || i.tm.operand_types[op].bitfield.dword))  in check_qword_reg()
6759 		i.op[op].regs->reg_name,  in check_qword_reg()
6760 		i.tm.name,  in check_qword_reg()
6761 		i.suffix);  in check_qword_reg()
6765     else if ((i.types[op].bitfield.word  in check_qword_reg()
6766 	      || i.types[op].bitfield.dword)  in check_qword_reg()
6767 	     && (i.tm.operand_types[op].bitfield.class == Reg  in check_qword_reg()
6768 		 || i.tm.operand_types[op].bitfield.instance == Accum)  in check_qword_reg()
6769 	     && i.tm.operand_types[op].bitfield.qword)  in check_qword_reg()
6774 	    && i.tm.opcode_modifier.todword  in check_qword_reg()
6775 	    && i.types[0].bitfield.class != RegSIMD)  in check_qword_reg()
6778 	    i.suffix = LONG_MNEM_SUFFIX;  in check_qword_reg()
6783 		    register_prefix, i.op[op].regs->reg_name,  in check_qword_reg()
6784 		    i.suffix);  in check_qword_reg()
6795   for (op = i.operands; --op >= 0;)  in check_word_reg()
6797     if (i.types[op].bitfield.class != Reg)  in check_word_reg()
6801     else if (i.types[op].bitfield.byte  in check_word_reg()
6802 	     && (i.tm.operand_types[op].bitfield.class == Reg  in check_word_reg()
6803 		 || i.tm.operand_types[op].bitfield.instance == Accum)  in check_word_reg()
6804 	     && (i.tm.operand_types[op].bitfield.word  in check_word_reg()
6805 		 || i.tm.operand_types[op].bitfield.dword))  in check_word_reg()
6809 		i.op[op].regs->reg_name,  in check_word_reg()
6810 		i.tm.name,  in check_word_reg()
6811 		i.suffix);  in check_word_reg()
6816 	     && (i.types[op].bitfield.dword  in check_word_reg()
6817 		 || i.types[op].bitfield.qword)  in check_word_reg()
6818 	     && (i.tm.operand_types[op].bitfield.class == Reg  in check_word_reg()
6819 		 || i.tm.operand_types[op].bitfield.instance == Accum)  in check_word_reg()
6820 	     && i.tm.operand_types[op].bitfield.word)  in check_word_reg()
6827 		    register_prefix, i.op[op].regs->reg_name,  in check_word_reg()
6828 		    i.suffix);  in check_word_reg()
6834 		 (i.op[op].regs + REGNAM_AX - REGNAM_EAX)->reg_name,  in check_word_reg()
6835 		 register_prefix, i.op[op].regs->reg_name, i.suffix);  in check_word_reg()
6844   i386_operand_type overlap = i.types[j];  in update_imm()
6858       if (i.suffix)  in update_imm()
6863 	  if (i.suffix == BYTE_MNEM_SUFFIX)  in update_imm()
6868 	  else if (i.suffix == WORD_MNEM_SUFFIX)  in update_imm()
6870 	  else if (i.suffix == QWORD_MNEM_SUFFIX)  in update_imm()
6883 	  if ((flag_code == CODE_16BIT) ^ (i.prefix[DATA_PREFIX] != 0))  in update_imm()
6900   i.types[j] = overlap;  in update_imm()
6911   n = i.operands > 2 ? 2 : i.operands;  in finalize_imm()
6919       gas_assert (operand_type_check (i.types[2], imm) == 0);  in finalize_imm()
6933   if (i.tm.opcode_modifier.sse2avx && i.tm.opcode_modifier.vexvvvv)  in process_operands()
6935       unsigned int dupl = i.operands;  in process_operands()
6940       gas_assert (i.reg_operands  in process_operands()
6942 		  && operand_type_equal (&i.types[dest], &regxmm));  in process_operands()
6944       if (i.tm.operand_types[0].bitfield.instance == Accum  in process_operands()
6945 	  && i.tm.operand_types[0].bitfield.xmmword)  in process_operands()
6947 	  if (i.tm.opcode_modifier.vexsources == VEX3SOURCES)  in process_operands()
6951 	      i.tm.operand_types[0].bitfield.instance = InstanceNone;  in process_operands()
6952 	      i.tm.operand_types[0].bitfield.class = RegSIMD;  in process_operands()
6960 	      for (j = 1; j < i.operands; j++)  in process_operands()
6962 		  i.op[j - 1] = i.op[j];  in process_operands()
6963 		  i.types[j - 1] = i.types[j];  in process_operands()
6964 		  i.tm.operand_types[j - 1] = i.tm.operand_types[j];  in process_operands()
6965 		  i.flags[j - 1] = i.flags[j];  in process_operands()
6969       else if (i.tm.opcode_modifier.implicit1stxmm0)  in process_operands()
6972 		      && (i.tm.opcode_modifier.vexsources  in process_operands()
6977 	  for (j = i.operands; j > 0; j--)  in process_operands()
6979 	      i.op[j] = i.op[j - 1];  in process_operands()
6980 	      i.types[j] = i.types[j - 1];  in process_operands()
6981 	      i.tm.operand_types[j] = i.tm.operand_types[j - 1];  in process_operands()
6982 	      i.flags[j] = i.flags[j - 1];  in process_operands()
6984 	  i.op[0].regs  in process_operands()
6986 	  i.types[0] = regxmm;  in process_operands()
6987 	  i.tm.operand_types[0] = regxmm;  in process_operands()
6989 	  i.operands += 2;  in process_operands()
6990 	  i.reg_operands += 2;  in process_operands()
6991 	  i.tm.operands += 2;  in process_operands()
6995 	  i.op[dupl] = i.op[dest];  in process_operands()
6996 	  i.types[dupl] = i.types[dest];  in process_operands()
6997 	  i.tm.operand_types[dupl] = i.tm.operand_types[dest];  in process_operands()
6998 	  i.flags[dupl] = i.flags[dest];  in process_operands()
7003 	  i.operands++;  in process_operands()
7004 	  i.reg_operands++;  in process_operands()
7005 	  i.tm.operands++;  in process_operands()
7007 	  i.op[dupl] = i.op[dest];  in process_operands()
7008 	  i.types[dupl] = i.types[dest];  in process_operands()
7009 	  i.tm.operand_types[dupl] = i.tm.operand_types[dest];  in process_operands()
7010 	  i.flags[dupl] = i.flags[dest];  in process_operands()
7013        if (i.tm.opcode_modifier.immext)  in process_operands()
7016   else if (i.tm.operand_types[0].bitfield.instance == Accum  in process_operands()
7017 	   && i.tm.operand_types[0].bitfield.xmmword)  in process_operands()
7021       for (j = 1; j < i.operands; j++)  in process_operands()
7023 	  i.op[j - 1] = i.op[j];  in process_operands()
7024 	  i.types[j - 1] = i.types[j];  in process_operands()
7028 	  i.tm.operand_types [j - 1] = i.tm.operand_types [j];  in process_operands()
7030 	  i.flags[j - 1] = i.flags[j];  in process_operands()
7033       i.operands--;  in process_operands()
7034       i.reg_operands--;  in process_operands()
7035       i.tm.operands--;  in process_operands()
7037   else if (i.tm.opcode_modifier.implicitquadgroup)  in process_operands()
7042       gas_assert (i.operands >= 2 && i.types[1].bitfield.class == RegSIMD);  in process_operands()
7043       regnum = register_number (i.op[1].regs);  in process_operands()
7049 		 register_prefix, i.op[1].regs->reg_name,  in process_operands()
7050 		 register_prefix, i.op[1].regs->reg_name, first_reg_in_group,  in process_operands()
7051 		 register_prefix, i.op[1].regs->reg_name, last_reg_in_group,  in process_operands()
7052 		 i.tm.name);  in process_operands()
7054   else if (i.tm.opcode_modifier.regkludge)  in process_operands()
7062       if (operand_type_check (i.types[0], reg))  in process_operands()
7067       gas_assert (i.reg_operands == 1  in process_operands()
7068 		  && i.op[first_reg_op + 1].regs == 0);  in process_operands()
7069       i.op[first_reg_op + 1].regs = i.op[first_reg_op].regs;  in process_operands()
7070       i.types[first_reg_op + 1] = i.types[first_reg_op];  in process_operands()
7071       i.operands++;  in process_operands()
7072       i.reg_operands++;  in process_operands()
7075   if (i.tm.opcode_modifier.modrm)  in process_operands()
7083   else if (i.types[0].bitfield.class == SReg)  in process_operands()
7086 	  ? i.tm.base_opcode == POP_SEG_SHORT  in process_operands()
7087 	    && i.op[0].regs->reg_num == 1  in process_operands()
7088 	  : (i.tm.base_opcode | 1) == POP_SEG386_SHORT  in process_operands()
7089 	    && i.op[0].regs->reg_num < 4)  in process_operands()
7092 		  i.tm.name, register_prefix, i.op[0].regs->reg_name);  in process_operands()
7095       if ( i.op[0].regs->reg_num > 3 && i.tm.opcode_length == 1 )  in process_operands()
7097 	  i.tm.base_opcode ^= POP_SEG_SHORT ^ POP_SEG386_SHORT;  in process_operands()
7098 	  i.tm.opcode_length = 2;  in process_operands()
7100       i.tm.base_opcode |= (i.op[0].regs->reg_num << 3);  in process_operands()
7102   else if ((i.tm.base_opcode & ~0x3) == MOV_AX_DISP32)  in process_operands()
7106   else if (i.tm.opcode_modifier.isstring)  in process_operands()
7112   else if (i.tm.opcode_modifier.shortform)  in process_operands()
7116       unsigned int op = i.tm.operand_types[0].bitfield.class != Reg;  in process_operands()
7119       i.tm.base_opcode |= i.op[op].regs->reg_num;  in process_operands()
7120       if ((i.op[op].regs->reg_flags & RegRex) != 0)  in process_operands()
7121 	i.rex |= REX_B;  in process_operands()
7122       if (!quiet_warnings && i.tm.opcode_modifier.ugh)  in process_operands()
7126 	  if (i.operands == 2)  in process_operands()
7129 	      as_warn (_("translating to `%s %s%s,%s%s'"), i.tm.name,  in process_operands()
7130 		       register_prefix, i.op[!intel_syntax].regs->reg_name,  in process_operands()
7131 		       register_prefix, i.op[intel_syntax].regs->reg_name);  in process_operands()
7136 	      as_warn (_("translating to `%s %s%s'"), i.tm.name,  in process_operands()
7137 		       register_prefix, i.op[0].regs->reg_name);  in process_operands()
7142   if (i.tm.base_opcode == 0x8d /* lea */  in process_operands()
7143       && i.seg[0]  in process_operands()
7145     as_warn (_("segment override on `%s' is ineffectual"), i.tm.name);  in process_operands()
7152   if ((i.seg[0]) && (i.seg[0] != default_seg))  in process_operands()
7154       if (!add_prefix (i.seg[0]->seg_prefix))  in process_operands()
7167   vex_3_sources = i.tm.opcode_modifier.vexsources == VEX3SOURCES;  in build_modrm_byte()
7173       dest = i.operands - 1;  in build_modrm_byte()
7183       gas_assert ((i.reg_operands == 4  in build_modrm_byte()
7184 		   || (i.reg_operands == 3 && i.mem_operands == 1))  in build_modrm_byte()
7185 		  && i.tm.opcode_modifier.vexvvvv == VEXXDS  in build_modrm_byte()
7186 		  && i.tm.opcode_modifier.vexw  in build_modrm_byte()
7187 		  && i.tm.operand_types[dest].bitfield.class == RegSIMD);  in build_modrm_byte()
7191       if (i.tm.opcode_modifier.vexw == VEXW1)  in build_modrm_byte()
7193 	  source = i.imm_operands;  in build_modrm_byte()
7194 	  reg_slot = i.imm_operands + 1;  in build_modrm_byte()
7198 	  source = i.imm_operands + 1;  in build_modrm_byte()
7199 	  reg_slot = i.imm_operands;  in build_modrm_byte()
7202       if (i.imm_operands == 0)  in build_modrm_byte()
7206 	  exp = &im_expressions[i.imm_operands++];  in build_modrm_byte()
7207 	  i.op[i.operands].imms = exp;  in build_modrm_byte()
7208 	  i.types[i.operands] = imm8;  in build_modrm_byte()
7209 	  i.operands++;  in build_modrm_byte()
7211 	  gas_assert (i.tm.operand_types[reg_slot].bitfield.class == RegSIMD);  in build_modrm_byte()
7213 	  exp->X_add_number = register_number (i.op[reg_slot].regs) << 4;  in build_modrm_byte()
7214 	  gas_assert ((i.op[reg_slot].regs->reg_flags & RegVRex) == 0);  in build_modrm_byte()
7218 	  gas_assert (i.imm_operands == 1);  in build_modrm_byte()
7219 	  gas_assert (fits_in_imm4 (i.op[0].imms->X_add_number));  in build_modrm_byte()
7220 	  gas_assert (!i.tm.opcode_modifier.immext);  in build_modrm_byte()
7223 	  i.types[0].bitfield.imm8 = 1;  in build_modrm_byte()
7225 	  gas_assert (i.tm.operand_types[reg_slot].bitfield.class == RegSIMD);  in build_modrm_byte()
7226 	  i.op[0].imms->X_add_number  in build_modrm_byte()
7227 	      |= register_number (i.op[reg_slot].regs) << 4;  in build_modrm_byte()
7228 	  gas_assert ((i.op[reg_slot].regs->reg_flags & RegVRex) == 0);  in build_modrm_byte()
7231       gas_assert (i.tm.operand_types[nds].bitfield.class == RegSIMD);  in build_modrm_byte()
7232       i.vex.register_specifier = i.op[nds].regs;  in build_modrm_byte()
7243   if (i.mem_operands == 0  in build_modrm_byte()
7244       && ((i.reg_operands == 2  in build_modrm_byte()
7245 	   && i.tm.opcode_modifier.vexvvvv <= VEXXDS)  in build_modrm_byte()
7246 	  || (i.reg_operands == 3  in build_modrm_byte()
7247 	      && i.tm.opcode_modifier.vexvvvv == VEXXDS)  in build_modrm_byte()
7248 	  || (i.reg_operands == 4 && vex_3_sources)))  in build_modrm_byte()
7250       switch (i.operands)  in build_modrm_byte()
7260 	  gas_assert (i.imm_operands == 1  in build_modrm_byte()
7261 		      || (i.imm_operands == 0  in build_modrm_byte()
7262 			  && (i.tm.opcode_modifier.vexvvvv == VEXXDS  in build_modrm_byte()
7263 			      || (i.types[0].bitfield.instance == RegC  in build_modrm_byte()
7264 				  && i.types[0].bitfield.byte))));  in build_modrm_byte()
7265 	  if (operand_type_check (i.types[0], imm)  in build_modrm_byte()
7266 	      || (i.types[0].bitfield.instance == RegC  in build_modrm_byte()
7267 		  && i.types[0].bitfield.byte))  in build_modrm_byte()
7280 	  gas_assert ((i.imm_operands == 2  in build_modrm_byte()
7281 		       && i.types[0].bitfield.imm8  in build_modrm_byte()
7282 		       && i.types[1].bitfield.imm8)  in build_modrm_byte()
7283 		      || (i.tm.opcode_modifier.vexvvvv == VEXXDS  in build_modrm_byte()
7284 			  && i.imm_operands == 1  in build_modrm_byte()
7285 			  && (i.types[0].bitfield.imm8  in build_modrm_byte()
7286 			      || i.types[i.operands - 1].bitfield.imm8  in build_modrm_byte()
7287 			      || i.rounding)));  in build_modrm_byte()
7288 	  if (i.imm_operands == 2)  in build_modrm_byte()
7292 	      if (i.types[0].bitfield.imm8)  in build_modrm_byte()
7299 	  if (is_evex_encoding (&i.tm))  in build_modrm_byte()
7306 	      gas_assert (i.imm_operands == 2  in build_modrm_byte()
7307 			  && i.tm.opcode_modifier.sae  in build_modrm_byte()
7308 			  && operand_type_check (i.types[0], imm));  in build_modrm_byte()
7309 	      if (operand_type_check (i.types[1], imm))  in build_modrm_byte()
7311 	      else if (operand_type_check (i.types[4], imm))  in build_modrm_byte()
7328 	  if (i.rounding && i.rounding->operand == (int) dest)  in build_modrm_byte()
7331 	  if (i.tm.opcode_modifier.vexvvvv == VEXXDS)  in build_modrm_byte()
7342 	      if (!i.tm.operand_types[source].bitfield.baseindex  in build_modrm_byte()
7343 		  && i.tm.operand_types[dest].bitfield.baseindex)  in build_modrm_byte()
7351 	      op = i.tm.operand_types[vvvv];  in build_modrm_byte()
7352 	      if ((dest + 1) >= i.operands  in build_modrm_byte()
7358 	      i.vex.register_specifier = i.op[vvvv].regs;  in build_modrm_byte()
7363       i.rm.mode = 3;  in build_modrm_byte()
7370       if (!i.tm.opcode_modifier.regmem  in build_modrm_byte()
7371 	  && operand_type_check (i.tm.operand_types[dest], anymem) == 0)  in build_modrm_byte()
7373 	  i.rm.reg = i.op[dest].regs->reg_num;  in build_modrm_byte()
7374 	  i.rm.regmem = i.op[source].regs->reg_num;  in build_modrm_byte()
7375 	  if (i.op[dest].regs->reg_type.bitfield.class == RegMMX  in build_modrm_byte()
7376 	       || i.op[source].regs->reg_type.bitfield.class == RegMMX)  in build_modrm_byte()
7377 	    i.has_regmmx = TRUE;  in build_modrm_byte()
7378 	  else if (i.op[dest].regs->reg_type.bitfield.class == RegSIMD  in build_modrm_byte()
7379 		   || i.op[source].regs->reg_type.bitfield.class == RegSIMD)  in build_modrm_byte()
7381 	      if (i.types[dest].bitfield.zmmword  in build_modrm_byte()
7382 		  || i.types[source].bitfield.zmmword)  in build_modrm_byte()
7383 		i.has_regzmm = TRUE;  in build_modrm_byte()
7384 	      else if (i.types[dest].bitfield.ymmword  in build_modrm_byte()
7385 		       || i.types[source].bitfield.ymmword)  in build_modrm_byte()
7386 		i.has_regymm = TRUE;  in build_modrm_byte()
7388 		i.has_regxmm = TRUE;  in build_modrm_byte()
7390 	  if ((i.op[dest].regs->reg_flags & RegRex) != 0)  in build_modrm_byte()
7391 	    i.rex |= REX_R;  in build_modrm_byte()
7392 	  if ((i.op[dest].regs->reg_flags & RegVRex) != 0)  in build_modrm_byte()
7393 	    i.vrex |= REX_R;  in build_modrm_byte()
7394 	  if ((i.op[source].regs->reg_flags & RegRex) != 0)  in build_modrm_byte()
7395 	    i.rex |= REX_B;  in build_modrm_byte()
7396 	  if ((i.op[source].regs->reg_flags & RegVRex) != 0)  in build_modrm_byte()
7397 	    i.vrex |= REX_B;  in build_modrm_byte()
7401 	  i.rm.reg = i.op[source].regs->reg_num;  in build_modrm_byte()
7402 	  i.rm.regmem = i.op[dest].regs->reg_num;  in build_modrm_byte()
7403 	  if ((i.op[dest].regs->reg_flags & RegRex) != 0)  in build_modrm_byte()
7404 	    i.rex |= REX_B;  in build_modrm_byte()
7405 	  if ((i.op[dest].regs->reg_flags & RegVRex) != 0)  in build_modrm_byte()
7406 	    i.vrex |= REX_B;  in build_modrm_byte()
7407 	  if ((i.op[source].regs->reg_flags & RegRex) != 0)  in build_modrm_byte()
7408 	    i.rex |= REX_R;  in build_modrm_byte()
7409 	  if ((i.op[source].regs->reg_flags & RegVRex) != 0)  in build_modrm_byte()
7410 	    i.vrex |= REX_R;  in build_modrm_byte()
7412       if (flag_code != CODE_64BIT && (i.rex & REX_R))  in build_modrm_byte()
7414 	  if (i.types[!i.tm.opcode_modifier.regmem].bitfield.class != RegCR)  in build_modrm_byte()
7416 	  i.rex &= ~REX_R;  in build_modrm_byte()
7424       if (i.mem_operands)  in build_modrm_byte()
7429 	  for (op = 0; op < i.operands; op++)  in build_modrm_byte()
7430 	    if (i.flags[op] & Operand_Mem)  in build_modrm_byte()
7432 	  gas_assert (op < i.operands);  in build_modrm_byte()
7434 	  if (i.tm.opcode_modifier.vecsib)  in build_modrm_byte()
7436 	      if (i.index_reg->reg_num == RegIZ)  in build_modrm_byte()
7439 	      i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;  in build_modrm_byte()
7440 	      if (!i.base_reg)  in build_modrm_byte()
7442 		  i.sib.base = NO_BASE_REGISTER;  in build_modrm_byte()
7443 		  i.sib.scale = i.log2_scale_factor;  in build_modrm_byte()
7444 		  i.types[op].bitfield.disp8 = 0;  in build_modrm_byte()
7445 		  i.types[op].bitfield.disp16 = 0;  in build_modrm_byte()
7446 		  i.types[op].bitfield.disp64 = 0;  in build_modrm_byte()
7447 		  if (flag_code != CODE_64BIT || i.prefix[ADDR_PREFIX])  in build_modrm_byte()
7450 		      i.types[op].bitfield.disp32 = 1;  in build_modrm_byte()
7451 		      i.types[op].bitfield.disp32s = 0;  in build_modrm_byte()
7455 		      i.types[op].bitfield.disp32 = 0;  in build_modrm_byte()
7456 		      i.types[op].bitfield.disp32s = 1;  in build_modrm_byte()
7459 	      i.sib.index = i.index_reg->reg_num;  in build_modrm_byte()
7460 	      if ((i.index_reg->reg_flags & RegRex) != 0)  in build_modrm_byte()
7461 		i.rex |= REX_X;  in build_modrm_byte()
7462 	      if ((i.index_reg->reg_flags & RegVRex) != 0)  in build_modrm_byte()
7463 		i.vrex |= REX_X;  in build_modrm_byte()
7468 	  if (i.base_reg == 0)  in build_modrm_byte()
7470 	      i.rm.mode = 0;  in build_modrm_byte()
7471 	      if (!i.disp_operands)  in build_modrm_byte()
7473 	      if (i.index_reg == 0)  in build_modrm_byte()
7477 		  gas_assert (!i.tm.opcode_modifier.vecsib);  in build_modrm_byte()
7485 		      i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;  in build_modrm_byte()
7486 		      i.sib.base = NO_BASE_REGISTER;  in build_modrm_byte()
7487 		      i.sib.index = NO_INDEX_REGISTER;  in build_modrm_byte()
7488 		      newdisp = (!i.prefix[ADDR_PREFIX] ? disp32s : disp32);  in build_modrm_byte()
7491 			   ^ (i.prefix[ADDR_PREFIX] != 0))  in build_modrm_byte()
7493 		      i.rm.regmem = NO_BASE_REGISTER_16;  in build_modrm_byte()
7498 		      i.rm.regmem = NO_BASE_REGISTER;  in build_modrm_byte()
7501 		  i.types[op] = operand_type_and_not (i.types[op], anydisp);  in build_modrm_byte()
7502 		  i.types[op] = operand_type_or (i.types[op], newdisp);  in build_modrm_byte()
7504 	      else if (!i.tm.opcode_modifier.vecsib)  in build_modrm_byte()
7507 		  if (i.index_reg->reg_num == RegIZ)  in build_modrm_byte()
7508 		    i.sib.index = NO_INDEX_REGISTER;  in build_modrm_byte()
7510 		    i.sib.index = i.index_reg->reg_num;  in build_modrm_byte()
7511 		  i.sib.base = NO_BASE_REGISTER;  in build_modrm_byte()
7512 		  i.sib.scale = i.log2_scale_factor;  in build_modrm_byte()
7513 		  i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;  in build_modrm_byte()
7514 		  i.types[op].bitfield.disp8 = 0;  in build_modrm_byte()
7515 		  i.types[op].bitfield.disp16 = 0;  in build_modrm_byte()
7516 		  i.types[op].bitfield.disp64 = 0;  in build_modrm_byte()
7517 		  if (flag_code != CODE_64BIT || i.prefix[ADDR_PREFIX])  in build_modrm_byte()
7520 		      i.types[op].bitfield.disp32 = 1;  in build_modrm_byte()
7521 		      i.types[op].bitfield.disp32s = 0;  in build_modrm_byte()
7525 		      i.types[op].bitfield.disp32 = 0;  in build_modrm_byte()
7526 		      i.types[op].bitfield.disp32s = 1;  in build_modrm_byte()
7528 		  if ((i.index_reg->reg_flags & RegRex) != 0)  in build_modrm_byte()
7529 		    i.rex |= REX_X;  in build_modrm_byte()
7533 	  else if (i.base_reg->reg_num == RegIP)  in build_modrm_byte()
7535 	      gas_assert (!i.tm.opcode_modifier.vecsib);  in build_modrm_byte()
7536 	      i.rm.regmem = NO_BASE_REGISTER;  in build_modrm_byte()
7537 	      i.types[op].bitfield.disp8 = 0;  in build_modrm_byte()
7538 	      i.types[op].bitfield.disp16 = 0;  in build_modrm_byte()
7539 	      i.types[op].bitfield.disp32 = 0;  in build_modrm_byte()
7540 	      i.types[op].bitfield.disp32s = 1;  in build_modrm_byte()
7541 	      i.types[op].bitfield.disp64 = 0;  in build_modrm_byte()
7542 	      i.flags[op] |= Operand_PCrel;  in build_modrm_byte()
7543 	      if (! i.disp_operands)  in build_modrm_byte()
7546 	  else if (i.base_reg->reg_type.bitfield.word)  in build_modrm_byte()
7548 	      gas_assert (!i.tm.opcode_modifier.vecsib);  in build_modrm_byte()
7549 	      switch (i.base_reg->reg_num)  in build_modrm_byte()
7552 		  if (i.index_reg == 0)  in build_modrm_byte()
7553 		    i.rm.regmem = 7;  in build_modrm_byte()
7555 		    i.rm.regmem = i.index_reg->reg_num - 6;  in build_modrm_byte()
7559 		  if (i.index_reg == 0)  in build_modrm_byte()
7561 		      i.rm.regmem = 6;  in build_modrm_byte()
7562 		      if (operand_type_check (i.types[op], disp) == 0)  in build_modrm_byte()
7565 			  i.types[op].bitfield.disp8 = 1;  in build_modrm_byte()
7570 		    i.rm.regmem = i.index_reg->reg_num - 6 + 2;  in build_modrm_byte()
7573 		  i.rm.regmem = i.base_reg->reg_num - 6 + 4;  in build_modrm_byte()
7575 	      i.rm.mode = mode_from_disp_size (i.types[op]);  in build_modrm_byte()
7580 		  && operand_type_check (i.types[op], disp))  in build_modrm_byte()
7582 		  i.types[op].bitfield.disp16 = 0;  in build_modrm_byte()
7583 		  i.types[op].bitfield.disp64 = 0;  in build_modrm_byte()
7584 		  if (i.prefix[ADDR_PREFIX] == 0)  in build_modrm_byte()
7586 		      i.types[op].bitfield.disp32 = 0;  in build_modrm_byte()
7587 		      i.types[op].bitfield.disp32s = 1;  in build_modrm_byte()
7591 		      i.types[op].bitfield.disp32 = 1;  in build_modrm_byte()
7592 		      i.types[op].bitfield.disp32s = 0;  in build_modrm_byte()
7596 	      if (!i.tm.opcode_modifier.vecsib)  in build_modrm_byte()
7597 		i.rm.regmem = i.base_reg->reg_num;  in build_modrm_byte()
7598 	      if ((i.base_reg->reg_flags & RegRex) != 0)  in build_modrm_byte()
7599 		i.rex |= REX_B;  in build_modrm_byte()
7600 	      i.sib.base = i.base_reg->reg_num;  in build_modrm_byte()
7603 	      if (!(i.base_reg->reg_flags & RegRex)  in build_modrm_byte()
7604 		  && (i.base_reg->reg_num == EBP_REG_NUM  in build_modrm_byte()
7605 		   || i.base_reg->reg_num == ESP_REG_NUM))  in build_modrm_byte()
7607 	      if (i.base_reg->reg_num == 5 && i.disp_operands == 0)  in build_modrm_byte()
7610 		  i.types[op].bitfield.disp8 = 1;  in build_modrm_byte()
7612 	      i.sib.scale = i.log2_scale_factor;  in build_modrm_byte()
7613 	      if (i.index_reg == 0)  in build_modrm_byte()
7615 		  gas_assert (!i.tm.opcode_modifier.vecsib);  in build_modrm_byte()
7621 		  i.sib.index = NO_INDEX_REGISTER;  in build_modrm_byte()
7623 	      else if (!i.tm.opcode_modifier.vecsib)  in build_modrm_byte()
7625 		  if (i.index_reg->reg_num == RegIZ)  in build_modrm_byte()
7626 		    i.sib.index = NO_INDEX_REGISTER;  in build_modrm_byte()
7628 		    i.sib.index = i.index_reg->reg_num;  in build_modrm_byte()
7629 		  i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;  in build_modrm_byte()
7630 		  if ((i.index_reg->reg_flags & RegRex) != 0)  in build_modrm_byte()
7631 		    i.rex |= REX_X;  in build_modrm_byte()
7634 	      if (i.disp_operands  in build_modrm_byte()
7635 		  && (i.reloc[op] == BFD_RELOC_386_TLS_DESC_CALL  in build_modrm_byte()
7636 		      || i.reloc[op] == BFD_RELOC_X86_64_TLSDESC_CALL))  in build_modrm_byte()
7637 		i.rm.mode = 0;  in build_modrm_byte()
7641 		      && !i.disp_operands  in build_modrm_byte()
7642 		      && i.disp_encoding)  in build_modrm_byte()
7645 		      if (i.disp_encoding == disp_encoding_8bit)  in build_modrm_byte()
7646 			i.types[op].bitfield.disp8 = 1;  in build_modrm_byte()
7648 			i.types[op].bitfield.disp32 = 1;  in build_modrm_byte()
7650 		  i.rm.mode = mode_from_disp_size (i.types[op]);  in build_modrm_byte()
7660 	      gas_assert (i.op[op].disps == 0);  in build_modrm_byte()
7661 	      exp = &disp_expressions[i.disp_operands++];  in build_modrm_byte()
7662 	      i.op[op].disps = exp;  in build_modrm_byte()
7674       if (i.tm.opcode_modifier.vexsources == XOP2SOURCES)  in build_modrm_byte()
7676 	  if (operand_type_check (i.types[0], imm))  in build_modrm_byte()
7677 	    i.vex.register_specifier = NULL;  in build_modrm_byte()
7682 	      if (i.tm.opcode_modifier.vexw == VEXW0)  in build_modrm_byte()
7683 		i.vex.register_specifier = i.op[0].regs;  in build_modrm_byte()
7685 		i.vex.register_specifier = i.op[1].regs;  in build_modrm_byte()
7690 	  i.rm.reg = i.op[2].regs->reg_num;  in build_modrm_byte()
7691 	  if ((i.op[2].regs->reg_flags & RegRex) != 0)  in build_modrm_byte()
7692 	    i.rex |= REX_R;  in build_modrm_byte()
7695 	  if (!i.mem_operands)  in build_modrm_byte()
7697 	      i.rm.mode = 3;  in build_modrm_byte()
7699 	      if (i.tm.opcode_modifier.vexw == VEXW0)  in build_modrm_byte()
7700 		i.rm.regmem = i.op[1].regs->reg_num;  in build_modrm_byte()
7702 		i.rm.regmem = i.op[0].regs->reg_num;  in build_modrm_byte()
7704 	      if ((i.op[1].regs->reg_flags & RegRex) != 0)  in build_modrm_byte()
7705 		i.rex |= REX_B;  in build_modrm_byte()
7708       else if (i.tm.opcode_modifier.vexvvvv == VEXLWP)  in build_modrm_byte()
7710 	  i.vex.register_specifier = i.op[2].regs;  in build_modrm_byte()
7711 	  if (!i.mem_operands)  in build_modrm_byte()
7713 	      i.rm.mode = 3;  in build_modrm_byte()
7714 	      i.rm.regmem = i.op[1].regs->reg_num;  in build_modrm_byte()
7715 	      if ((i.op[1].regs->reg_flags & RegRex) != 0)  in build_modrm_byte()
7716 		i.rex |= REX_B;  in build_modrm_byte()
7723       else if (i.reg_operands)  in build_modrm_byte()
7728 	  for (op = 0; op < i.operands; op++)  in build_modrm_byte()
7730 	      if (i.types[op].bitfield.class == Reg  in build_modrm_byte()
7731 		  || i.types[op].bitfield.class == RegBND  in build_modrm_byte()
7732 		  || i.types[op].bitfield.class == RegMask  in build_modrm_byte()
7733 		  || i.types[op].bitfield.class == SReg  in build_modrm_byte()
7734 		  || i.types[op].bitfield.class == RegCR  in build_modrm_byte()
7735 		  || i.types[op].bitfield.class == RegDR  in build_modrm_byte()
7736 		  || i.types[op].bitfield.class == RegTR)  in build_modrm_byte()
7738 	      if (i.types[op].bitfield.class == RegSIMD)  in build_modrm_byte()
7740 		  if (i.types[op].bitfield.zmmword)  in build_modrm_byte()
7741 		    i.has_regzmm = TRUE;  in build_modrm_byte()
7742 		  else if (i.types[op].bitfield.ymmword)  in build_modrm_byte()
7743 		    i.has_regymm = TRUE;  in build_modrm_byte()
7745 		    i.has_regxmm = TRUE;  in build_modrm_byte()
7748 	      if (i.types[op].bitfield.class == RegMMX)  in build_modrm_byte()
7750 		  i.has_regmmx = TRUE;  in build_modrm_byte()
7757 	  else if (i.tm.opcode_modifier.vexvvvv == VEXXDS)  in build_modrm_byte()
7766 		  gas_assert (op < i.operands);  in build_modrm_byte()
7772 		  if (!i.tm.operand_types[op].bitfield.baseindex  in build_modrm_byte()
7773 		      && i.tm.operand_types[op + 1].bitfield.baseindex)  in build_modrm_byte()
7778 				  && op < i.operands);  in build_modrm_byte()
7783 		      gas_assert (vex_reg < i.operands);  in build_modrm_byte()
7787 	  else if (i.tm.opcode_modifier.vexvvvv == VEXNDD)  in build_modrm_byte()
7791 	      if (i.mem_operands == 0)  in build_modrm_byte()
7794 		  gas_assert ((op + 2) == i.operands);  in build_modrm_byte()
7800 		  gas_assert (op < i.imm_operands + 2  in build_modrm_byte()
7801 			      && i.operands == i.imm_operands + 2);  in build_modrm_byte()
7802 		  vex_reg = i.imm_operands + 1;  in build_modrm_byte()
7806 	    gas_assert (op < i.operands);  in build_modrm_byte()
7810 	      i386_operand_type *type = &i.tm.operand_types[vex_reg];  in build_modrm_byte()
7818 	      i.vex.register_specifier = i.op[vex_reg].regs;  in build_modrm_byte()
7826 	      if (i.tm.extension_opcode != None)  in build_modrm_byte()
7828 		  i.rm.regmem = i.op[op].regs->reg_num;  in build_modrm_byte()
7829 		  if ((i.op[op].regs->reg_flags & RegRex) != 0)  in build_modrm_byte()
7830 		    i.rex |= REX_B;  in build_modrm_byte()
7831 		  if ((i.op[op].regs->reg_flags & RegVRex) != 0)  in build_modrm_byte()
7832 		    i.vrex |= REX_B;  in build_modrm_byte()
7836 		  i.rm.reg = i.op[op].regs->reg_num;  in build_modrm_byte()
7837 		  if ((i.op[op].regs->reg_flags & RegRex) != 0)  in build_modrm_byte()
7838 		    i.rex |= REX_R;  in build_modrm_byte()
7839 		  if ((i.op[op].regs->reg_flags & RegVRex) != 0)  in build_modrm_byte()
7840 		    i.vrex |= REX_R;  in build_modrm_byte()
7847 	  if (!i.mem_operands)  in build_modrm_byte()
7848 	    i.rm.mode = 3;  in build_modrm_byte()
7852       if (i.tm.extension_opcode != None)  in build_modrm_byte()
7853 	i.rm.reg = i.tm.extension_opcode;  in build_modrm_byte()
7861   gas_assert (i.tm.operands == 1);  in flip_code16()
7863   return !(i.prefix[REX_PREFIX] & REX_W)  in flip_code16()
7864 	 && (code16 ? i.tm.operand_types[0].bitfield.disp32  in flip_code16()
7865 		      || i.tm.operand_types[0].bitfield.disp32s  in flip_code16()
7866 		    : i.tm.operand_types[0].bitfield.disp16)  in flip_code16()
7882   size = i.disp_encoding == disp_encoding_32bit ? BIG : SMALL;  in output_branch()
7885   if (i.prefix[DATA_PREFIX] != 0)  in output_branch()
7888       i.prefixes -= 1;  in output_branch()
7892   if (i.prefix[SEG_PREFIX] == CS_PREFIX_OPCODE /* not taken */  in output_branch()
7893       || i.prefix[SEG_PREFIX] == DS_PREFIX_OPCODE /* taken */)  in output_branch()
7896       i.prefixes--;  in output_branch()
7898   if (i.prefix[REX_PREFIX] != 0)  in output_branch()
7901       i.prefixes--;  in output_branch()
7905   if (i.prefix[BND_PREFIX] != 0)  in output_branch()
7908       i.prefixes--;  in output_branch()
7911   if (i.prefixes != 0)  in output_branch()
7912     as_warn (_("skipping prefixes on `%s'"), i.tm.name);  in output_branch()
7922   if (i.prefix[DATA_PREFIX] != 0)  in output_branch()
7924   if (i.prefix[SEG_PREFIX] == CS_PREFIX_OPCODE  in output_branch()
7925       || i.prefix[SEG_PREFIX] == DS_PREFIX_OPCODE)  in output_branch()
7926     *p++ = i.prefix[SEG_PREFIX];  in output_branch()
7927   if (i.prefix[BND_PREFIX] != 0)  in output_branch()
7929   if (i.prefix[REX_PREFIX] != 0)  in output_branch()
7930     *p++ = i.prefix[REX_PREFIX];  in output_branch()
7931   *p = i.tm.base_opcode;  in output_branch()
7941   sym = i.op[0].disps->X_add_symbol;  in output_branch()
7942   off = i.op[0].disps->X_add_number;  in output_branch()
7944   if (i.op[0].disps->X_op != O_constant  in output_branch()
7945       && i.op[0].disps->X_op != O_symbol)  in output_branch()
7948       sym = make_expr_symbol (i.op[0].disps);  in output_branch()
7954   frag_var (rs_machine_dependent, 5, i.reloc[0], subtype, sym, off, p);  in output_branch()
8002   bfd_reloc_code_real_type jump_reloc = i.reloc[0];  in output_jump()
8004   if (i.tm.opcode_modifier.jump == JUMP_BYTE)  in output_jump()
8008       if (i.prefix[ADDR_PREFIX] != 0)  in output_jump()
8011 	  i.prefixes -= 1;  in output_jump()
8014       if (i.prefix[SEG_PREFIX] == CS_PREFIX_OPCODE /* not taken */  in output_jump()
8015 	  || i.prefix[SEG_PREFIX] == DS_PREFIX_OPCODE /* taken */)  in output_jump()
8017 	  FRAG_APPEND_1_CHAR (i.prefix[SEG_PREFIX]);  in output_jump()
8018 	  i.prefixes--;  in output_jump()
8029       if (i.prefix[DATA_PREFIX] != 0)  in output_jump()
8032 	  i.prefixes -= 1;  in output_jump()
8042   if (i.prefix[BND_PREFIX] != 0)  in output_jump()
8044       FRAG_APPEND_1_CHAR (i.prefix[BND_PREFIX]);  in output_jump()
8045       i.prefixes -= 1;  in output_jump()
8048   if (i.prefix[REX_PREFIX] != 0)  in output_jump()
8050       FRAG_APPEND_1_CHAR (i.prefix[REX_PREFIX]);  in output_jump()
8051       i.prefixes -= 1;  in output_jump()
8054   if (i.prefixes != 0)  in output_jump()
8055     as_warn (_("skipping prefixes on `%s'"), i.tm.name);  in output_jump()
8057   p = frag_more (i.tm.opcode_length + size);  in output_jump()
8058   switch (i.tm.opcode_length)  in output_jump()
8061       *p++ = i.tm.base_opcode >> 8;  in output_jump()
8064       *p++ = i.tm.base_opcode;  in output_jump()
8073       && need_plt32_p (i.op[0].disps->X_add_symbol))  in output_jump()
8080 		      i.op[0].disps, 1, jump_reloc);  in output_jump()
8102   if (i.prefix[DATA_PREFIX] != 0)  in output_interseg_jump()
8105       i.prefixes -= 1;  in output_interseg_jump()
8109   gas_assert (!i.prefix[REX_PREFIX]);  in output_interseg_jump()
8115   if (i.prefixes != 0)  in output_interseg_jump()
8116     as_warn (_("skipping prefixes on `%s'"), i.tm.name);  in output_interseg_jump()
8121   if (i.prefix[DATA_PREFIX] != 0)  in output_interseg_jump()
8124   if (i.prefix[REX_PREFIX] != 0)  in output_interseg_jump()
8125     *p++ = i.prefix[REX_PREFIX];  in output_interseg_jump()
8127   *p++ = i.tm.base_opcode;  in output_interseg_jump()
8128   if (i.op[1].imms->X_op == O_constant)  in output_interseg_jump()
8130       offsetT n = i.op[1].imms->X_add_number;  in output_interseg_jump()
8143 		 i.op[1].imms, 0, reloc (size, 0, 0, i.reloc[1]));  in output_interseg_jump()
8144   if (i.op[0].imms->X_op != O_constant)  in output_interseg_jump()
8146 	    i.tm.name);  in output_interseg_jump()
8147   md_number_to_chars (p + size, (valueT) i.op[0].imms->X_add_number, 2);  in output_interseg_jump()
8297   if (i.base_reg && i.base_reg->reg_num == RegIP)  in maybe_fused_with_jcc_p()
8301   if (is_any_vex_encoding (&i.tm))  in maybe_fused_with_jcc_p()
8305   if ((i.tm.base_opcode >= 0x20 && i.tm.base_opcode <= 0x25)  in maybe_fused_with_jcc_p()
8306       || i.tm.base_opcode <= 5  in maybe_fused_with_jcc_p()
8307       || (i.tm.base_opcode >= 0x28 && i.tm.base_opcode <= 0x2d)  in maybe_fused_with_jcc_p()
8308       || ((i.tm.base_opcode | 3) == 0x83  in maybe_fused_with_jcc_p()
8309 	  && ((i.tm.extension_opcode | 1) == 0x5  in maybe_fused_with_jcc_p()
8310 	      || i.tm.extension_opcode == 0x0)))  in maybe_fused_with_jcc_p()
8311     return (i.types[1].bitfield.class == Reg  in maybe_fused_with_jcc_p()
8312 	    || i.types[1].bitfield.instance == Accum);  in maybe_fused_with_jcc_p()
8315   if ((i.tm.base_opcode | 1) == 0x85  in maybe_fused_with_jcc_p()
8316       || (i.tm.base_opcode | 1) == 0xa9  in maybe_fused_with_jcc_p()
8317       || ((i.tm.base_opcode | 1) == 0xf7  in maybe_fused_with_jcc_p()
8318 	  && i.tm.extension_opcode == 0)  in maybe_fused_with_jcc_p()
8319       || (i.tm.base_opcode >= 0x38 && i.tm.base_opcode <= 0x3d)  in maybe_fused_with_jcc_p()
8320       || ((i.tm.base_opcode | 3) == 0x83  in maybe_fused_with_jcc_p()
8321 	  && (i.tm.extension_opcode == 0x7)))  in maybe_fused_with_jcc_p()
8322     return (i.types[0].bitfield.class == Reg  in maybe_fused_with_jcc_p()
8323 	    || i.types[0].bitfield.instance == Accum  in maybe_fused_with_jcc_p()
8324 	    || i.types[1].bitfield.class == Reg  in maybe_fused_with_jcc_p()
8325 	    || i.types[1].bitfield.instance == Accum);  in maybe_fused_with_jcc_p()
8328   if ((i.tm.cpu_flags.bitfield.cpuno64  in maybe_fused_with_jcc_p()
8329        && (i.tm.base_opcode | 0xf) == 0x4f)  in maybe_fused_with_jcc_p()
8330       || ((i.tm.base_opcode | 1) == 0xff  in maybe_fused_with_jcc_p()
8331 	  && i.tm.extension_opcode <= 0x1))  in maybe_fused_with_jcc_p()
8332     return (i.types[0].bitfield.class == Reg  in maybe_fused_with_jcc_p()
8333 	    || i.types[0].bitfield.instance == Accum);  in maybe_fused_with_jcc_p()
8358 		       last_insn.name, i.tm.name);  in add_fused_jcc_padding_frag_p()
8374       || i.tm.cpu_flags.bitfield.cpupadlock  in add_branch_prefix_frag_p()
8380   if (!i.operands || i.tm.opcode_modifier.isprefix)  in add_branch_prefix_frag_p()
8390 		   last_insn.name, i.tm.name);  in add_branch_prefix_frag_p()
8411   if (i.tm.opcode_modifier.jump == JUMP)  in add_branch_padding_frag_p()
8413       if (i.tm.base_opcode == JUMP_PC_RELATIVE)  in add_branch_padding_frag_p()
8425   else if (is_any_vex_encoding (&i.tm))  in add_branch_padding_frag_p()
8427   else if ((i.tm.base_opcode | 1) == 0xc3)  in add_branch_padding_frag_p()
8437       if (i.tm.base_opcode == 0xe8)  in add_branch_padding_frag_p()
8444       else if (i.tm.base_opcode == 0xff  in add_branch_padding_frag_p()
8445 	       && (i.tm.extension_opcode == 2  in add_branch_padding_frag_p()
8446 		   || i.tm.extension_opcode == 4))  in add_branch_padding_frag_p()
8455 	  && i.disp_operands  in add_branch_padding_frag_p()
8457 	  && (i.op[0].disps->X_op == O_symbol  in add_branch_padding_frag_p()
8458 	      || (i.op[0].disps->X_op == O_subtract  in add_branch_padding_frag_p()
8459 		  && i.op[0].disps->X_op_symbol == GOT_symbol)))  in add_branch_padding_frag_p()
8461 	  symbolS *s = i.op[0].disps->X_add_symbol;  in add_branch_padding_frag_p()
8476 		       last_insn.name, i.tm.name);  in add_branch_padding_frag_p()
8494       if (i.tm.cpu_flags.bitfield.cpucmov)  in output_insn()
8496       if (i.tm.cpu_flags.bitfield.cpusse)  in output_insn()
8498       if (i.tm.cpu_flags.bitfield.cpusse2)  in output_insn()
8500       if (i.tm.cpu_flags.bitfield.cpusse3)  in output_insn()
8502       if (i.tm.cpu_flags.bitfield.cpussse3)  in output_insn()
8504       if (i.tm.cpu_flags.bitfield.cpusse4_1)  in output_insn()
8506       if (i.tm.cpu_flags.bitfield.cpusse4_2)  in output_insn()
8508       if (i.tm.cpu_flags.bitfield.cpuavx)  in output_insn()
8510       if (i.tm.cpu_flags.bitfield.cpuavx2)  in output_insn()
8512       if (i.tm.cpu_flags.bitfield.cpufma)  in output_insn()
8514       if (i.tm.cpu_flags.bitfield.cpuavx512f)  in output_insn()
8516       if (i.tm.cpu_flags.bitfield.cpuavx512cd)  in output_insn()
8518       if (i.tm.cpu_flags.bitfield.cpuavx512er)  in output_insn()
8520       if (i.tm.cpu_flags.bitfield.cpuavx512pf)  in output_insn()
8522       if (i.tm.cpu_flags.bitfield.cpuavx512vl)  in output_insn()
8524       if (i.tm.cpu_flags.bitfield.cpuavx512dq)  in output_insn()
8526       if (i.tm.cpu_flags.bitfield.cpuavx512bw)  in output_insn()
8528       if (i.tm.cpu_flags.bitfield.cpuavx512_4fmaps)  in output_insn()
8530       if (i.tm.cpu_flags.bitfield.cpuavx512_4vnniw)  in output_insn()
8532       if (i.tm.cpu_flags.bitfield.cpuavx512_bitalg)  in output_insn()
8534       if (i.tm.cpu_flags.bitfield.cpuavx512ifma)  in output_insn()
8536       if (i.tm.cpu_flags.bitfield.cpuavx512vbmi)  in output_insn()
8538       if (i.tm.cpu_flags.bitfield.cpuavx512_vbmi2)  in output_insn()
8540       if (i.tm.cpu_flags.bitfield.cpuavx512_vnni)  in output_insn()
8542       if (i.tm.cpu_flags.bitfield.cpuavx512_bf16)  in output_insn()
8545       if (i.tm.cpu_flags.bitfield.cpu8087  in output_insn()
8546 	  || i.tm.cpu_flags.bitfield.cpu287  in output_insn()
8547 	  || i.tm.cpu_flags.bitfield.cpu387  in output_insn()
8548 	  || i.tm.cpu_flags.bitfield.cpu687  in output_insn()
8549 	  || i.tm.cpu_flags.bitfield.cpufisttp)  in output_insn()
8551       if (i.has_regmmx  in output_insn()
8552 	  || i.tm.base_opcode == 0xf77 /* emms */  in output_insn()
8553 	  || i.tm.base_opcode == 0xf0e /* femms */)  in output_insn()
8555       if (i.has_regxmm)  in output_insn()
8557       if (i.has_regymm)  in output_insn()
8559       if (i.has_regzmm)  in output_insn()
8561       if (i.tm.cpu_flags.bitfield.cpufxsr)  in output_insn()
8563       if (i.tm.cpu_flags.bitfield.cpuxsave)  in output_insn()
8565       if (i.tm.cpu_flags.bitfield.cpuxsaveopt)  in output_insn()
8567       if (i.tm.cpu_flags.bitfield.cpuxsavec)  in output_insn()
8606   if (i.tm.opcode_modifier.jump == JUMP)  in output_insn()
8608   else if (i.tm.opcode_modifier.jump == JUMP_BYTE  in output_insn()
8609 	   || i.tm.opcode_modifier.jump == JUMP_DWORD)  in output_insn()
8611   else if (i.tm.opcode_modifier.jump == JUMP_INTERSEGMENT)  in output_insn()
8622 	  && (i.tm.base_opcode == 0xfaee8  in output_insn()
8623 	      || i.tm.base_opcode == 0xfaef0  in output_insn()
8624 	      || i.tm.base_opcode == 0xfaef8))  in output_insn()
8638 	  if (i.tm.base_opcode == LOCK_PREFIX_OPCODE)  in output_insn()
8640 	  i.prefix[LOCK_PREFIX] = 0;  in output_insn()
8680       if (!i.tm.opcode_modifier.vex && !i.tm.opcode_modifier.evex)  in output_insn()
8682 	  switch (i.tm.opcode_length)  in output_insn()
8685 	      if (i.tm.base_opcode & 0xff000000)  in output_insn()
8687 		  prefix = (i.tm.base_opcode >> 24) & 0xff;  in output_insn()
8688 		  if (!i.tm.cpu_flags.bitfield.cpupadlock  in output_insn()
8690 		      || (i.prefix[REP_PREFIX] != REPE_PREFIX_OPCODE))  in output_insn()
8695 	      if ((i.tm.base_opcode & 0xff0000) != 0)  in output_insn()
8697 		  prefix = (i.tm.base_opcode >> 16) & 0xff;  in output_insn()
8718 	      && i.operands == 2  in output_insn()
8719 	      && i.reloc[0] == BFD_RELOC_X86_64_GOTTPOFF  in output_insn()
8720 	      && i.prefix[REX_PREFIX] == 0)  in output_insn()
8725 	  for (j = ARRAY_SIZE (i.prefix), q = i.prefix; j > 0; j--, q++)  in output_insn()
8731 	  for (j = 0, q = i.prefix; j < ARRAY_SIZE (i.prefix); j++, q++)  in output_insn()
8751 	  if (i.vrex)  in output_insn()
8754 	  p = frag_more (i.vex.length);  in output_insn()
8755 	  for (j = 0; j < i.vex.length; j++)  in output_insn()
8756 	    p[j] = i.vex.bytes[j];  in output_insn()
8760       if (i.tm.opcode_length == 1)  in output_insn()
8762 	  FRAG_APPEND_1_CHAR (i.tm.base_opcode);  in output_insn()
8766 	  switch (i.tm.opcode_length)  in output_insn()
8770 	      *p++ = (i.tm.base_opcode >> 24) & 0xff;  in output_insn()
8771 	      *p++ = (i.tm.base_opcode >> 16) & 0xff;  in output_insn()
8775 	      *p++ = (i.tm.base_opcode >> 16) & 0xff;  in output_insn()
8786 	  *p++ = (i.tm.base_opcode >> 8) & 0xff;  in output_insn()
8787 	  *p = i.tm.base_opcode & 0xff;  in output_insn()
8791       if (i.tm.opcode_modifier.modrm)  in output_insn()
8793 	  FRAG_APPEND_1_CHAR ((i.rm.regmem << 0  in output_insn()
8794 			       | i.rm.reg << 3  in output_insn()
8795 			       | i.rm.mode << 6));  in output_insn()
8800 	  if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING  in output_insn()
8801 	      && i.rm.mode != 3  in output_insn()
8802 	      && !(i.base_reg && i.base_reg->reg_type.bitfield.word))  in output_insn()
8803 	    FRAG_APPEND_1_CHAR ((i.sib.base << 0  in output_insn()
8804 				 | i.sib.index << 3  in output_insn()
8805 				 | i.sib.scale << 6));  in output_insn()
8808       if (i.disp_operands)  in output_insn()
8811       if (i.imm_operands)  in output_insn()
8831 	      unsigned int max = i.has_gotpc_tls_reloc ? 0 : 15 - j;  in output_insn()
8833 	      unsigned int count = i.vex.length;  in output_insn()
8835 	      for (k = 0; k < ARRAY_SIZE (i.prefix); k++)  in output_insn()
8837 		if (i.prefix[k] && (k != REX_PREFIX || !i.vex.length))  in output_insn()
8841 	      if (!i.vex.length)  in output_insn()
8842 		switch (i.tm.opcode_length)  in output_insn()
8845 		    if (((i.tm.base_opcode >> 16) & 0xff) == 0xf)  in output_insn()
8848 			switch ((i.tm.base_opcode >> 8) & 0xff)  in output_insn()
8860 		    if (((i.tm.base_opcode >> 8) & 0xff) == 0xf)  in output_insn()
8899 	      if (i.prefix[SEG_PREFIX])  in output_insn()
8900 		fragP->tc_frag_data.default_prefix = i.prefix[SEG_PREFIX];  in output_insn()
8903 	      else if (i.base_reg  in output_insn()
8904 		       && (i.base_reg->reg_num == 4  in output_insn()
8905 			   || i.base_reg->reg_num == 5))  in output_insn()
8927       pi ("" /*line*/, &i);  in output_insn()
8939   if (i.types[n].bitfield.disp64)  in disp_size()
8941   else if (i.types[n].bitfield.disp8)  in disp_size()
8943   else if (i.types[n].bitfield.disp16)  in disp_size()
8954   if (i.types[n].bitfield.imm64)  in imm_size()
8956   else if (i.types[n].bitfield.imm8 || i.types[n].bitfield.imm8s)  in imm_size()
8958   else if (i.types[n].bitfield.imm16)  in imm_size()
8969   for (n = 0; n < i.operands; n++)  in output_disp()
8971       if (operand_type_check (i.types[n], disp))  in output_disp()
8973 	  if (i.op[n].disps->X_op == O_constant)  in output_disp()
8976 	      offsetT val = i.op[n].disps->X_add_number;  in output_disp()
8978 	      val = offset_in_range (val >> (size == 1 ? i.memshift : 0),  in output_disp()
8987 	      int sign = i.types[n].bitfield.disp32s;  in output_disp()
8988 	      int pcrel = (i.flags[n] & Operand_PCrel) != 0;  in output_disp()
8992 	      gas_assert (!i.types[n].bitfield.disp8);  in output_disp()
8997 	      if (pcrel && i.imm_operands)  in output_disp()
9002 		  for (n1 = 0; n1 < i.operands; n1++)  in output_disp()
9003 		    if (operand_type_check (i.types[n1], imm))  in output_disp()
9009 			i.op[n].disps->X_add_number -= sz;  in output_disp()
9016 	      reloc_type = reloc (size, pcrel, sign, i.reloc[n]);  in output_disp()
9018 		  && GOT_symbol == i.op[n].disps->X_add_symbol  in output_disp()
9023 		       && (i.op[n].disps->X_op == O_symbol  in output_disp()
9024 			   || (i.op[n].disps->X_op == O_add  in output_disp()
9026 				    (i.op[n].disps->X_op_symbol)->X_op)  in output_disp()
9033 		      i.has_gotpc_tls_reloc = TRUE;  in output_disp()
9034 		      i.op[n].imms->X_add_number +=  in output_disp()
9061 		      i.has_gotpc_tls_reloc = TRUE;  in output_disp()
9067 				  size, i.op[n].disps, pcrel,  in output_disp()
9074 	      if (i.prefix[DATA_PREFIX] == 0  in output_disp()
9077 			  && i.rm.mode == 0  in output_disp()
9078 			  && i.rm.regmem == 5))  in output_disp()
9079 		  && (i.rm.mode == 2  in output_disp()
9080 		      || (i.rm.mode == 0 && i.rm.regmem == 5))  in output_disp()
9081 		  && ((i.operands == 1  in output_disp()
9082 		       && i.tm.base_opcode == 0xff  in output_disp()
9083 		       && (i.rm.reg == 2 || i.rm.reg == 4))  in output_disp()
9084 		      || (i.operands == 2  in output_disp()
9085 			  && (i.tm.base_opcode == 0x8b  in output_disp()
9086 			      || i.tm.base_opcode == 0x85  in output_disp()
9087 			      || (i.tm.base_opcode & 0xc7) == 0x03))))  in output_disp()
9091 		      fixP->fx_tcbit = i.rex != 0;  in output_disp()
9092 		      if (i.base_reg  in output_disp()
9093 			  && (i.base_reg->reg_num == RegIP))  in output_disp()
9110   for (n = 0; n < i.operands; n++)  in output_imm()
9113       if (i.rounding && (int) n == i.rounding->operand)  in output_imm()
9116       if (operand_type_check (i.types[n], imm))  in output_imm()
9118 	  if (i.op[n].imms->X_op == O_constant)  in output_imm()
9123 	      val = offset_in_range (i.op[n].imms->X_add_number,  in output_imm()
9138 	      if (i.types[n].bitfield.imm32s  in output_imm()
9139 		  && (i.suffix == QWORD_MNEM_SUFFIX  in output_imm()
9140 		      || (!i.suffix && i.tm.opcode_modifier.no_lsuf)))  in output_imm()
9146 	      reloc_type = reloc (size, 0, sign, i.reloc[n]);  in output_imm()
9194 		  && GOT_symbol == i.op[n].imms->X_add_symbol  in output_imm()
9195 		  && (i.op[n].imms->X_op == O_symbol  in output_imm()
9196 		      || (i.op[n].imms->X_op == O_add  in output_imm()
9198 			       (i.op[n].imms->X_op_symbol)->X_op)  in output_imm()
9207 		  i.has_gotpc_tls_reloc = TRUE;  in output_imm()
9208 		  i.op[n].imms->X_add_number +=  in output_imm()
9212 			   i.op[n].imms, 0, reloc_type);  in output_imm()
9634 	      if (i.broadcast)  in check_VecOperations()
9660 	      i.broadcast = &broadcast_op;  in check_VecOperations()
9673 	      if (!i.mask)  in check_VecOperations()
9678 		  i.mask = &mask_op;  in check_VecOperations()
9682 		  if (i.mask->mask)  in check_VecOperations()
9685 		  i.mask->mask = mask;  in check_VecOperations()
9689 		  if (i.mask->operand != this_operand)  in check_VecOperations()
9701 	      if (!i.mask)  in check_VecOperations()
9706 		  i.mask = &mask_op;  in check_VecOperations()
9710 		  if (i.mask->zeroing)  in check_VecOperations()
9717 		  i.mask->zeroing = 1;  in check_VecOperations()
9721 		  if (i.mask->operand != this_operand)  in check_VecOperations()
9754   if (i.mask && i.mask->zeroing && !i.mask->mask)  in check_VecOperations()
9774   if (i.imm_operands == MAX_IMMEDIATE_OPERANDS)  in i386_immediate()
9781   exp = &im_expressions[i.imm_operands++];  in i386_immediate()
9782   i.op[this_operand].imms = exp;  in i386_immediate()
9790   gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types);  in i386_immediate()
9836       i.types[this_operand].bitfield.imm64 = 1;  in i386_finalize_immediate()
9867       i.types[this_operand].bitfield.imm8 = 1;  in i386_finalize_immediate()
9868       i.types[this_operand].bitfield.imm16 = 1;  in i386_finalize_immediate()
9869       i.types[this_operand].bitfield.imm32 = 1;  in i386_finalize_immediate()
9870       i.types[this_operand].bitfield.imm32s = 1;  in i386_finalize_immediate()
9871       i.types[this_operand].bitfield.imm64 = 1;  in i386_finalize_immediate()
9872       i.types[this_operand] = operand_type_and (i.types[this_operand],  in i386_finalize_immediate()
9891       i.log2_scale_factor = 0;  in i386_scale()
9894       i.log2_scale_factor = 1;  in i386_scale()
9897       i.log2_scale_factor = 2;  in i386_scale()
9900       i.log2_scale_factor = 3;  in i386_scale()
9914   if (i.log2_scale_factor != 0 && i.index_reg == 0)  in i386_scale()
9917 	       1 << i.log2_scale_factor);  in i386_scale()
9918       i.log2_scale_factor = 0;  in i386_scale()
9936   if (i.disp_operands == MAX_MEMORY_OPERANDS)  in i386_displacement()
9944   if (i.jumpabsolute  in i386_displacement()
9945       || i.types[this_operand].bitfield.baseindex  in i386_displacement()
9950       override = (i.prefix[ADDR_PREFIX] != 0);  in i386_displacement()
9991       override = (i.prefix[DATA_PREFIX] != 0);  in i386_displacement()
9994 	  if ((override || i.suffix == WORD_MNEM_SUFFIX)  in i386_displacement()
10003 	    override = (i.suffix == (flag_code != CODE_16BIT  in i386_displacement()
10014   i.types[this_operand] = operand_type_or (i.types[this_operand],  in i386_displacement()
10017   exp = &disp_expressions[i.disp_operands];  in i386_displacement()
10018   i.op[this_operand].disps = exp;  in i386_displacement()
10019   i.disp_operands++;  in i386_displacement()
10029   if (i.types[this_operand].bitfield.baseIndex  in i386_displacement()
10068   gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types);  in i386_displacement()
10106   if (i.reloc[this_operand] == BFD_RELOC_386_GOTOFF  in i386_finalize_displacement()
10107       || i.reloc[this_operand] == BFD_RELOC_X86_64_GOTPCREL  in i386_finalize_displacement()
10108       || i.reloc[this_operand] == BFD_RELOC_X86_64_GOTOFF64)  in i386_finalize_displacement()
10119       if (i.reloc[this_operand] == BFD_RELOC_X86_64_GOTPCREL)  in i386_finalize_displacement()
10120 	i.reloc[this_operand] = BFD_RELOC_32_PCREL;  in i386_finalize_displacement()
10121       else if (i.reloc[this_operand] == BFD_RELOC_X86_64_GOTOFF64)  in i386_finalize_displacement()
10122 	i.reloc[this_operand] = BFD_RELOC_64;  in i386_finalize_displacement()
10124 	i.reloc[this_operand] = BFD_RELOC_32;  in i386_finalize_displacement()
10138 	   && !i.prefix[ADDR_PREFIX]  in i386_finalize_displacement()
10143       i.types[this_operand].bitfield.disp32 = 0;  in i386_finalize_displacement()
10146 	  i.types[this_operand].bitfield.disp32s = 0;  in i386_finalize_displacement()
10147 	  if (i.types[this_operand].bitfield.baseindex)  in i386_finalize_displacement()
10174     i.types[this_operand].bitfield.disp8 = 1;  in i386_finalize_displacement()
10177   bigdisp = i.types[this_operand];  in i386_finalize_displacement()
10184     i.types[this_operand] = operand_type_and (i.types[this_operand],  in i386_finalize_displacement()
10199   if (i.prefix[ADDR_PREFIX])  in i386_addressing_mode()
10206       if (i.mem_operands == 0)  in i386_addressing_mode()
10209 	  const reg_entry *addr_reg = i.base_reg;  in i386_addressing_mode()
10212 	    addr_reg = i.index_reg;  in i386_addressing_mode()
10224 		  i.prefix[ADDR_PREFIX] = ADDR_PREFIX_OPCODE;  in i386_addressing_mode()
10225 		  i.prefixes += 1;  in i386_addressing_mode()
10233 		      && (i.types[this_operand].bitfield.disp16  in i386_addressing_mode()
10234 			  || i.types[this_operand].bitfield.disp32))  in i386_addressing_mode()
10235 		    i.types[this_operand]  in i386_addressing_mode()
10236 		      = operand_type_xor (i.types[this_operand], disp16_32);  in i386_addressing_mode()
10258 	  || i.mem_operands))  in i386_index_check()
10280 	      || ((!i.mem_operands != !intel_syntax)  in i386_index_check()
10289       if (i.base_reg != expected_reg  in i386_index_check()
10290 	  || i.index_reg  in i386_index_check()
10291 	  || operand_type_check (i.types[this_operand], disp))  in i386_index_check()
10295 	  if (i.mem_operands  in i386_index_check()
10296 	      && i.base_reg  in i386_index_check()
10298 		    && i.base_reg->reg_type.bitfield.qword)  in i386_index_check()
10300 		       ? i.base_reg->reg_type.bitfield.dword  in i386_index_check()
10301 		       : i.base_reg->reg_type.bitfield.word)))  in i386_index_check()
10325 	  if ((i.base_reg  in i386_index_check()
10327 		    ? !i.base_reg->reg_type.bitfield.qword  in i386_index_check()
10328 		    : !i.base_reg->reg_type.bitfield.dword)  in i386_index_check()
10329 		   || (i.index_reg && i.base_reg->reg_num == RegIP)  in i386_index_check()
10330 		   || i.base_reg->reg_num == RegIZ))  in i386_index_check()
10331 	      || (i.index_reg  in i386_index_check()
10332 		  && !i.index_reg->reg_type.bitfield.xmmword  in i386_index_check()
10333 		  && !i.index_reg->reg_type.bitfield.ymmword  in i386_index_check()
10334 		  && !i.index_reg->reg_type.bitfield.zmmword  in i386_index_check()
10336 		       ? !i.index_reg->reg_type.bitfield.qword  in i386_index_check()
10337 		       : !i.index_reg->reg_type.bitfield.dword)  in i386_index_check()
10338 		      || !i.index_reg->reg_type.bitfield.baseindex)))  in i386_index_check()
10346 	      if (i.base_reg && i.base_reg->reg_num == RegIP)  in i386_index_check()
10354 		  && i.log2_scale_factor)  in i386_index_check()
10361 	  if ((i.base_reg  in i386_index_check()
10362 	       && (!i.base_reg->reg_type.bitfield.word  in i386_index_check()
10363 		   || !i.base_reg->reg_type.bitfield.baseindex))  in i386_index_check()
10364 	      || (i.index_reg  in i386_index_check()
10365 		  && (!i.index_reg->reg_type.bitfield.word  in i386_index_check()
10366 		      || !i.index_reg->reg_type.bitfield.baseindex  in i386_index_check()
10367 		      || !(i.base_reg  in i386_index_check()
10368 			   && i.base_reg->reg_num < 6  in i386_index_check()
10369 			   && i.index_reg->reg_num >= 6  in i386_index_check()
10370 			   && i.log2_scale_factor == 0))))  in i386_index_check()
10395 	  if (!i.rounding)  in RC_SAE_immediate()
10399 	      i.rounding = &rc_op;  in RC_SAE_immediate()
10426   exp = &im_expressions[i.imm_operands++];  in RC_SAE_immediate()
10427   i.op[this_operand].imms = exp;  in RC_SAE_immediate()
10434   i.types[this_operand].bitfield.imm8 = 1;  in RC_SAE_immediate()
10445   gas_assert (i.mem_operands == 1);  in maybe_adjust_templates()
10470 	  i.mem_operands = 0;  in maybe_adjust_templates()
10471 	  if (i.memop1_string != NULL  in maybe_adjust_templates()
10472 	      && i386_index_check (i.memop1_string) == 0)  in maybe_adjust_templates()
10474 	  i.mem_operands = 1;  in maybe_adjust_templates()
10501       i.jumpabsolute = TRUE;  in i386_att_operand()
10519 	      i.seg[i.mem_operands] = &es;  in i386_att_operand()
10522 	      i.seg[i.mem_operands] = &cs;  in i386_att_operand()
10525 	      i.seg[i.mem_operands] = &ss;  in i386_att_operand()
10528 	      i.seg[i.mem_operands] = &ds;  in i386_att_operand()
10531 	      i.seg[i.mem_operands] = &fs;  in i386_att_operand()
10534 	      i.seg[i.mem_operands] = &gs;  in i386_att_operand()
10557 	      i.jumpabsolute = TRUE;  in i386_att_operand()
10577       i.types[this_operand] = operand_type_or (i.types[this_operand],  in i386_att_operand()
10579       i.types[this_operand].bitfield.unspecified = 0;  in i386_att_operand()
10580       i.op[this_operand].regs = r;  in i386_att_operand()
10581       i.reg_operands++;  in i386_att_operand()
10591       if (i.jumpabsolute)  in i386_att_operand()
10618       if (i.mem_operands == 1 && !maybe_adjust_templates ())  in i386_att_operand()
10620       if ((i.mem_operands == 1  in i386_att_operand()
10622 	  || i.mem_operands == 2)  in i386_att_operand()
10676 	      || ((i.base_reg = parse_register (base_string, &end_op))  in i386_att_operand()
10681 	      i.types[this_operand].bitfield.baseindex = 1;  in i386_att_operand()
10683 	      if (i.base_reg)  in i386_att_operand()
10697 		  if ((i.index_reg = parse_register (base_string, &end_op))  in i386_att_operand()
10745 		  else if (!i.index_reg)  in i386_att_operand()
10782       if (i.base_reg  in i386_att_operand()
10783 	  && i.base_reg->reg_type.bitfield.instance == RegD  in i386_att_operand()
10784 	  && i.base_reg->reg_type.bitfield.word  in i386_att_operand()
10785 	  && i.index_reg == 0  in i386_att_operand()
10786 	  && i.log2_scale_factor == 0  in i386_att_operand()
10787 	  && i.seg[i.mem_operands] == 0  in i386_att_operand()
10788 	  && !operand_type_check (i.types[this_operand], disp))  in i386_att_operand()
10790 	  i.types[this_operand] = i.base_reg->reg_type;  in i386_att_operand()
10796       i.flags[this_operand] |= Operand_Mem;  in i386_att_operand()
10797       if (i.mem_operands == 0)  in i386_att_operand()
10798 	i.memop1_string = xstrdup (operand_string);  in i386_att_operand()
10799       i.mem_operands++;  in i386_att_operand()
11883       i.vec_encoding = vex_encoding_evex;  in parse_real_register()
11927 	    i.vec_encoding = vex_encoding_evex;  in parse_register()