Lines Matching refs:SI
195 (define_mode_iterator I48MODE [SI DI])
203 (define_mode_attr load [(QI "lb") (HI "lh") (SI "lw")])
204 (define_mode_attr store [(QI "sb") (HI "sh") (SI "sw")])
409 [(set (match_operand:SI 0 "nonimmediate_operand" "")
410 (match_operand:SI 1 "nonautoinc_operand" ""))]
418 [(set (match_operand:SI 0 "register_operand" "=r")
419 (high:SI (match_operand:SI 1 "symbolic_operand" "in")))]
425 [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,r,r,r,U,m")
426 (match_operand:SI 1 "move_operand" "r,I,J,K,N,P,U,m,rO,rO"))]
533 [(set (match_operand:SI 0 "register_operand" "")
534 (sign_extract:SI
536 (match_operand:SI 2 "immediate_operand" "")
537 (match_operand:SI 3 "immediate_operand" "")))]
563 [(set (match_operand:SI 0 "register_operand" "")
564 (zero_extract:SI
566 (match_operand:SI 2 "immediate_operand" "")
567 (match_operand:SI 3 "immediate_operand" "")))]
598 [(set (match_operand:SI 0 "register_operand" "=r")
599 (plus:SI (mult:SI (match_operand:SI 1 "reg_or_0_operand" "rO")
600 (match_operand:SI 2 "cint_248_operand" "I"))
601 (match_operand:SI 3 "reg_or_0_operand" "rO")))]
606 [(set (match_operand:SI 0 "register_operand" "")
607 (plus:SI (match_operand:SI 1 "register_operand" "")
608 (match_operand:SI 2 "reg_or_cint_operand" "")))]
616 [(set (match_operand:SI 0 "register_operand" "=r")
617 (plus:SI
618 (match_operand:SI 1 "reg_or_0_operand" "%rO")
619 (high:SI (match_operand:SI 2 "const_symbolic_operand" "T"))))]
625 [(set (match_operand:SI 0 "register_operand" "=r")
626 (lo_sum:SI
627 (match_operand:SI 1 "reg_or_0_operand" "%rO")
628 (match_operand:SI 2 "const_symbolic_operand" "T")))]
634 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
635 (plus:SI (match_operand:SI 1 "reg_or_0_operand" "%rO,rO,rO,rO")
636 (match_operand:SI 2 "add_operand" "r,I,J,K")))]
646 [(set (match_operand:SI 0 "register_operand" "=r")
647 (minus:SI (match_operand:SI 1 "reg_or_0_operand" "rO")
648 (match_operand:SI 2 "reg_or_0_operand" "rO")))]
653 [(set (match_operand:SI 0 "register_operand" "=r")
654 (neg:SI (match_operand:SI 1 "reg_or_0_operand" "rO")))]
659 [(set (match_operand:SI 0 "register_operand" "=r")
660 (ss_plus:SI (match_operand:SI 1 "reg_or_0_operand" "rO")
661 (match_operand:SI 2 "reg_or_0_operand" "rO")))]
667 [(set (match_operand:SI 0 "register_operand" "=r")
668 (ss_minus:SI (match_operand:SI 1 "reg_or_0_operand" "rO")
669 (match_operand:SI 2 "reg_or_0_operand" "rO")))]
680 [(set (match_operand:SI 0 "register_operand" "=r,r")
681 (binop_u5bit:SI (match_operand:SI 1 "reg_or_0_operand" "rO,rO")
682 (match_operand:SI 2 "reg_or_u5bit_operand" "I,rO")))]
694 [(set (match_operand:SI 0 "register_operand" "")
695 (match_operator:SI 1 "ordered_comparison_operator"
702 [(set (match_operand:SI 0 "register_operand" "=r,r")
703 (eq:SI (match_operand:SI 1 "reg_or_0_operand" "%rO,rO")
704 (match_operand:SI 2 "reg_or_cint_operand" "I,rO")))]
711 [(set (match_operand:SI 0 "register_operand" "=r")
712 (ne:SI (match_operand:SI 1 "reg_or_0_operand" "rO")
713 (match_operand:SI 2 "reg_or_cint_operand" "rO")))]
718 [(set (match_operand:SI 0 "register_operand" "=r,r")
719 (lt:SI (match_operand:SI 1 "reg_or_0_operand" "rO,rO")
720 (match_operand:SI 2 "reg_or_cint_operand" "I,rO")))]
727 [(set (match_operand:SI 0 "register_operand" "=r,r")
728 (le:SI (match_operand:SI 1 "reg_or_0_operand" "rO,rO")
729 (match_operand:SI 2 "reg_or_cint_operand" "L,rO")))]
736 [(set (match_operand:SI 0 "register_operand" "=r,r")
737 (ltu:SI (match_operand:SI 1 "reg_or_0_operand" "rO,rO")
738 (match_operand:SI 2 "reg_or_cint_operand" "I,rO")))]
745 [(set (match_operand:SI 0 "register_operand" "=r,r")
746 (leu:SI (match_operand:SI 1 "reg_or_0_operand" "rO,rO")
747 (match_operand:SI 2 "reg_or_cint_operand" "Q,rO")))]
759 [(set (match_operand:SI 0 "register_operand" "=r,r,r")
760 (and:SI (match_operand:SI 1 "reg_or_0_operand" "%rO,rO,rO")
761 (match_operand:SI 2 "and_operand" "I,M,rO")))]
770 [(set (match_operand:SI 0 "register_operand" "=r,r")
771 (ior:SI (match_operand:SI 1 "reg_or_0_operand" "%rO,rO")
772 (match_operand:SI 2 "reg_or_s8bit_operand" "I,rO")))]
779 [(set (match_operand:SI 0 "register_operand" "=r,r")
780 (xor:SI (match_operand:SI 1 "reg_or_0_operand" "%rO,rO")
781 (match_operand:SI 2 "reg_or_s8bit_operand" "rO,I")))]
790 [(set (match_operand:SI 0 "register_operand" "=r")
791 (unop:SI (match_operand:SI 1 "reg_or_0_operand" "rO")))]
916 [(set (match_operand:SI 0 "register_operand" "")
917 (parity:SI (match_operand:SI 1 "reg_or_0_operand" "")))]
949 [(set (match_operand:SI 0 "register_operand" "=r")
950 (not:SI (match_operand:SI 1 "reg_or_0_operand" "rO")))]
960 [(set (match_operand:SI 0 "register_operand" "")
961 (if_then_else:SI (match_operand 1 "comparison_operator" "")
962 (match_operand:SI 2 "reg_or_0_operand" "")
963 (match_operand:SI 3 "reg_or_0_operand" "")))]
968 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
969 (if_then_else:SI
971 [(match_operand:SI 1 "reg_or_0_operand" "rO,rO,rO,rO")
973 (match_operand:SI 2 "reg_or_0_operand" "rO,O,rO,0")
974 (match_operand:SI 3 "reg_or_0_operand" "O,rO,0,rO")))]
984 [(set (match_operand:SI 0 "register_operand" "")
985 (if_then_else:SI
986 (eq (match_operand:SI 1 "reg_or_0_operand" "")
988 (match_operand:SI 2 "reg_or_0_operand" "")
992 [(set (match_operand:SI 0 "register_operand" "")
993 (if_then_else:SI
994 (ne (match_operand:SI 1 "reg_or_0_operand" "")
996 (match_operand:SI 2 "reg_or_0_operand" "")
1000 [(set (match_operand:SI 0 "register_operand" "")
1001 (if_then_else:SI
1002 (eq (match_operand:SI 2 "reg_or_0_operand" "")
1004 (match_operand:SI 3 "reg_or_0_operand" "")
1005 (match_operand:SI 1 "reg_or_0_operand" "")))])
1008 [(set (match_operand:SI 0 "register_operand" "")
1009 (if_then_else:SI
1010 (ne (match_operand:SI 2 "reg_or_0_operand" "")
1012 (match_operand:SI 3 "reg_or_0_operand" "")
1013 (match_operand:SI 1 "reg_or_0_operand" "")))])
1021 [(set (match_operand:SI 0 "register_operand" "=r,r,r")
1022 (zero_extend:SI (match_operand:QI 1 "move_operand" "rO,U,m")))]
1031 [(set (match_operand:SI 0 "register_operand" "=r,r,r")
1032 (zero_extend:SI (match_operand:HI 1 "move_operand" "rO,U,m")))]
1041 [(set (match_operand:SI 0 "register_operand" "")
1042 (sign_extend:SI (match_operand:HI 1 "move_operand" "")))]
1059 [(set (match_operand:SI 0 "register_operand" "=r,r")
1060 (sign_extend:SI (match_operand:HI 1 "memory_operand" "U,m")))]
1068 [(set (match_operand:SI 0 "register_operand" "")
1069 (sign_extend:SI (match_operand:QI 1 "move_operand" "")))]
1086 [(set (match_operand:SI 0 "register_operand" "=r,r")
1087 (sign_extend:SI (match_operand:QI 1 "memory_operand" "U,m")))]
1098 [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "")
1099 (match_operand:SI 1 "u5bit_cint_operand" "")
1100 (match_operand:SI 2 "u5bit_cint_operand" ""))
1101 (match_operand:SI 3 "reg_or_cint_operand" ""))]
1109 [(set (zero_extract:SI
1110 (match_operand:SI 0 "register_operand" "+r")
1113 (match_operand:SI 1 "register_operand" "rO"))]
1119 [(set (zero_extract:SI
1120 (match_operand:SI 0 "register_operand" "+r")
1123 (zero_extract:SI
1126 (match_operand:SI 1 "register_operand" "rO")))]
1132 [(set (zero_extract:SI
1133 (match_operand:SI 0 "register_operand" "+r")
1136 (zero_extract:SI
1139 (match_operand:SI 1 "register_operand" "rO")))]
1145 [(set (zero_extract:SI
1146 (match_operand:SI 0 "register_operand" "+r")
1149 (zero_extract:SI
1152 (match_operand:SI 1 "register_operand" "rO")))]
1158 [(set (zero_extract:SI
1159 (match_operand:SI 0 "register_operand" "+r")
1160 (match_operand:SI 1 "u5bit_cint_operand" "n")
1162 (match_operand:SI 2 "register_operand" "rO"))]
1168 [(set (zero_extract:SI
1169 (match_operand:SI 0 "register_operand" "+r")
1170 (match_operand:SI 1 "u5bit_cint_operand" "n")
1171 (match_operand:SI 2 "u5bit_cint_operand" "n"))
1172 (zero_extract:SI
1173 (match_operand:SI 3 "register_operand" "rO")
1186 [(set (match_operand:SI 0 "register_operand" "=r")
1187 (mult:SI (zero_extend:SI
1188 (subreg:HI (match_operand:SI 1 "nonmemory_operand" "") 0))
1189 (zero_extend:SI
1190 (subreg:HI (match_operand:SI 2 "nonmemory_operand" "") 0))))
1192 (unspec:SI [(match_dup 0) (match_dup 1) (match_dup 2)]
1195 (unspec:SI [(match_dup 0) (match_dup 2) (match_dup 1)]
1212 [(set (match_operand:SI 0 "register_operand" "=r")
1213 (mult:SI (sign_extend:SI
1215 (sign_extend:SI
1222 [(set (match_operand:SI 0 "register_operand" "=r")
1223 (mult:SI (zero_extend:SI
1225 (zero_extend:SI
1232 [(set (match_operand:SI 0 "register_operand" "=r")
1233 (mult:SI (zero_extend:SI
1235 (sign_extend:SI
1242 [(set (match_operand:SI 0 "register_operand" "=r")
1243 (plus:SI
1244 (mult:SI (sign_extend:SI
1246 (sign_extend:SI
1248 (match_operand:SI 3 "register_operand" "0")))]
1254 [(set (match_operand:SI 0 "register_operand" "=r")
1255 (plus:SI
1256 (mult:SI (zero_extend:SI
1258 (zero_extend:SI
1260 (match_operand:SI 3 "register_operand" "0")))]
1287 [(set (match_operand:SI 0 "register_operand" "")
1288 (truncate:SI
1290 (mult:DI (sign_extend:DI (match_operand:SI 1 "reg_or_0_operand" ""))
1291 (sign_extend:DI (match_operand:SI 2 "reg_or_0_operand" "")))
1300 [(set (match_operand:SI 0 "register_operand" "")
1301 (truncate:SI
1303 (mult:DI (zero_extend:DI (match_operand:SI 1 "reg_or_0_operand" ""))
1304 (zero_extend:DI (match_operand:SI 2 "reg_or_0_operand" "")))
1393 [(parallel [(call (match_operand:SI 0 "call_operand" "")
1395 (use (reg:SI 54))
1396 (clobber (reg:SI 55))])]
1401 [(call (mem:SI (match_operand:SI 0 "call_address_operand" "rO,i"))
1403 (use (reg:SI 54))
1404 (clobber (reg:SI 55))]
1413 (call (match_operand:SI 1 "call_operand" "")
1415 (use (reg:SI 54))
1416 (clobber (reg:SI 55))])]
1421 (call (mem:SI (match_operand:SI 1 "call_address_operand" "rO,i"))
1423 (use (reg:SI 54))
1424 (clobber (reg:SI 55))]
1432 [(parallel [(call (match_operand:SI 0 "call_operand" "")
1434 (use (reg:SI 54))])]
1439 [(call (mem:SI (match_operand:SI 0 "call_address_operand" "rO,i"))
1441 (use (reg:SI 54))]
1450 (call (match_operand:SI 1 "call_operand" "")
1451 (match_operand:SI 2 "" "")))
1452 (use (reg:SI 54))])]
1458 (call (mem:SI (match_operand:SI 1 "call_address_operand" "rO,i"))
1459 (match_operand:SI 2 "" "")))
1460 (use (reg:SI 54))]
1474 [(set (pc) (match_operand:SI 0 "register_operand" "rO"))]
1482 (use (reg:SI 55))])]
1488 (use (reg:SI 55))]
1494 [(set (pc) (match_operand:SI 0 "register_operand" ""))
1503 [(set (pc) (match_operand:SI 0 "register_operand" "r"))
1553 [(set (match_operand:SI 0 "register_operand" "=r,r,r")
1554 (plus:SI
1555 (match_operand:SI 1 "register_operand" "%r,r,r")
1556 (match_operand:SI 2 "add_operand" "r,I,J")))
1569 [(set (match_operand:SI 0 "register_operand" "=r")
1570 (match_operand:SI 1 "register_operand" "r"))
1595 [(match_operand:SI 1 "reg_or_cint_operand")
1596 (match_operand:SI 2 "reg_or_cint_operand")])
1618 [(match_operand:SI 2 "reg_or_0_operand" "rO")
1630 [(match_operand:SI 2 "reg_or_0_operand" "rO")
1643 (ne (zero_extract:SI (subreg:QI
1644 (match_operand:SI 1 "reg_or_0_operand" "rO") 0)
1658 (eq (zero_extract:SI (subreg:QI
1659 (match_operand:SI 1 "reg_or_0_operand" "rO") 0)
1688 [(prefetch (match_operand:SI 0 "address_operand" "rO")
1689 (match_operand:SI 1 "const_int_operand" "")
1690 (match_operand:SI 2 "const_int_operand" ""))]
1705 [(unspec_volatile:SI [(const_int 0)] UNSPEC_NETWORK_BARRIER)]
1712 [(set (match_operand:SI 0 "nonimmediate_operand" "=r,U,m")
1713 (unspec_volatile:SI [(match_operand:SI 1 "netreg_operand" "i,i,i")
1714 (reg:SI TILEPRO_NETORDER_REG)]
1716 (clobber (reg:SI TILEPRO_NETORDER_REG))]
1725 [(unspec_volatile:SI
1726 [(match_operand:SI 0 "netreg_operand" "i,i,i,i,i,i")
1727 (match_operand:SI 1 "reg_or_cint_operand" "rO,I,J,K,N,P")
1728 (reg:SI TILEPRO_NETORDER_REG)]
1730 (clobber (reg:SI TILEPRO_NETORDER_REG))]
1742 [(unspec_volatile:SI
1743 [(match_operand:SI 0 "netreg_operand" "i")
1744 (unspec_volatile:SI [(match_operand:SI 1 "netreg_operand" "i")
1745 (reg:SI TILEPRO_NETORDER_REG)]
1747 (reg:SI TILEPRO_NETORDER_REG)]
1749 (clobber (reg:SI TILEPRO_NETORDER_REG))
1750 (clobber (reg:SI TILEPRO_NETORDER_REG))]
1756 [(set (match_operand:SI 0 "register_operand" "")
1757 (unspec_volatile:SI [(const_int TILEPRO_NETREG_IDN0)
1758 (reg:SI TILEPRO_NETORDER_REG)]
1760 (clobber (reg:SI TILEPRO_NETORDER_REG))])]
1765 [(set (match_operand:SI 0 "register_operand" "")
1766 (unspec_volatile:SI [(const_int TILEPRO_NETREG_IDN1)
1767 (reg:SI TILEPRO_NETORDER_REG)]
1769 (clobber (reg:SI TILEPRO_NETORDER_REG))])]
1774 [(unspec_volatile:SI [(const_int TILEPRO_NETREG_IDN0)
1775 (match_operand:SI 0 "reg_or_cint_operand" "")
1776 (reg:SI TILEPRO_NETORDER_REG)]
1778 (clobber (reg:SI TILEPRO_NETORDER_REG))])]
1783 [(set (match_operand:SI 0 "register_operand" "")
1784 (unspec_volatile:SI [(const_int TILEPRO_NETREG_SN)
1785 (reg:SI TILEPRO_NETORDER_REG)]
1787 (clobber (reg:SI TILEPRO_NETORDER_REG))])]
1792 [(unspec_volatile:SI [(const_int TILEPRO_NETREG_SN)
1793 (match_operand:SI 0 "reg_or_cint_operand" "")
1794 (reg:SI TILEPRO_NETORDER_REG)]
1796 (clobber (reg:SI TILEPRO_NETORDER_REG))])]
1801 [(set (match_operand:SI 0 "register_operand" "")
1802 (unspec_volatile:SI [(const_int TILEPRO_NETREG_UDN0)
1803 (reg:SI TILEPRO_NETORDER_REG)]
1805 (clobber (reg:SI TILEPRO_NETORDER_REG))])]
1810 [(set (match_operand:SI 0 "register_operand" "")
1811 (unspec_volatile:SI [(const_int TILEPRO_NETREG_UDN1)
1812 (reg:SI TILEPRO_NETORDER_REG)]
1814 (clobber (reg:SI TILEPRO_NETORDER_REG))])]
1819 [(set (match_operand:SI 0 "register_operand" "")
1820 (unspec_volatile:SI [(const_int TILEPRO_NETREG_UDN2)
1821 (reg:SI TILEPRO_NETORDER_REG)]
1823 (clobber (reg:SI TILEPRO_NETORDER_REG))])]
1828 [(set (match_operand:SI 0 "register_operand" "")
1829 (unspec_volatile:SI [(const_int TILEPRO_NETREG_UDN3)
1830 (reg:SI TILEPRO_NETORDER_REG)]
1832 (clobber (reg:SI TILEPRO_NETORDER_REG))])]
1837 [(unspec_volatile:SI [(const_int TILEPRO_NETREG_UDN0)
1838 (match_operand:SI 0 "reg_or_cint_operand" "")
1839 (reg:SI TILEPRO_NETORDER_REG)]
1841 (clobber (reg:SI TILEPRO_NETORDER_REG))])]
1845 [(unspec_volatile:SI
1846 [(match_operand:SI 0 "netreg_operand" "i,i,i,i")
1847 (plus:SI (match_operand:SI 1 "reg_or_0_operand" "%rO,rO,rO,rO")
1848 (match_operand:SI 2 "add_operand" "r,I,J,K"))
1849 (reg:SI TILEPRO_NETORDER_REG)]
1851 (clobber (reg:SI TILEPRO_NETORDER_REG))]
1861 [(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
1862 (plus:SI
1863 (unspec_volatile:SI [(match_operand:SI 1 "netreg_operand" "i,i,i,i")
1864 (reg:SI TILEPRO_NETORDER_REG)]
1866 (match_operand:SI 2 "add_operand" "rO,I,J,K")))
1867 (clobber (reg:SI TILEPRO_NETORDER_REG))]
1877 [(unspec_volatile:SI
1878 [(match_operand:SI 0 "netreg_operand" "i,i,i,i")
1879 (plus:SI
1880 (unspec_volatile:SI [(match_operand:SI 1 "netreg_operand" "i,i,i,i")
1881 (reg:SI TILEPRO_NETORDER_REG)]
1883 (match_operand:SI 2 "add_operand" "rO,I,J,K"))
1884 (reg:SI TILEPRO_NETORDER_REG)]
1886 (clobber (reg:SI TILEPRO_NETORDER_REG))
1887 (clobber (reg:SI TILEPRO_NETORDER_REG))]
1900 [(unspec_volatile:SI
1901 [(match_operand:SI 0 "netreg_operand" "i")
1902 (netreg_binop:SI (match_operand:SI 1 "reg_or_0_operand" "rO")
1903 (match_operand:SI 2 "reg_or_0_operand" "rO"))
1904 (reg:SI TILEPRO_NETORDER_REG)]
1906 (clobber (reg:SI TILEPRO_NETORDER_REG))]
1911 [(set (match_operand:SI 0 "register_operand" "=r")
1912 (netreg_binop:SI
1913 (unspec_volatile:SI [(match_operand:SI 1 "netreg_operand" "i")
1914 (reg:SI TILEPRO_NETORDER_REG)]
1916 (match_operand:SI 2 "reg_or_0_operand" "rO")))
1917 (clobber (reg:SI TILEPRO_NETORDER_REG))]
1922 [(set (match_operand:SI 0 "register_operand" "=r")
1923 (netreg_binop:SI
1924 (match_operand:SI 1 "reg_or_0_operand" "rO")
1925 (unspec_volatile:SI [(match_operand:SI 2 "netreg_operand" "i")
1926 (reg:SI TILEPRO_NETORDER_REG)]
1928 (clobber (reg:SI TILEPRO_NETORDER_REG))]
1933 [(unspec_volatile:SI
1934 [(match_operand:SI 0 "netreg_operand" "i")
1935 (netreg_binop:SI
1936 (unspec_volatile:SI [(match_operand:SI 1 "netreg_operand" "i")
1937 (reg:SI TILEPRO_NETORDER_REG)]
1939 (match_operand:SI 2 "reg_or_0_operand" "rO"))
1940 (reg:SI TILEPRO_NETORDER_REG)]
1942 (clobber (reg:SI TILEPRO_NETORDER_REG))
1943 (clobber (reg:SI TILEPRO_NETORDER_REG))]
1948 [(unspec_volatile:SI
1949 [(match_operand:SI 0 "netreg_operand" "i")
1950 (netreg_binop:SI
1951 (match_operand:SI 1 "reg_or_0_operand" "rO")
1952 (unspec_volatile:SI [(match_operand:SI 2 "netreg_operand" "i")
1953 (reg:SI TILEPRO_NETORDER_REG)]
1955 (reg:SI TILEPRO_NETORDER_REG)]
1957 (clobber (reg:SI TILEPRO_NETORDER_REG))
1958 (clobber (reg:SI TILEPRO_NETORDER_REG))]
1963 [(unspec_volatile:SI
1964 [(match_operand:SI 0 "netreg_operand" "i,i")
1965 (binop_with_imm:SI (match_operand:SI 1 "reg_or_0_operand" "rO,rO")
1966 (match_operand:SI 2 "reg_or_cint_operand" "I,rO"))
1967 (reg:SI TILEPRO_NETORDER_REG)]
1969 (clobber (reg:SI TILEPRO_NETORDER_REG))]
1976 [(set (match_operand:SI 0 "register_operand" "=r,r")
1977 (binop_with_imm:SI
1978 (unspec_volatile:SI [(match_operand:SI 1 "netreg_operand" "i,i")
1979 (reg:SI TILEPRO_NETORDER_REG)]
1981 (match_operand:SI 2 "reg_or_cint_operand" "I,rO")))
1982 (clobber (reg:SI TILEPRO_NETORDER_REG))]
1989 [(unspec_volatile:SI
1990 [(match_operand:SI 0 "netreg_operand" "i,i")
1991 (binop_with_imm:SI
1992 (unspec_volatile:SI [(match_operand:SI 1 "netreg_operand" "i,i")
1993 (reg:SI TILEPRO_NETORDER_REG)]
1995 (match_operand:SI 2 "reg_or_cint_operand" "I,rO"))
1996 (reg:SI TILEPRO_NETORDER_REG)]
1998 (clobber (reg:SI TILEPRO_NETORDER_REG))
1999 (clobber (reg:SI TILEPRO_NETORDER_REG))]
2006 [(unspec_volatile:SI [(match_operand:SI 0 "netreg_operand" "i")
2007 (unop:SI (match_operand:SI 1 "reg_or_0_operand" "rO"))
2008 (reg:SI TILEPRO_NETORDER_REG)]
2010 (clobber (reg:SI TILEPRO_NETORDER_REG))]
2016 [(set (match_operand:SI 0 "register_operand" "=r")
2017 (unop:SI
2018 (unspec_volatile:SI [(match_operand:SI 1 "netreg_operand" "i")
2019 (reg:SI TILEPRO_NETORDER_REG)]
2021 (clobber (reg:SI TILEPRO_NETORDER_REG))]
2027 [(unspec_volatile:SI
2028 [(match_operand:SI 0 "netreg_operand" "i")
2029 (unop:SI
2030 (unspec_volatile:SI [(match_operand:SI 1 "netreg_operand" "i")
2031 (reg:SI TILEPRO_NETORDER_REG)]
2033 (reg:SI TILEPRO_NETORDER_REG)]
2035 (clobber (reg:SI TILEPRO_NETORDER_REG))
2036 (clobber (reg:SI TILEPRO_NETORDER_REG))]
2042 [(set (match_operand:SI 0 "register_operand" "=r")
2043 (unspec:SI
2044 [(unspec_volatile:SI [(match_operand:SI 1 "netreg_operand" "i")
2045 (reg:SI TILEPRO_NETORDER_REG)]
2047 (match_operand:SI 2 "reg_or_0_operand" "rO")]
2049 (clobber (reg:SI TILEPRO_NETORDER_REG))]
2055 [(set (match_operand:SI 0 "register_operand" "=r")
2056 (unspec:SI
2057 [(match_operand:SI 1 "reg_or_0_operand" "rO")
2058 (unspec_volatile:SI [(match_operand:SI 2 "netreg_operand" "i")
2059 (reg:SI TILEPRO_NETORDER_REG)]
2062 (clobber (reg:SI TILEPRO_NETORDER_REG))]
2068 [(set (match_operand:SI 0 "register_operand" "=r")
2069 (unspec:SI
2070 [(match_operand:SI 1 "reg_or_0_operand" "0")
2071 (unspec_volatile:SI [(match_operand:SI 2 "netreg_operand" "i")
2072 (reg:SI TILEPRO_NETORDER_REG)]
2074 (match_operand:SI 3 "reg_or_0_operand" "rO")]
2076 (clobber (reg:SI TILEPRO_NETORDER_REG))]
2082 [(set (match_operand:SI 0 "register_operand" "=r")
2083 (unspec:SI
2084 [(match_operand:SI 1 "reg_or_0_operand" "0")
2085 (match_operand:SI 2 "reg_or_0_operand" "rO")
2086 (unspec_volatile:SI [(match_operand:SI 3 "netreg_operand" "i")
2087 (reg:SI TILEPRO_NETORDER_REG)]
2090 (clobber (reg:SI TILEPRO_NETORDER_REG))]
2100 ;; [(unspec_volatile:SI
2101 ;; [(match_operand:SI 0 "netreg_operand" "i")
2102 ;; (mm_combiner:SI
2103 ;; (and:SI (match_operand:SI 1 "reg_or_0_operand" "rO")
2104 ;; (match_operand:SI 3 "const_int_operand" "n"))
2105 ;; (and:SI (match_operand:SI 2 "reg_or_0_operand" "rO")
2106 ;; (match_operand:SI 4 "const_int_operand" "n")))]
2118 (ne (zero_extract:SI
2120 (unspec_volatile:SI [(match_operand:SI 1 "netreg_operand" "i")
2121 (reg:SI TILEPRO_NETORDER_REG)]
2128 (clobber (reg:SI TILEPRO_NETORDER_REG))]
2137 (eq (zero_extract:SI
2139 (unspec_volatile:SI [(match_operand:SI 1 "netreg_operand" "i")
2140 (reg:SI TILEPRO_NETORDER_REG)]
2147 (clobber (reg:SI TILEPRO_NETORDER_REG))]
2159 [(set (match_operand:SI 0 "register_operand" "=r")
2160 (unspec_volatile:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
2161 (match_operand:SI 2 "s16bit_cint_operand" "i")]
2168 [(set (match_operand:SI 0 "register_operand" "=r")
2169 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
2170 (match_operand:SI 2 "s16bit_cint_operand" "i")]
2183 [(unspec_volatile:VOID [(match_operand:SI 0 "reg_or_0_operand" "rO")]
2191 [(unspec_volatile:VOID [(match_operand:SI 0 "s8bit_cint_operand" "i")]
2197 [(unspec_volatile:VOID [(match_operand:SI 0 "s16bit_cint_operand" "i")]
2206 [(set (match_operand:SI 0 "register_operand" "")
2207 (sign_extend:SI
2208 (mem:I12MODE (match_operand:SI 1 "address_operand" ""))))]
2212 [(set (match_operand:SI 0 "register_operand" "")
2213 (zero_extend:SI
2214 (mem:I12MODE (match_operand:SI 1 "address_operand" ""))))]
2218 [(set (match_operand:SI 1 "register_operand" "=r")
2219 (plus:SI (match_operand:SI 3 "register_operand" "1")
2220 (match_operand:SI 2 "s8bit_cint_operand" "i")))
2221 (set (match_operand:SI 0 "register_operand" "=r")
2222 (sign_extend:SI (mem:I12MODE (match_dup 3))))]
2228 [(set (match_operand:SI 1 "register_operand" "=r")
2229 (plus:SI (match_operand:SI 3 "register_operand" "1")
2230 (match_operand:SI 2 "s8bit_cint_operand" "i")))
2231 (set (match_operand:SI 0 "register_operand" "=r")
2232 (zero_extend:SI (mem:I12MODE (match_dup 3))))]
2238 [(set (match_operand:SI 0 "register_operand" "")
2239 (mem:SI (match_operand:SI 1 "address_operand" "")))]
2243 [(set (match_operand:SI 1 "register_operand" "=r")
2244 (plus:SI (match_operand:SI 3 "register_operand" "1")
2245 (match_operand:SI 2 "s8bit_cint_operand" "i")))
2246 (set (match_operand:SI 0 "register_operand" "=r")
2247 (mem:SI (match_dup 3)))]
2253 [(set (match_operand:SI 1 "register_operand" "=r")
2254 (plus:SI (match_operand:SI 3 "register_operand" "1")
2255 (match_operand:SI 2 "s8bit_cint_operand" "i")))
2256 (set (match_operand:SI 0 "register_operand" "=r")
2257 (mem:SI (and:SI (match_dup 3) (const_int -4))))]
2263 [(set (match_operand:SI 0 "register_operand" "=r")
2264 (mem:SI (and:SI (match_operand:SI 1 "address_operand" "rO")
2273 [(set (match_operand:SI 0 "register_operand" "=r")
2274 (sign_extend:SI
2276 [(mem:I12MODE (match_operand:SI 1 "address_operand" "rO"))]
2283 [(set (match_operand:SI 0 "register_operand" "=r")
2284 (zero_extend:SI
2286 [(mem:I12MODE (match_operand:SI 1 "address_operand" "rO"))]
2293 [(set (match_operand:SI 1 "register_operand" "=r")
2294 (plus:SI (match_operand:SI 3 "register_operand" "1")
2295 (match_operand:SI 2 "s8bit_cint_operand" "i")))
2296 (set (match_operand:SI 0 "register_operand" "=r")
2297 (sign_extend:SI (unspec:I12MODE [(mem:I12MODE (match_dup 3))]
2304 [(set (match_operand:SI 1 "register_operand" "=r")
2305 (plus:SI (match_operand:SI 3 "register_operand" "1")
2306 (match_operand:SI 2 "s8bit_cint_operand" "i")))
2307 (set (match_operand:SI 0 "register_operand" "=r")
2308 (zero_extend:SI (unspec:I12MODE [(mem:I12MODE (match_dup 3))]
2315 [(set (match_operand:SI 1 "register_operand" "=r")
2316 (plus:SI (match_operand:SI 3 "register_operand" "1")
2317 (match_operand:SI 2 "s8bit_cint_operand" "i")))
2318 (set (match_operand:SI 0 "register_operand" "=r")
2319 (unspec:SI [(mem:SI (match_dup 3))] UNSPEC_LATENCY_L2))]
2325 [(set (match_operand:SI 1 "register_operand" "=r")
2326 (plus:SI (match_operand:SI 3 "register_operand" "1")
2327 (match_operand:SI 2 "s8bit_cint_operand" "i")))
2328 (set (match_operand:SI 0 "register_operand" "=r")
2329 (unspec:SI [(mem:SI (and:SI (match_dup 3) (const_int -4)))]
2336 [(set (match_operand:SI 0 "register_operand" "=r")
2337 (unspec:SI [(mem:SI (and:SI (match_operand:SI 1 "address_operand" "rO")
2345 [(set (match_operand:SI 0 "register_operand" "=r")
2346 (unspec:SI [(mem:SI (match_operand:SI 1 "address_operand" "rO"))]
2355 [(set (match_operand:SI 0 "register_operand" "=r")
2356 (sign_extend:SI
2358 [(mem:I12MODE (match_operand:SI 1 "address_operand" "rO"))]
2365 [(set (match_operand:SI 0 "register_operand" "=r")
2366 (zero_extend:SI
2368 [(mem:I12MODE (match_operand:SI 1 "address_operand" "rO"))]
2375 [(set (match_operand:SI 1 "register_operand" "=r")
2376 (plus:SI (match_operand:SI 3 "register_operand" "1")
2377 (match_operand:SI 2 "s8bit_cint_operand" "i")))
2378 (set (match_operand:SI 0 "register_operand" "=r")
2379 (sign_extend:SI (unspec:I12MODE [(mem:I12MODE (match_dup 3))]
2386 [(set (match_operand:SI 1 "register_operand" "=r")
2387 (plus:SI (match_operand:SI 3 "register_operand" "1")
2388 (match_operand:SI 2 "s8bit_cint_operand" "i")))
2389 (set (match_operand:SI 0 "register_operand" "=r")
2390 (zero_extend:SI (unspec:I12MODE [(mem:I12MODE (match_dup 3))]
2397 [(set (match_operand:SI 1 "register_operand" "=r")
2398 (plus:SI (match_operand:SI 3 "register_operand" "1")
2399 (match_operand:SI 2 "s8bit_cint_operand" "i")))
2400 (set (match_operand:SI 0 "register_operand" "=r")
2401 (unspec:SI [(mem:SI (match_dup 3))] UNSPEC_LATENCY_MISS))]
2407 [(set (match_operand:SI 1 "register_operand" "=r")
2408 (plus:SI (match_operand:SI 3 "register_operand" "1")
2409 (match_operand:SI 2 "s8bit_cint_operand" "i")))
2410 (set (match_operand:SI 0 "register_operand" "=r")
2411 (unspec:SI [(mem:SI (and:SI (match_dup 3) (const_int -4)))]
2418 [(set (match_operand:SI 0 "register_operand" "=r")
2419 (unspec:SI [(mem:SI (and:SI (match_operand:SI 1 "address_operand" "rO")
2427 [(set (match_operand:SI 0 "register_operand" "=r")
2428 (unspec:SI [(mem:SI (match_operand:SI 1 "address_operand" "rO"))]
2437 [(set (match_operand:SI 0 "register_operand" "=r")
2438 (unspec_volatile:SI [(match_operand:SI 1 "u15bit_cint_operand" "i")]
2446 [(set (match_operand:SI 0 "register_operand" "=r")
2447 (mm_combiner:SI
2448 (and:SI (match_operand:SI 1 "reg_or_0_operand" "rO")
2449 (match_operand:SI 3 "const_int_operand" "n"))
2450 (and:SI (match_operand:SI 2 "reg_or_0_operand" "rO")
2451 (match_operand:SI 4 "const_int_operand" "n"))))]
2458 [(set (match_operand:SI 0 "register_operand" "")
2459 (ior:SI
2460 (and:SI (match_operand:SI 1 "reg_or_cint_operand" "")
2461 (match_operand:SI 3 "u5bit_cint_operand" ""))
2462 (and:SI (match_operand:SI 2 "reg_or_cint_operand" "")
2463 (match_operand:SI 4 "u5bit_cint_operand" ""))))]
2551 [(set (match_operand:SI 0 "register_operand" "=r")
2552 (unspec_volatile:SI [(match_operand:SI 1 "s16bit_cint_operand" "i")]
2559 [(unspec_volatile:SI [(match_operand:SI 0 "u15bit_cint_operand" "i")
2560 (match_operand:SI 1 "reg_or_0_operand" "rO")]
2568 [(prefetch (match_operand:SI 0 "address_operand" "")
2573 [(use (match_operand:SI 0 "address_operand" ""))]
2585 [(set (match_operand:SI 0 "register_operand" "")
2586 (plus:SI (mult:SI (match_operand:SI 1 "reg_or_0_operand" "")
2588 (match_operand:SI 2 "reg_or_0_operand" "")))]
2592 [(set (match_operand:SI 0 "register_operand" "")
2593 (plus:SI (mult:SI (match_operand:SI 1 "reg_or_0_operand" "")
2595 (match_operand:SI 2 "reg_or_0_operand" "")))]
2599 [(set (match_operand:SI 0 "register_operand" "")
2600 (plus:SI (mult:SI (match_operand:SI 1 "reg_or_0_operand" "")
2602 (match_operand:SI 2 "reg_or_0_operand" "")))]
2606 [(set (mem:I12MODE (match_operand:SI 0 "address_operand" ""))
2607 (match_operand:SI 1 "reg_or_0_operand" ""))]
2614 [(set (mem:SI (match_operand:SI 0 "address_operand" ""))
2615 (match_operand:SI 1 "reg_or_0_operand" ""))]
2620 [(set (match_operand:SI 0 "register_operand" "")
2621 (plus:SI (match_operand:SI 3 "register_operand" "")
2622 (match_operand:SI 2 "s8bit_cint_operand" "")))
2624 (match_operand:SI 1 "reg_or_0_operand" ""))])]
2631 [(set (match_operand:SI 0 "register_operand" "=r")
2632 (plus:SI (match_operand:SI 3 "register_operand" "0")
2633 (match_operand:SI 2 "s8bit_cint_operand" "i")))
2641 [(set (match_operand:SI 0 "register_operand" "=r")
2642 (plus:SI (match_operand:SI 3 "register_operand" "0")
2643 (match_operand:SI 2 "s8bit_cint_operand" "i")))
2644 (set (mem:SI (match_dup 3))
2645 (match_operand:SI 1 "reg_or_0_operand" "rO"))]
2651 [(unspec_volatile:VOID [(match_operand:SI 0 "reg_or_0_operand" "rO")]
2659 [(set (match_operand:SI 0 "register_operand" "=r")
2660 (mem:SI (match_operand:SI 1 "reg_or_0_operand" "rO")))
2661 (set (mem:SI (match_dup 1)) (const_int 1))]
2690 [(set (match_operand:SI 0 "register_operand" "")
2692 (match_operand:SI 1 "reg_or_0_operand" "")
2693 (match_operand:SI 2 "reg_or_0_operand" "")))]
2702 [(set (match_operand:SI 0 "register_operand" "")
2704 (match_operand:SI 1 "reg_or_0_operand" "")
2705 (match_operand:SI 2 "s8bit_cint_operand" "")))]
2725 (match_operand:SI 2 "reg_or_u5bit_operand" "I,rO")))]
2733 [(set (match_operand:SI 0 "register_operand" "")
2735 (match_operand:SI 1 "reg_or_0_operand" "")
2736 (match_operand:SI 2 "reg_or_u5bit_operand" "")))]
2768 [(set (match_operand:SI 0 "register_operand" "")
2770 (match_operand:SI 1 "reg_or_0_operand" "")
2771 (match_operand:SI 2 "reg_or_0_operand" "")))]
2780 [(set (match_operand:SI 0 "register_operand" "")
2782 (match_operand:SI 1 "reg_or_0_operand" "")
2783 (match_operand:SI 2 "s8bit_cint_operand" "")))]
2803 (match_operand:SI 2 "reg_or_u5bit_operand" "I,rO")))]
2811 [(set (match_operand:SI 0 "register_operand" "")
2813 (match_operand:SI 1 "reg_or_0_operand" "")
2814 (match_operand:SI 2 "reg_or_0_operand" "")))]
2838 [(set (match_operand:SI 0 "register_operand" "")
2840 (match_operand:SI 1 "reg_or_0_operand" "")
2841 (match_operand:SI 2 "reg_or_0_operand" "")))]
2865 [(set (match_operand:SI 0 "register_operand" "")
2867 (match_operand:SI 1 "reg_or_0_operand" "")
2868 (match_operand:SI 2 "reg_or_0_operand" "")))]
2898 [(match_operand:SI 0 "register_operand" "")
2899 (match_operand:SI 1 "reg_or_0_operand" "")
2900 (match_operand:SI 2 "reg_or_0_operand" "")]
2927 [(match_operand:SI 0 "register_operand" "")
2928 (match_operand:SI 1 "reg_or_0_operand" "")
2929 (match_operand:SI 2 "reg_or_0_operand" "")]
2955 [(match_operand:SI 0 "register_operand" "")
2956 (match_operand:SI 1 "reg_or_0_operand" "")
2957 (match_operand:SI 2 "reg_or_0_operand" "")]
2983 [(match_operand:SI 0 "register_operand" "")
2984 (match_operand:SI 1 "reg_or_0_operand" "")
2985 (match_operand:SI 2 "reg_or_0_operand" "")]
3010 [(set (match_operand:SI 0 "register_operand" "")
3012 (v2pack:V2QI (match_operand:SI 1 "reg_or_0_operand" ""))
3013 (v2pack:V2QI (match_operand:SI 2 "reg_or_0_operand" ""))))]
3041 [(set (match_operand:SI 0 "register_operand" "")
3044 (ashiftrt:V2HI (match_operand:SI 2 "reg_or_0_operand" "")
3047 (ashiftrt:V2HI (match_operand:SI 1 "reg_or_0_operand" "")
3065 (ss_truncate:HI (match_operand:SI 1 "reg_or_0_operand" "rO"))
3066 (ss_truncate:HI (match_operand:SI 2 "reg_or_0_operand" "rO"))))]
3072 [(set (match_operand:SI 0 "register_operand" "")
3074 (ss_truncate:HI (match_operand:SI 2 "reg_or_0_operand" ""))
3075 (ss_truncate:HI (match_operand:SI 1 "reg_or_0_operand" ""))))]
3088 [(set (match_operand:SI 0 "register_operand" "=r")
3089 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3090 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3097 [(set (match_operand:SI 0 "register_operand" "=r")
3098 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3099 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3106 [(set (match_operand:SI 0 "register_operand" "=r")
3107 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3108 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3115 [(set (match_operand:SI 0 "register_operand" "=r")
3116 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3117 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3124 [(set (match_operand:SI 0 "register_operand" "=r")
3125 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")]
3132 [(set (match_operand:SI 0 "register_operand" "=r")
3133 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3134 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3141 [(set (match_operand:SI 0 "register_operand" "=r")
3142 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3143 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3150 [(unspec_volatile:VOID [(match_operand:SI 0 "reg_or_0_operand" "rO")]
3157 [(set (match_operand:SI 0 "register_operand" "=r")
3158 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3159 (match_operand:SI 2 "reg_or_0_operand" "rO")
3160 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3167 [(unspec_volatile:VOID [(match_operand:SI 0 "reg_or_0_operand" "rO")]
3174 [(unspec_volatile:VOID [(match_operand:SI 0 "reg_or_0_operand" "rO")]
3192 [(unspec_volatile:VOID [(match_operand:SI 0 "reg_or_0_operand" "rO")]
3199 [(set (match_operand:SI 0 "register_operand" "=r")
3200 (unspec:SI [(const_int 0)] UNSPEC_INSN_LNK))]
3206 [(set (match_operand:SI 0 "register_operand" "=r")
3207 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3208 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3215 [(set (match_operand:SI 0 "register_operand" "=r")
3216 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3217 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3224 [(set (match_operand:SI 0 "register_operand" "=r")
3225 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3226 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3233 [(set (match_operand:SI 0 "register_operand" "=r")
3234 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3235 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3242 [(set (match_operand:SI 0 "register_operand" "=r")
3243 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3244 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3251 [(set (match_operand:SI 0 "register_operand" "=r")
3252 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3253 (match_operand:SI 2 "reg_or_0_operand" "rO")
3254 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3261 [(set (match_operand:SI 0 "register_operand" "=r")
3262 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3263 (match_operand:SI 2 "reg_or_0_operand" "rO")
3264 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3271 [(set (match_operand:SI 0 "register_operand" "=r")
3272 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3273 (match_operand:SI 2 "reg_or_0_operand" "rO")
3274 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3281 [(set (match_operand:SI 0 "register_operand" "=r")
3282 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3283 (match_operand:SI 2 "reg_or_0_operand" "rO")
3284 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3291 [(set (match_operand:SI 0 "register_operand" "=r")
3292 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3293 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3300 [(set (match_operand:SI 0 "register_operand" "=r")
3301 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3302 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3309 [(set (match_operand:SI 0 "register_operand" "=r")
3310 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3311 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3318 [(set (match_operand:SI 0 "register_operand" "=r")
3319 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3320 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3327 [(set (match_operand:SI 0 "register_operand" "=r")
3328 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3329 (match_operand:SI 2 "reg_or_0_operand" "rO")
3330 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3337 [(set (match_operand:SI 0 "register_operand" "=r")
3338 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3339 (match_operand:SI 2 "reg_or_0_operand" "rO")
3340 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3347 [(set (match_operand:SI 0 "register_operand" "=r")
3348 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3349 (match_operand:SI 2 "reg_or_0_operand" "rO")
3350 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3357 [(set (match_operand:SI 0 "register_operand" "=r")
3358 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3359 (match_operand:SI 2 "reg_or_0_operand" "rO")
3360 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3367 [(set (match_operand:SI 0 "register_operand" "=r")
3368 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3369 (match_operand:SI 2 "reg_or_0_operand" "rO")
3370 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3377 [(set (match_operand:SI 0 "register_operand" "=r")
3378 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3379 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3386 [(set (match_operand:SI 0 "register_operand" "=r")
3387 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3388 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3395 [(set (match_operand:SI 0 "register_operand" "=r")
3396 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3397 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3404 [(set (match_operand:SI 0 "register_operand" "=r")
3405 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3406 (match_operand:SI 2 "reg_or_0_operand" "rO")
3407 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3414 [(set (match_operand:SI 0 "register_operand" "=r")
3415 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3416 (match_operand:SI 2 "reg_or_0_operand" "rO")
3417 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3424 [(set (match_operand:SI 0 "register_operand" "=r")
3425 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3426 (match_operand:SI 2 "reg_or_0_operand" "rO")
3427 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3434 [(set (match_operand:SI 0 "register_operand" "=r")
3435 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3436 (match_operand:SI 2 "reg_or_0_operand" "rO")
3437 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3444 [(set (match_operand:SI 0 "register_operand" "=r")
3445 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3446 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3453 [(set (match_operand:SI 0 "register_operand" "=r")
3454 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3455 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3468 [(set (match_operand:SI 0 "register_operand" "=r")
3469 (and:SI (not:SI (match_operand:SI 1 "reg_or_0_operand" "rO"))
3470 (not:SI (match_operand:SI 2 "reg_or_0_operand" "rO"))))]
3475 [(set (match_operand:SI 0 "register_operand" "=r")
3476 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3477 (match_operand:SI 2 "reg_or_0_operand" "rO")
3478 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3485 [(set (match_operand:SI 0 "register_operand" "=r")
3486 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3487 (match_operand:SI 2 "reg_or_0_operand" "rO")
3488 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3495 [(set (match_operand:SI 0 "register_operand" "=r")
3496 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3497 (match_operand:SI 2 "reg_or_0_operand" "rO")
3498 (match_operand:SI 3 "reg_or_0_operand" "rO")]
3505 [(set (match_operand:SI 0 "register_operand" "=r")
3506 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3507 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3514 [(set (match_operand:SI 0 "register_operand" "=r")
3515 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3516 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3523 [(set (match_operand:SI 0 "register_operand" "=r")
3524 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "rO")
3525 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3532 [(set (match_operand:SI 0 "register_operand" "=r")
3533 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3534 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3541 [(set (match_operand:SI 0 "register_operand" "=r")
3542 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3543 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3550 [(set (match_operand:SI 0 "register_operand" "=r")
3551 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3552 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3559 [(set (match_operand:SI 0 "register_operand" "=r")
3560 (unspec:SI [(match_operand:SI 1 "reg_or_0_operand" "0")
3561 (match_operand:SI 2 "reg_or_0_operand" "rO")]
3577 [(set (match_operand:SI 0 "register_operand" "=r")
3578 (unspec_volatile:SI [(match_operand:SI 1 "symbolic_operand" "")]
3585 [(set (match_operand:SI 0 "register_operand" "")
3586 (lo_sum:SI
3587 (match_operand:SI 1 "register_operand" "")
3588 (const:SI
3589 (unspec:SI [(match_operand:SI 2 "symbolic_operand" "")
3590 (match_operand:SI 3 "symbolic_operand" "")]
3595 [(set (match_operand:SI 0 "register_operand" "")
3596 (plus:SI
3597 (match_operand:SI 1 "reg_or_0_operand" "")
3598 (high:SI
3599 (const:SI
3600 (unspec:SI [(match_operand:SI 2 "symbolic_operand" "")
3601 (match_operand:SI 3 "symbolic_operand" "")]
3606 [(set (match_operand:SI 0 "register_operand" "")
3607 (lo_sum:SI
3608 (match_operand:SI 1 "reg_or_0_operand" "")
3609 (const:SI (unspec:SI [(match_operand:SI 2 "symbolic_operand" "")]
3614 [(set (match_operand:SI 0 "register_operand" "")
3615 (plus:SI
3616 (match_operand:SI 1 "reg_or_0_operand" "")
3617 (high:SI
3618 (const:SI (unspec:SI [(match_operand:SI 2 "symbolic_operand" "")]
3623 [(set (match_operand:SI 0 "register_operand" "")
3624 (lo_sum:SI
3625 (match_operand:SI 1 "reg_or_0_operand" "")
3626 (const:SI (unspec:SI [(match_operand:SI 2 "symbolic_operand" "")]
3636 [(set (match_operand:SI 0 "register_operand" "")
3637 (plus:SI
3638 (match_operand:SI 1 "reg_or_0_operand" "")
3639 (high:SI
3640 (const:SI (unspec:SI [(match_operand 2 "tls_symbolic_operand" "")]
3645 [(set (match_operand:SI 0 "register_operand" "")
3646 (lo_sum:SI
3647 (match_operand:SI 1 "reg_or_0_operand" "")
3648 (const:SI (unspec:SI [(match_operand 2 "tls_symbolic_operand" "")]
3654 [(set (reg:SI 0)
3655 (unspec:SI [(match_operand:SI 0 "tls_symbolic_operand" "")
3656 (reg:SI 0)]
3658 (clobber (reg:SI 25))
3659 (clobber (reg:SI 26))
3660 (clobber (reg:SI 27))
3661 (clobber (reg:SI 28))
3662 (clobber (reg:SI 29))
3663 (clobber (reg:SI 55))])]
3670 [(set (reg:SI 0)
3671 (unspec:SI [(match_operand:SI 0 "tls_symbolic_operand" "")
3672 (reg:SI 0)]
3674 (clobber (reg:SI 25))
3675 (clobber (reg:SI 26))
3676 (clobber (reg:SI 27))
3677 (clobber (reg:SI 28))
3678 (clobber (reg:SI 29))
3679 (clobber (reg:SI 55))]
3685 [(set (match_operand:SI 0 "register_operand" "=r")
3686 (unspec:SI [(match_operand:SI 1 "register_operand" "r")
3687 (match_operand:SI 2 "tls_symbolic_operand" "")]
3693 [(set (match_operand:SI 0 "register_operand" "=r")
3694 (unspec:SI [(match_operand:SI 1 "register_operand" "r")
3695 (match_operand:SI 2 "tls_symbolic_operand" "")]
3702 [(set (match_operand:SI 0 "register_operand" "")
3703 (plus:SI
3704 (match_operand:SI 1 "register_operand" "")
3705 (high:SI
3706 (const:SI (unspec:SI [(match_operand 2 "tls_ie_symbolic_operand" "")]
3711 [(set (match_operand:SI 0 "register_operand" "")
3712 (lo_sum:SI
3713 (match_operand:SI 1 "register_operand" "")
3714 (const:SI (unspec:SI [(match_operand 2 "tls_ie_symbolic_operand" "")]
3719 [(set (match_operand:SI 0 "register_operand" "")
3720 (plus:SI
3721 (match_operand:SI 1 "register_operand" "")
3722 (high:SI
3723 (const:SI (unspec:SI [(match_operand 2 "tls_le_symbolic_operand" "")]
3728 [(set (match_operand:SI 0 "register_operand" "")
3729 (lo_sum:SI
3730 (match_operand:SI 1 "register_operand" "")
3731 (const:SI (unspec:SI [(match_operand 2 "tls_le_symbolic_operand" "")]
3761 [(set (match_operand:SI 0 "nonautoincmem_operand" "=U")
3762 (unspec:SI [(match_operand:SI 1 "nonautoincmem_operand" "U")]
3764 (set (match_scratch:SI 2 "=&r") (const_int 0))]
3807 [(set (match_operand:SI 0 "register_operand" "=&r")
3808 (unspec:SI [(match_operand:SI 1 "nonautoincmem_operand" "U")
3809 (match_operand:SI 2 "nonautoincmem_operand" "U")]
3811 (set (match_scratch:SI 3 "=&r") (const_int 0))]