Lines Matching refs:BME1000_REG

48 #define BME1000_REG(page, reg)    \  macro
62 #define BME1000_PHY_SPEC_CTRL	BME1000_REG(0, 16) /* PHY Specific Control */
101 #define BM_CS_STATUS		BME1000_REG(0, 17)
107 #define BME1000_PHY_PAGE_SELECT	BME1000_REG(0, 22) /* Page Select */
119 #define HV_OEM_BITS		BME1000_REG(0, 25)
125 #define HV_M_STATUS		BME1000_REG(0, 26)
132 #define HV_LED_CONFIG		BME1000_REG(0, 30)
134 #define	HV_KMRN_MODE_CTRL	BME1000_REG(BM_PORT_CTRL_PAGE, 16)
137 #define	BM_PORT_GEN_CFG		BME1000_REG(BM_PORT_CTRL_PAGE, 17)
139 #define	I82579_DFT_CTRL		BME1000_REG(BM_PORT_CTRL_PAGE, 20)
141 #define	CV_SMB_CTRL		BME1000_REG(BM_PORT_CTRL_PAGE, 23)
144 #define	BM_RATE_ADAPTATION_CTRL	BME1000_REG(BM_PORT_CTRL_PAGE, 25)
149 #define HV_KMRN_FIFO_CTRLSTA			BME1000_REG(770, 16)
153 #define	HV_PM_CTRL		BME1000_REG(770, 17)
157 #define	I217_INBAND_CTRL	BME1000_REG(770, 18)
161 #define	IGP3_KMRN_DIAG		BME1000_REG(770, 19)
164 #define	I217_LPI_GPIO_CTRL	BME1000_REG(772, 18)
167 #define	I82579_LPI_CTRL		BME1000_REG(772, 20)
172 #define	I217_MEMPWR		BME1000_REG(772, 26)
175 #define I217_PLL_CLOCK_GATE_REG	BME1000_REG(772, 28)
178 #define	I217_CFGREG		BME1000_REG(772, 29)
181 #define HV_MUX_DATA_CTRL	BME1000_REG(776, 16)
185 #define I82579_UNKNOWN1		BME1000_REG(776, 20)
188 #define I218_ULP_CONFIG1	BME1000_REG(779, 16)
201 #define	BM_RCTL			BME1000_REG(BM_WUC_PAGE, 0)
210 #define	BM_WUC			BME1000_REG(BM_WUC_PAGE, 1)
219 #define	BM_WUFC			BME1000_REG(BM_WUC_PAGE, 2)
221 #define	I217_PROXY_CTRL		BME1000_REG(BM_WUC_PAGE, 70)
224 #define BM_RAR_L(_i)		(BME1000_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
225 #define BM_RAR_M(_i)		(BME1000_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
226 #define BM_RAR_H(_i)		(BME1000_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
227 #define BM_RAR_CTRL(_i)		(BME1000_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
228 #define BM_MTA(_i)		(BME1000_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))