40 #define INTEL_VGA_DEVICE(id, info) {		\  argument
46 #define INTEL_QUANTA_VGA_DEVICE(info) {		\  argument
52 #define INTEL_I810_IDS(info)					\  argument
57 #define INTEL_I815_IDS(info)					\  argument
60 #define INTEL_I830_IDS(info)				\  argument
63 #define INTEL_I845G_IDS(info)				\  argument
66 #define INTEL_I85X_IDS(info)				\  argument
70 #define INTEL_I865G_IDS(info)				\  argument
73 #define INTEL_I915G_IDS(info)				\  argument
77 #define INTEL_I915GM_IDS(info)				\  argument
80 #define INTEL_I945G_IDS(info)				\  argument
83 #define INTEL_I945GM_IDS(info)				\  argument
87 #define INTEL_I965G_IDS(info)				\  argument
93 #define INTEL_G33_IDS(info)				\  argument
98 #define INTEL_I965GM_IDS(info)				\  argument
102 #define INTEL_GM45_IDS(info)				\  argument
105 #define INTEL_G45_IDS(info)				\  argument
113 #define INTEL_PINEVIEW_G_IDS(info) \  argument
116 #define INTEL_PINEVIEW_M_IDS(info) \  argument
119 #define INTEL_IRONLAKE_D_IDS(info) \  argument
122 #define INTEL_IRONLAKE_M_IDS(info) \  argument
125 #define INTEL_SNB_D_GT1_IDS(info) \  argument
129 #define INTEL_SNB_D_GT2_IDS(info) \  argument
133 #define INTEL_SNB_D_IDS(info) \  argument
137 #define INTEL_SNB_M_GT1_IDS(info) \  argument
140 #define INTEL_SNB_M_GT2_IDS(info) \  argument
144 #define INTEL_SNB_M_IDS(info) \  argument
148 #define INTEL_IVB_M_GT1_IDS(info) \  argument
151 #define INTEL_IVB_M_GT2_IDS(info) \  argument
154 #define INTEL_IVB_M_IDS(info) \  argument
158 #define INTEL_IVB_D_GT1_IDS(info) \  argument
162 #define INTEL_IVB_D_GT2_IDS(info) \  argument
166 #define INTEL_IVB_D_IDS(info) \  argument
170 #define INTEL_IVB_Q_IDS(info) \  argument
173 #define INTEL_HSW_ULT_GT1_IDS(info) \  argument
179 #define INTEL_HSW_ULX_GT1_IDS(info) \  argument
182 #define INTEL_HSW_GT1_IDS(info) \  argument
201 #define INTEL_HSW_ULT_GT2_IDS(info) \  argument
207 #define INTEL_HSW_ULX_GT2_IDS(info) \  argument
210 #define INTEL_HSW_GT2_IDS(info) \  argument
230 #define INTEL_HSW_ULT_GT3_IDS(info) \  argument
237 #define INTEL_HSW_GT3_IDS(info) \  argument
254 #define INTEL_HSW_IDS(info) \  argument
259 #define INTEL_VLV_IDS(info) \  argument
267 #define INTEL_BDW_ULT_GT1_IDS(info) \  argument
271 #define INTEL_BDW_ULX_GT1_IDS(info) \  argument
274 #define INTEL_BDW_GT1_IDS(info) \  argument
281 #define INTEL_BDW_ULT_GT2_IDS(info) \  argument
285 #define INTEL_BDW_ULX_GT2_IDS(info) \  argument
288 #define INTEL_BDW_GT2_IDS(info) \  argument
295 #define INTEL_BDW_ULT_GT3_IDS(info) \  argument
299 #define INTEL_BDW_ULX_GT3_IDS(info) \  argument
302 #define INTEL_BDW_GT3_IDS(info) \  argument
309 #define INTEL_BDW_ULT_RSVD_IDS(info) \  argument
313 #define INTEL_BDW_ULX_RSVD_IDS(info) \  argument
316 #define INTEL_BDW_RSVD_IDS(info) \  argument
323 #define INTEL_BDW_IDS(info) \  argument
329 #define INTEL_CHV_IDS(info) \  argument
335 #define INTEL_SKL_ULT_GT1_IDS(info) \  argument
338 #define INTEL_SKL_ULX_GT1_IDS(info) \  argument
341 #define INTEL_SKL_GT1_IDS(info)	\  argument
348 #define INTEL_SKL_ULT_GT2_IDS(info) \  argument
352 #define INTEL_SKL_ULX_GT2_IDS(info) \  argument
355 #define INTEL_SKL_GT2_IDS(info)	\  argument
363 #define INTEL_SKL_ULT_GT3_IDS(info) \  argument
366 #define INTEL_SKL_GT3_IDS(info) \  argument
373 #define INTEL_SKL_GT4_IDS(info) \  argument
380 #define INTEL_SKL_IDS(info)	 \  argument
386 #define INTEL_BXT_IDS(info) \  argument
393 #define INTEL_GLK_IDS(info) \  argument
397 #define INTEL_KBL_ULT_GT1_IDS(info) \  argument
401 #define INTEL_KBL_ULX_GT1_IDS(info) \  argument
405 #define INTEL_KBL_GT1_IDS(info)	\  argument
413 #define INTEL_KBL_ULT_GT2_IDS(info) \  argument
417 #define INTEL_KBL_ULX_GT2_IDS(info) \  argument
420 #define INTEL_KBL_GT2_IDS(info)	\  argument
429 #define INTEL_KBL_ULT_GT3_IDS(info) \  argument
432 #define INTEL_KBL_GT3_IDS(info) \  argument
437 #define INTEL_KBL_GT4_IDS(info) \  argument
441 #define INTEL_AML_KBL_GT2_IDS(info) \  argument
446 #define INTEL_AML_CFL_GT2_IDS(info) \  argument
450 #define INTEL_CML_GT1_IDS(info)	\  argument
456 #define INTEL_CML_U_GT1_IDS(info) \  argument
462 #define INTEL_CML_GT2_IDS(info)	\  argument
471 #define INTEL_CML_U_GT2_IDS(info) \  argument
476 #define INTEL_KBL_IDS(info) \  argument
484 #define INTEL_CFL_S_GT1_IDS(info) \  argument
489 #define INTEL_CFL_S_GT2_IDS(info) \  argument
497 #define INTEL_CFL_H_GT1_IDS(info) \  argument
500 #define INTEL_CFL_H_GT2_IDS(info) \  argument
505 #define INTEL_CFL_U_GT2_IDS(info) \  argument
509 #define INTEL_CFL_U_GT3_IDS(info) \  argument
516 #define INTEL_WHL_U_GT1_IDS(info) \  argument
521 #define INTEL_WHL_U_GT2_IDS(info) \  argument
526 #define INTEL_WHL_U_GT3_IDS(info) \  argument
529 #define INTEL_CFL_IDS(info)	   \  argument
546 #define INTEL_CNL_PORT_F_IDS(info) \  argument
552 #define INTEL_CNL_IDS(info) \  argument
566 #define INTEL_ICL_PORT_F_IDS(info) \  argument
581 #define INTEL_ICL_11_IDS(info) \  argument
587 #define INTEL_EHL_IDS(info) \  argument
597 #define INTEL_TGL_12_IDS(info) \  argument