91 static void bmdma_setup_bar(PCIIDEState *d)  in bmdma_setup_bar()  argument
95     memory_region_init(&d->bmdma_bar, OBJECT(d), "via-bmdma-container", 16);  in bmdma_setup_bar()
96     for (i = 0; i < ARRAY_SIZE(d->bmdma); i++) {  in bmdma_setup_bar()
97         BMDMAState *bm = &d->bmdma[i];  in bmdma_setup_bar()
99         memory_region_init_io(&bm->extra_io, OBJECT(d), &via_bmdma_ops, bm,  in bmdma_setup_bar()
101         memory_region_add_subregion(&d->bmdma_bar, i * 8, &bm->extra_io);  in bmdma_setup_bar()
102         memory_region_init_io(&bm->addr_ioport, OBJECT(d),  in bmdma_setup_bar()
104         memory_region_add_subregion(&d->bmdma_bar, i * 8 + 4, &bm->addr_ioport);  in bmdma_setup_bar()
111     PCIDevice *d = PCI_DEVICE(s);  in via_ide_set_irq()  local
114         d->config[0x70 + n * 8] |= 0x80;  in via_ide_set_irq()
116         d->config[0x70 + n * 8] &= ~0x80;  in via_ide_set_irq()
124     PCIIDEState *d = PCI_IDE(dev);  in via_ide_reset()  local
129     for (i = 0; i < ARRAY_SIZE(d->bus); i++) {  in via_ide_reset()
130         ide_bus_reset(&d->bus[i]);  in via_ide_reset()
134     pci_ide_update_mode(d);  in via_ide_reset()
188     PCIIDEState *d = PCI_IDE(pd);  in via_ide_cfg_write()  local
193         pci_ide_update_mode(d);  in via_ide_cfg_write()
199     PCIIDEState *d = PCI_IDE(dev);  in via_ide_realize()  local
208     memory_region_init_io(&d->data_bar[0], OBJECT(d), &pci_ide_data_le_ops,  in via_ide_realize()
209                           &d->bus[0], "via-ide0-data", 8);  in via_ide_realize()
210     pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[0]);  in via_ide_realize()
212     memory_region_init_io(&d->cmd_bar[0], OBJECT(d), &pci_ide_cmd_le_ops,  in via_ide_realize()
213                           &d->bus[0], "via-ide0-cmd", 4);  in via_ide_realize()
214     pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[0]);  in via_ide_realize()
216     memory_region_init_io(&d->data_bar[1], OBJECT(d), &pci_ide_data_le_ops,  in via_ide_realize()
217                           &d->bus[1], "via-ide1-data", 8);  in via_ide_realize()
218     pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[1]);  in via_ide_realize()
220     memory_region_init_io(&d->cmd_bar[1], OBJECT(d), &pci_ide_cmd_le_ops,  in via_ide_realize()
221                           &d->bus[1], "via-ide1-cmd", 4);  in via_ide_realize()
222     pci_register_bar(dev, 3, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[1]);  in via_ide_realize()
224     bmdma_setup_bar(d);  in via_ide_realize()
225     pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar);  in via_ide_realize()
227     qdev_init_gpio_in(ds, via_ide_set_irq, ARRAY_SIZE(d->bus));  in via_ide_realize()
228     for (i = 0; i < ARRAY_SIZE(d->bus); i++) {  in via_ide_realize()
229         ide_bus_init(&d->bus[i], sizeof(d->bus[i]), ds, i, MAX_IDE_DEVS);  in via_ide_realize()
230         ide_bus_init_output_irq(&d->bus[i], qdev_get_gpio_in(ds, i));  in via_ide_realize()
232         bmdma_init(&d->bus[i], &d->bmdma[i], d);  in via_ide_realize()
233         ide_bus_register_restart_cb(&d->bus[i]);  in via_ide_realize()
239     PCIIDEState *d = PCI_IDE(dev);  in via_ide_exitfn()  local
242     for (i = 0; i < ARRAY_SIZE(d->bmdma); ++i) {  in via_ide_exitfn()
243         memory_region_del_subregion(&d->bmdma_bar, &d->bmdma[i].extra_io);  in via_ide_exitfn()
244         memory_region_del_subregion(&d->bmdma_bar, &d->bmdma[i].addr_ioport);  in via_ide_exitfn()