Lines Matching refs:s
52 static void can_sja_software_reset(CanSJA1000State *s) in can_sja_software_reset() argument
54 s->mode &= ~0x31; in can_sja_software_reset()
55 s->mode |= 0x01; in can_sja_software_reset()
56 s->status_pel &= ~0x37; in can_sja_software_reset()
57 s->status_pel |= 0x34; in can_sja_software_reset()
59 s->rxbuf_start = 0x00; in can_sja_software_reset()
60 s->rxmsg_cnt = 0x00; in can_sja_software_reset()
61 s->rx_cnt = 0x00; in can_sja_software_reset()
64 void can_sja_hardware_reset(CanSJA1000State *s) in can_sja_hardware_reset() argument
67 s->mode = 0x01; in can_sja_hardware_reset()
68 s->status_pel = 0x3c; in can_sja_hardware_reset()
69 s->interrupt_pel = 0x00; in can_sja_hardware_reset()
70 s->clock = 0x00; in can_sja_hardware_reset()
71 s->rxbuf_start = 0x00; in can_sja_hardware_reset()
72 s->rxmsg_cnt = 0x00; in can_sja_hardware_reset()
73 s->rx_cnt = 0x00; in can_sja_hardware_reset()
75 s->control = 0x01; in can_sja_hardware_reset()
76 s->status_bas = 0x0c; in can_sja_hardware_reset()
77 s->interrupt_bas = 0x00; in can_sja_hardware_reset()
79 qemu_irq_lower(s->irq); in can_sja_hardware_reset()
148 int can_sja_accept_filter(CanSJA1000State *s, in can_sja_accept_filter() argument
154 if (s->clock & 0x80) { /* PeliCAN Mode */ in can_sja_accept_filter()
155 if (s->mode & (1 << 3)) { /* Single mode. */ in can_sja_accept_filter()
158 s->code_mask + 0, s->code_mask + 4, 1); in can_sja_accept_filter()
165 s->code_mask + 0, s->code_mask + 4, 0); in can_sja_accept_filter()
179 if ((frame->data[0] & ~(s->code_mask[6])) != in can_sja_accept_filter()
180 (s->code_mask[2] & ~(s->code_mask[6]))) { in can_sja_accept_filter()
188 if ((frame->data[1] & ~(s->code_mask[7])) == in can_sja_accept_filter()
189 (s->code_mask[3] & ~(s->code_mask[7]))) { in can_sja_accept_filter()
198 s->code_mask + 0, s->code_mask + 4, 1); in can_sja_accept_filter()
205 s->code_mask + 2, s->code_mask + 6, 1); in can_sja_accept_filter()
214 s->code_mask + 0, s->code_mask + 4, 0); in can_sja_accept_filter()
219 expect = s->code_mask[1] << 4; in can_sja_accept_filter()
220 expect |= s->code_mask[3] & 0x0f; in can_sja_accept_filter()
222 mask = s->code_mask[5] << 4; in can_sja_accept_filter()
223 mask |= s->code_mask[7] & 0x0f; in can_sja_accept_filter()
233 s->code_mask + 2, s->code_mask + 6, 0); in can_sja_accept_filter()
404 static void can_sja_update_pel_irq(CanSJA1000State *s) in can_sja_update_pel_irq() argument
406 if (s->interrupt_en & s->interrupt_pel) { in can_sja_update_pel_irq()
407 qemu_irq_raise(s->irq); in can_sja_update_pel_irq()
409 qemu_irq_lower(s->irq); in can_sja_update_pel_irq()
413 static void can_sja_update_bas_irq(CanSJA1000State *s) in can_sja_update_bas_irq() argument
415 if ((s->control >> 1) & s->interrupt_bas) { in can_sja_update_bas_irq()
416 qemu_irq_raise(s->irq); in can_sja_update_bas_irq()
418 qemu_irq_lower(s->irq); in can_sja_update_bas_irq()
422 void can_sja_mem_write(CanSJA1000State *s, hwaddr addr, uint64_t val, in can_sja_mem_write() argument
437 if (s->clock & 0x80) { /* PeliCAN Mode */ in can_sja_mem_write()
440 s->mode = 0x1f & val; in can_sja_mem_write()
441 if ((s->mode & 0x01) && ((val & 0x01) == 0)) { in can_sja_mem_write()
443 if (s->mode & (1 << 3)) { /* Single mode. */ in can_sja_mem_write()
445 can_sja_single_filter(&s->filter[0], in can_sja_mem_write()
446 s->code_mask + 0, s->code_mask + 4, 1); in can_sja_mem_write()
449 can_sja_single_filter(&s->filter[1], in can_sja_mem_write()
450 s->code_mask + 0, s->code_mask + 4, 0); in can_sja_mem_write()
452 can_bus_client_set_filters(&s->bus_client, s->filter, 2); in can_sja_mem_write()
455 can_sja_dual_filter(&s->filter[0], in can_sja_mem_write()
456 s->code_mask + 0, s->code_mask + 4, 1); in can_sja_mem_write()
458 can_sja_dual_filter(&s->filter[1], in can_sja_mem_write()
459 s->code_mask + 2, s->code_mask + 6, 1); in can_sja_mem_write()
462 can_sja_dual_filter(&s->filter[2], in can_sja_mem_write()
463 s->code_mask + 0, s->code_mask + 4, 0); in can_sja_mem_write()
465 can_sja_dual_filter(&s->filter[3], in can_sja_mem_write()
466 s->code_mask + 2, s->code_mask + 6, 0); in can_sja_mem_write()
468 can_bus_client_set_filters(&s->bus_client, s->filter, 4); in can_sja_mem_write()
471 s->rxmsg_cnt = 0; in can_sja_mem_write()
472 s->rx_cnt = 0; in can_sja_mem_write()
478 buff2frame_pel(s->tx_buff, &frame); in can_sja_mem_write()
488 s->status_pel &= ~(3 << 2); in can_sja_mem_write()
490 can_bus_client_send(&s->bus_client, &frame, 1); in can_sja_mem_write()
496 s->status_pel |= (3 << 2); in can_sja_mem_write()
499 s->status_pel &= ~(1 << 5); in can_sja_mem_write()
500 s->interrupt_pel |= 0x02; in can_sja_mem_write()
501 can_sja_update_pel_irq(s); in can_sja_mem_write()
504 if (s->rxmsg_cnt <= 0) { in can_sja_mem_write()
508 tmp8 = s->rx_buff[s->rxbuf_start]; count = 0; in can_sja_mem_write()
519 "Rx FIFO cnt=%d, count=%d\n", s->rx_cnt, count); in can_sja_mem_write()
522 s->rxbuf_start += count; in can_sja_mem_write()
523 s->rxbuf_start %= SJA_RCV_BUF_LEN; in can_sja_mem_write()
525 s->rx_cnt -= count; in can_sja_mem_write()
526 s->rxmsg_cnt--; in can_sja_mem_write()
527 if (s->rxmsg_cnt == 0) { in can_sja_mem_write()
528 s->status_pel &= ~(1 << 0); in can_sja_mem_write()
529 s->interrupt_pel &= ~(1 << 0); in can_sja_mem_write()
530 can_sja_update_pel_irq(s); in can_sja_mem_write()
534 s->status_pel &= ~(1 << 1); in can_sja_mem_write()
535 s->interrupt_pel &= ~(1 << 3); in can_sja_mem_write()
536 can_sja_update_pel_irq(s); in can_sja_mem_write()
543 s->interrupt_en = val; in can_sja_mem_write()
546 s->status_pel |= (1 << 5); /* Set transmit status. */ in can_sja_mem_write()
549 if (s->mode & 0x01) { /* Reset mode */ in can_sja_mem_write()
551 s->code_mask[addr - 16] = val; in can_sja_mem_write()
554 s->tx_buff[addr - 16] = val; /* Store to TX buffer directly. */ in can_sja_mem_write()
558 s->clock = val; in can_sja_mem_write()
564 if ((s->control & 0x01) && ((val & 0x01) == 0)) { in can_sja_mem_write()
566 s->filter[0].can_id = (s->code << 3) & (0xff << 3); in can_sja_mem_write()
567 tmp = (~(s->mask << 3)) & (0xff << 3); in can_sja_mem_write()
569 s->filter[0].can_mask = tmp; in can_sja_mem_write()
570 can_bus_client_set_filters(&s->bus_client, s->filter, 1); in can_sja_mem_write()
572 s->rxmsg_cnt = 0; in can_sja_mem_write()
573 s->rx_cnt = 0; in can_sja_mem_write()
574 } else if (!(s->control & 0x01) && !(val & 0x01)) { in can_sja_mem_write()
575 can_sja_software_reset(s); in can_sja_mem_write()
578 s->control = 0x1f & val; in can_sja_mem_write()
582 buff2frame_bas(s->tx_buff, &frame); in can_sja_mem_write()
591 s->status_bas &= ~(3 << 2); in can_sja_mem_write()
594 can_bus_client_send(&s->bus_client, &frame, 1); in can_sja_mem_write()
600 s->status_bas |= (3 << 2); in can_sja_mem_write()
603 s->status_bas &= ~(1 << 5); in can_sja_mem_write()
604 s->interrupt_bas |= 0x02; in can_sja_mem_write()
605 can_sja_update_bas_irq(s); in can_sja_mem_write()
608 if (s->rxmsg_cnt <= 0) { in can_sja_mem_write()
612 tmp8 = s->rx_buff[(s->rxbuf_start + 1) % SJA_RCV_BUF_LEN]; in can_sja_mem_write()
617 "Rx FIFO cnt=%d, count=%d\n", s->rx_cnt, count); in can_sja_mem_write()
620 s->rxbuf_start += count; in can_sja_mem_write()
621 s->rxbuf_start %= SJA_RCV_BUF_LEN; in can_sja_mem_write()
622 s->rx_cnt -= count; in can_sja_mem_write()
623 s->rxmsg_cnt--; in can_sja_mem_write()
625 if (s->rxmsg_cnt == 0) { in can_sja_mem_write()
626 s->status_bas &= ~(1 << 0); in can_sja_mem_write()
627 s->interrupt_bas &= ~(1 << 0); in can_sja_mem_write()
628 can_sja_update_bas_irq(s); in can_sja_mem_write()
632 s->status_bas &= ~(1 << 1); in can_sja_mem_write()
633 s->interrupt_bas &= ~(1 << 3); in can_sja_mem_write()
634 can_sja_update_bas_irq(s); in can_sja_mem_write()
638 s->code = val; in can_sja_mem_write()
641 s->mask = val; in can_sja_mem_write()
644 s->status_bas |= (1 << 5); /* Set transmit status. */ in can_sja_mem_write()
647 if ((s->control & 0x01) == 0) { /* Operation mode */ in can_sja_mem_write()
648 s->tx_buff[addr - 10] = val; /* Store to TX buffer directly. */ in can_sja_mem_write()
652 s->clock = val; in can_sja_mem_write()
658 uint64_t can_sja_mem_read(CanSJA1000State *s, hwaddr addr, unsigned size) in can_sja_mem_read() argument
668 if (s->clock & 0x80) { /* PeliCAN Mode */ in can_sja_mem_read()
671 temp = s->mode; in can_sja_mem_read()
677 temp = s->status_pel; in can_sja_mem_read()
680 temp = s->interrupt_pel; in can_sja_mem_read()
681 s->interrupt_pel = 0; in can_sja_mem_read()
682 if (s->rxmsg_cnt) { in can_sja_mem_read()
683 s->interrupt_pel |= (1 << 0); /* Receive interrupt. */ in can_sja_mem_read()
685 can_sja_update_pel_irq(s); in can_sja_mem_read()
688 temp = s->interrupt_en; in can_sja_mem_read()
703 if (s->mode & 0x01) { /* Reset mode */ in can_sja_mem_read()
705 temp = s->code_mask[addr - 16]; in can_sja_mem_read()
710 temp = s->rx_buff[(s->rxbuf_start + addr - 16) % in can_sja_mem_read()
715 temp = s->clock; in can_sja_mem_read()
723 temp = s->control; in can_sja_mem_read()
726 temp = s->status_bas; in can_sja_mem_read()
729 temp = s->interrupt_bas; in can_sja_mem_read()
730 s->interrupt_bas = 0; in can_sja_mem_read()
731 if (s->rxmsg_cnt) { in can_sja_mem_read()
732 s->interrupt_bas |= (1 << 0); /* Receive interrupt. */ in can_sja_mem_read()
734 can_sja_update_bas_irq(s); in can_sja_mem_read()
737 temp = s->code; in can_sja_mem_read()
740 temp = s->mask; in can_sja_mem_read()
743 temp = s->rx_buff[(s->rxbuf_start + addr - 20) % SJA_RCV_BUF_LEN]; in can_sja_mem_read()
746 temp = s->clock; in can_sja_mem_read()
761 CanSJA1000State *s = container_of(client, CanSJA1000State, bus_client); in can_sja_can_receive() local
763 if (s->clock & 0x80) { /* PeliCAN Mode */ in can_sja_can_receive()
764 if (s->mode & 0x01) { /* reset mode. */ in can_sja_can_receive()
768 if (s->control & 0x01) { in can_sja_can_receive()
779 CanSJA1000State *s = container_of(client, CanSJA1000State, bus_client); in can_sja_receive() local
799 if (s->clock & 0x80) { /* PeliCAN Mode */ in can_sja_receive()
802 s->status_pel |= (1 << 4); in can_sja_receive()
804 if (can_sja_accept_filter(s, frame) == 0) { in can_sja_receive()
805 s->status_pel &= ~(1 << 4); in can_sja_receive()
814 s->status_pel &= ~(1 << 4); in can_sja_receive()
821 if (s->rx_cnt + ret > SJA_RCV_BUF_LEN) { /* Data overrun. */ in can_sja_receive()
822 s->status_pel |= (1 << 1); /* Overrun status */ in can_sja_receive()
823 s->interrupt_pel |= (1 << 3); in can_sja_receive()
824 s->status_pel &= ~(1 << 4); in can_sja_receive()
828 can_sja_update_pel_irq(s); in can_sja_receive()
831 s->rx_cnt += ret; in can_sja_receive()
832 s->rxmsg_cnt++; in can_sja_receive()
838 s->rx_buff[(s->rx_ptr++) % SJA_RCV_BUF_LEN] = rcv[i]; in can_sja_receive()
840 s->rx_ptr %= SJA_RCV_BUF_LEN; /* update the pointer. */ in can_sja_receive()
842 s->status_pel |= 0x01; /* Set the Receive Buffer Status. DS-p23 */ in can_sja_receive()
843 s->interrupt_pel |= 0x01; in can_sja_receive()
844 s->status_pel &= ~(1 << 4); in can_sja_receive()
845 s->status_pel |= (1 << 0); in can_sja_receive()
846 can_sja_update_pel_irq(s); in can_sja_receive()
850 s->status_bas |= (1 << 4); in can_sja_receive()
854 s->status_bas &= ~(1 << 4); in can_sja_receive()
861 if (s->rx_cnt + ret > SJA_RCV_BUF_LEN) { /* Data overrun. */ in can_sja_receive()
862 s->status_bas |= (1 << 1); /* Overrun status */ in can_sja_receive()
863 s->status_bas &= ~(1 << 4); in can_sja_receive()
864 s->interrupt_bas |= (1 << 3); in can_sja_receive()
865 can_sja_update_bas_irq(s); in can_sja_receive()
871 s->rx_cnt += ret; in can_sja_receive()
872 s->rxmsg_cnt++; in can_sja_receive()
879 s->rx_buff[(s->rx_ptr++) % SJA_RCV_BUF_LEN] = rcv[i]; in can_sja_receive()
881 s->rx_ptr %= SJA_RCV_BUF_LEN; /* update the pointer. */ in can_sja_receive()
883 s->status_bas |= 0x01; /* Set the Receive Buffer Status. DS-p15 */ in can_sja_receive()
884 s->status_bas &= ~(1 << 4); in can_sja_receive()
885 s->interrupt_bas |= (1 << 0); in can_sja_receive()
886 can_sja_update_bas_irq(s); in can_sja_receive()
897 int can_sja_connect_to_bus(CanSJA1000State *s, CanBusState *bus) in can_sja_connect_to_bus() argument
899 s->bus_client.info = &can_sja_bus_client_info; in can_sja_connect_to_bus()
905 if (can_bus_insert_client(bus, &s->bus_client) < 0) { in can_sja_connect_to_bus()
912 void can_sja_disconnect(CanSJA1000State *s) in can_sja_disconnect() argument
914 can_bus_remove_client(&s->bus_client); in can_sja_disconnect()
917 int can_sja_init(CanSJA1000State *s, qemu_irq irq) in can_sja_init() argument
919 s->irq = irq; in can_sja_init()
921 qemu_irq_lower(s->irq); in can_sja_init()
923 can_sja_hardware_reset(s); in can_sja_init()
941 CanSJA1000State *s = opaque; in can_sja_post_load() local
942 if (s->clock & 0x80) { /* PeliCAN Mode */ in can_sja_post_load()
943 can_sja_update_pel_irq(s); in can_sja_post_load()
945 can_sja_update_bas_irq(s); in can_sja_post_load()