41 static void cpu_ppc_tb_stop (CPUPPCState *env);
42 static void cpu_ppc_tb_start (CPUPPCState *env);
46     CPUPPCState *env = &cpu->env;  in ppc_set_irq()
75     CPUPPCState *env = &cpu->env;  in ppc6xx_set_irq()
155     CPUPPCState *env = &cpu->env;  in ppc970_set_irq()
282     CPUPPCState *env = &cpu->env;  in ppc40x_core_reset()
295     CPUPPCState *env = &cpu->env;  in ppc40x_chip_reset()
313 void store_40x_dbcr0(CPUPPCState *env, uint32_t val)  in store_40x_dbcr0()
344     CPUPPCState *env = &cpu->env;  in ppc40x_set_irq()
419     CPUPPCState *env = &cpu->env;  in ppce500_set_irq()
516 uint64_t cpu_ppc_load_tbl (CPUPPCState *env)  in cpu_ppc_load_tbl()
532 static inline uint32_t _cpu_ppc_load_tbu(CPUPPCState *env)  in _cpu_ppc_load_tbu()
544 uint32_t cpu_ppc_load_tbu (CPUPPCState *env)  in cpu_ppc_load_tbu()
561 void cpu_ppc_store_tbl (CPUPPCState *env, uint32_t value)  in cpu_ppc_store_tbl()
572 static inline void _cpu_ppc_store_tbu(CPUPPCState *env, uint32_t value)  in _cpu_ppc_store_tbu()
584 void cpu_ppc_store_tbu (CPUPPCState *env, uint32_t value)  in cpu_ppc_store_tbu()
589 uint64_t cpu_ppc_load_atbl (CPUPPCState *env)  in cpu_ppc_load_atbl()
601 uint32_t cpu_ppc_load_atbu (CPUPPCState *env)  in cpu_ppc_load_atbu()
613 void cpu_ppc_store_atbl (CPUPPCState *env, uint32_t value)  in cpu_ppc_store_atbl()
624 void cpu_ppc_store_atbu (CPUPPCState *env, uint32_t value)  in cpu_ppc_store_atbu()
636 void cpu_ppc_increase_tb_by_offset(CPUPPCState *env, int64_t offset)  in cpu_ppc_increase_tb_by_offset()
641 void cpu_ppc_decrease_tb_by_offset(CPUPPCState *env, int64_t offset)  in cpu_ppc_decrease_tb_by_offset()
646 uint64_t cpu_ppc_load_vtb(CPUPPCState *env)  in cpu_ppc_load_vtb()
654 void cpu_ppc_store_vtb(CPUPPCState *env, uint64_t value)  in cpu_ppc_store_vtb()
662 void cpu_ppc_store_tbu40(CPUPPCState *env, uint64_t value)  in cpu_ppc_store_tbu40()
674 static void cpu_ppc_tb_stop (CPUPPCState *env)  in cpu_ppc_tb_stop()
696 static void cpu_ppc_tb_start (CPUPPCState *env)  in cpu_ppc_tb_start()
717 bool ppc_decr_clear_on_delivery(CPUPPCState *env)  in ppc_decr_clear_on_delivery()
724 static inline int64_t __cpu_ppc_load_decr(CPUPPCState *env, int64_t now,  in __cpu_ppc_load_decr()
743 static target_ulong _cpu_ppc_load_decr(CPUPPCState *env, int64_t now)  in _cpu_ppc_load_decr()
762 target_ulong cpu_ppc_load_decr(CPUPPCState *env)  in cpu_ppc_load_decr()
771 static target_ulong _cpu_ppc_load_hdecr(CPUPPCState *env, int64_t now)  in _cpu_ppc_load_hdecr()
790 target_ulong cpu_ppc_load_hdecr(CPUPPCState *env)  in cpu_ppc_load_hdecr()
795 uint64_t cpu_ppc_load_purr (CPUPPCState *env)  in cpu_ppc_load_purr()
820     CPUPPCState *env = &cpu->env;  in cpu_ppc_hdecr_excp()
846     CPUPPCState *env = &cpu->env;  in __cpu_ppc_store_decr()
905 void cpu_ppc_store_decr(CPUPPCState *env, target_ulong value)  in cpu_ppc_store_decr()
949 void cpu_ppc_store_hdecr(CPUPPCState *env, target_ulong value)  in cpu_ppc_store_hdecr()
968 static void _cpu_ppc_store_purr(CPUPPCState *env, int64_t now, uint64_t value)  in _cpu_ppc_store_purr()
975 void cpu_ppc_store_purr(CPUPPCState *env, uint64_t value)  in cpu_ppc_store_purr()
1087 void cpu_ppc_tb_init(CPUPPCState *env, uint32_t freq)  in cpu_ppc_tb_init()
1113 void cpu_ppc_tb_reset(CPUPPCState *env)  in cpu_ppc_tb_reset()
1137 void cpu_ppc_tb_free(CPUPPCState *env)  in cpu_ppc_tb_free()
1145 void cpu_ppc_hdecr_init(CPUPPCState *env)  in cpu_ppc_hdecr_init()
1155 void cpu_ppc_hdecr_exit(CPUPPCState *env)  in cpu_ppc_hdecr_exit()
1185     CPUPPCState *env = &cpu->env;  in cpu_4xx_fit_cb()
1221 static void start_stop_pit (CPUPPCState *env, ppc_tb_t *tb_env, int is_excp)  in start_stop_pit()
1251     CPUPPCState *env = &cpu->env;  in cpu_4xx_pit_cb()
1272     CPUPPCState *env = &cpu->env;  in cpu_4xx_wdt_cb()
1334 void store_40x_pit (CPUPPCState *env, target_ulong val)  in store_40x_pit()
1346 target_ulong load_40x_pit (CPUPPCState *env)  in load_40x_pit()
1351 void store_40x_tsr(CPUPPCState *env, target_ulong val)  in store_40x_tsr()
1363 void store_40x_tcr(CPUPPCState *env, target_ulong val)  in store_40x_tcr()
1378     CPUPPCState *env = opaque;  in ppc_40x_set_tb_clk()
1387 clk_setup_cb ppc_40x_timers_init (CPUPPCState *env, uint32_t freq,  in ppc_40x_timers_init()
1477 int ppc_dcr_register (CPUPPCState *env, int dcrn, void *opaque,  in ppc_dcr_register()
1500 int ppc_dcr_init (CPUPPCState *env, int (*read_error)(int dcrn),  in ppc_dcr_init()
1517     CPUPPCState *env = &cpu->env;  in ppc_cpu_pir()
1523     CPUPPCState *env = &cpu->env;  in ppc_cpu_tir()
1544     CPUPPCState *env = &cpu->env;  in ppc_irq_reset()