Lines Matching refs:s
51 static inline unsigned int sdhci_get_fifolen(SDHCIState *s) in DECLARE_INSTANCE_CHECKER()
53 return 1 << (9 + FIELD_EX32(s->capareg, SDHC_CAPAB, MAXBLOCKLENGTH)); in DECLARE_INSTANCE_CHECKER()
57 static bool sdhci_check_capab_freq_range(SDHCIState *s, const char *desc, in sdhci_check_capab_freq_range() argument
60 if (s->sd_spec_version >= 3) { in sdhci_check_capab_freq_range()
75 static void sdhci_check_capareg(SDHCIState *s, Error **errp) in sdhci_check_capareg() argument
77 uint64_t msk = s->capareg; in sdhci_check_capareg()
81 switch (s->sd_spec_version) { in sdhci_check_capareg()
83 val = FIELD_EX64(s->capareg, SDHC_CAPAB, BUS64BIT_V4); in sdhci_check_capareg()
87 val = FIELD_EX64(s->capareg, SDHC_CAPAB, UHS_II); in sdhci_check_capareg()
91 val = FIELD_EX64(s->capareg, SDHC_CAPAB, ADMA3); in sdhci_check_capareg()
97 val = FIELD_EX64(s->capareg, SDHC_CAPAB, ASYNC_INT); in sdhci_check_capareg()
101 val = FIELD_EX64(s->capareg, SDHC_CAPAB, SLOT_TYPE); in sdhci_check_capareg()
110 val = FIELD_EX64(s->capareg, SDHC_CAPAB, EMBEDDED_8BIT); in sdhci_check_capareg()
115 val = FIELD_EX64(s->capareg, SDHC_CAPAB, BUS_SPEED); in sdhci_check_capareg()
119 val = FIELD_EX64(s->capareg, SDHC_CAPAB, DRIVER_STRENGTH); in sdhci_check_capareg()
123 val = FIELD_EX64(s->capareg, SDHC_CAPAB, TIMER_RETUNING); in sdhci_check_capareg()
127 val = FIELD_EX64(s->capareg, SDHC_CAPAB, SDR50_TUNING); in sdhci_check_capareg()
131 val = FIELD_EX64(s->capareg, SDHC_CAPAB, RETUNING_MODE); in sdhci_check_capareg()
135 val = FIELD_EX64(s->capareg, SDHC_CAPAB, CLOCK_MULT); in sdhci_check_capareg()
141 val = FIELD_EX64(s->capareg, SDHC_CAPAB, ADMA2); in sdhci_check_capareg()
145 val = FIELD_EX64(s->capareg, SDHC_CAPAB, ADMA1); in sdhci_check_capareg()
149 val = FIELD_EX64(s->capareg, SDHC_CAPAB, BUS64BIT); in sdhci_check_capareg()
155 y = FIELD_EX64(s->capareg, SDHC_CAPAB, TOUNIT); in sdhci_check_capareg()
158 val = FIELD_EX64(s->capareg, SDHC_CAPAB, TOCLKFREQ); in sdhci_check_capareg()
160 if (sdhci_check_capab_freq_range(s, "timeout", val, errp)) { in sdhci_check_capareg()
165 val = FIELD_EX64(s->capareg, SDHC_CAPAB, BASECLKFREQ); in sdhci_check_capareg()
167 if (sdhci_check_capab_freq_range(s, "base", val, errp)) { in sdhci_check_capareg()
172 val = FIELD_EX64(s->capareg, SDHC_CAPAB, MAXBLOCKLENGTH); in sdhci_check_capareg()
177 trace_sdhci_capareg("max block length", sdhci_get_fifolen(s)); in sdhci_check_capareg()
180 val = FIELD_EX64(s->capareg, SDHC_CAPAB, HIGHSPEED); in sdhci_check_capareg()
184 val = FIELD_EX64(s->capareg, SDHC_CAPAB, SDMA); in sdhci_check_capareg()
188 val = FIELD_EX64(s->capareg, SDHC_CAPAB, SUSPRESUME); in sdhci_check_capareg()
192 val = FIELD_EX64(s->capareg, SDHC_CAPAB, V33); in sdhci_check_capareg()
196 val = FIELD_EX64(s->capareg, SDHC_CAPAB, V30); in sdhci_check_capareg()
200 val = FIELD_EX64(s->capareg, SDHC_CAPAB, V18); in sdhci_check_capareg()
206 error_setg(errp, "Unsupported spec version: %u", s->sd_spec_version); in sdhci_check_capareg()
214 static uint8_t sdhci_slotint(SDHCIState *s) in sdhci_slotint() argument
216 return (s->norintsts & s->norintsigen) || (s->errintsts & s->errintsigen) || in sdhci_slotint()
217 ((s->norintsts & SDHC_NIS_INSERT) && (s->wakcon & SDHC_WKUP_ON_INS)) || in sdhci_slotint()
218 ((s->norintsts & SDHC_NIS_REMOVE) && (s->wakcon & SDHC_WKUP_ON_RMV)); in sdhci_slotint()
222 static bool sdhci_update_irq(SDHCIState *s) in sdhci_update_irq() argument
224 bool pending = sdhci_slotint(s); in sdhci_update_irq()
226 qemu_set_irq(s->irq, pending); in sdhci_update_irq()
233 SDHCIState *s = (SDHCIState *)opaque; in sdhci_raise_insertion_irq() local
235 if (s->norintsts & SDHC_NIS_REMOVE) { in sdhci_raise_insertion_irq()
236 timer_mod(s->insert_timer, in sdhci_raise_insertion_irq()
239 s->prnsts = 0x1ff0000; in sdhci_raise_insertion_irq()
240 if (s->norintstsen & SDHC_NISEN_INSERT) { in sdhci_raise_insertion_irq()
241 s->norintsts |= SDHC_NIS_INSERT; in sdhci_raise_insertion_irq()
243 sdhci_update_irq(s); in sdhci_raise_insertion_irq()
249 SDHCIState *s = (SDHCIState *)dev; in sdhci_set_inserted() local
252 if ((s->norintsts & SDHC_NIS_REMOVE) && level) { in sdhci_set_inserted()
254 timer_mod(s->insert_timer, in sdhci_set_inserted()
258 s->prnsts = 0x1ff0000; in sdhci_set_inserted()
259 if (s->norintstsen & SDHC_NISEN_INSERT) { in sdhci_set_inserted()
260 s->norintsts |= SDHC_NIS_INSERT; in sdhci_set_inserted()
263 s->prnsts = 0x1fa0000; in sdhci_set_inserted()
264 s->pwrcon &= ~SDHC_POWER_ON; in sdhci_set_inserted()
265 s->clkcon &= ~SDHC_CLOCK_SDCLK_EN; in sdhci_set_inserted()
266 if (s->norintstsen & SDHC_NISEN_REMOVE) { in sdhci_set_inserted()
267 s->norintsts |= SDHC_NIS_REMOVE; in sdhci_set_inserted()
270 sdhci_update_irq(s); in sdhci_set_inserted()
276 SDHCIState *s = (SDHCIState *)dev; in sdhci_set_readonly() local
279 s->prnsts &= ~SDHC_WRITE_PROTECT; in sdhci_set_readonly()
282 s->prnsts |= SDHC_WRITE_PROTECT; in sdhci_set_readonly()
286 static void sdhci_reset(SDHCIState *s) in sdhci_reset() argument
288 DeviceState *dev = DEVICE(s); in sdhci_reset()
290 timer_del(s->insert_timer); in sdhci_reset()
291 timer_del(s->transfer_timer); in sdhci_reset()
296 memset(&s->sdmasysad, 0, (uintptr_t)&s->capareg - (uintptr_t)&s->sdmasysad); in sdhci_reset()
299 sdhci_set_inserted(dev, sdbus_get_inserted(&s->sdbus)); in sdhci_reset()
300 sdhci_set_readonly(dev, sdbus_get_readonly(&s->sdbus)); in sdhci_reset()
302 s->data_count = 0; in sdhci_reset()
303 s->stopped_state = sdhc_not_stopped; in sdhci_reset()
304 s->pending_insert_state = false; in sdhci_reset()
313 SDHCIState *s = (SDHCIState *)dev; in sdhci_poweron_reset() local
315 sdhci_reset(s); in sdhci_poweron_reset()
317 if (s->pending_insert_quirk) { in sdhci_poweron_reset()
318 s->pending_insert_state = true; in sdhci_poweron_reset()
326 static void sdhci_send_command(SDHCIState *s) in sdhci_send_command() argument
333 s->errintsts = 0; in sdhci_send_command()
334 s->acmd12errsts = 0; in sdhci_send_command()
335 request.cmd = s->cmdreg >> 8; in sdhci_send_command()
336 request.arg = s->argument; in sdhci_send_command()
339 rlen = sdbus_do_command(&s->sdbus, &request, response); in sdhci_send_command()
341 if (s->cmdreg & SDHC_CMD_RESPONSE) { in sdhci_send_command()
343 s->rspreg[0] = ldl_be_p(response); in sdhci_send_command()
344 s->rspreg[1] = s->rspreg[2] = s->rspreg[3] = 0; in sdhci_send_command()
345 trace_sdhci_response4(s->rspreg[0]); in sdhci_send_command()
347 s->rspreg[0] = ldl_be_p(&response[11]); in sdhci_send_command()
348 s->rspreg[1] = ldl_be_p(&response[7]); in sdhci_send_command()
349 s->rspreg[2] = ldl_be_p(&response[3]); in sdhci_send_command()
350 s->rspreg[3] = (response[0] << 16) | (response[1] << 8) | in sdhci_send_command()
352 trace_sdhci_response16(s->rspreg[3], s->rspreg[2], in sdhci_send_command()
353 s->rspreg[1], s->rspreg[0]); in sdhci_send_command()
357 if (s->errintstsen & SDHC_EISEN_CMDTIMEOUT) { in sdhci_send_command()
358 s->errintsts |= SDHC_EIS_CMDTIMEOUT; in sdhci_send_command()
359 s->norintsts |= SDHC_NIS_ERR; in sdhci_send_command()
363 if (!(s->quirks & SDHCI_QUIRK_NO_BUSY_IRQ) && in sdhci_send_command()
364 (s->norintstsen & SDHC_NISEN_TRSCMP) && in sdhci_send_command()
365 (s->cmdreg & SDHC_CMD_RESPONSE) == SDHC_CMD_RSP_WITH_BUSY) { in sdhci_send_command()
366 s->norintsts |= SDHC_NIS_TRSCMP; in sdhci_send_command()
370 if (s->norintstsen & SDHC_NISEN_CMDCMP) { in sdhci_send_command()
371 s->norintsts |= SDHC_NIS_CMDCMP; in sdhci_send_command()
374 sdhci_update_irq(s); in sdhci_send_command()
376 if (!timeout && (s->blksize & BLOCK_SIZE_MASK) && in sdhci_send_command()
377 (s->cmdreg & SDHC_CMD_DATA_PRESENT)) { in sdhci_send_command()
378 s->data_count = 0; in sdhci_send_command()
379 sdhci_data_transfer(s); in sdhci_send_command()
383 static void sdhci_end_transfer(SDHCIState *s) in sdhci_end_transfer() argument
386 if ((s->trnmod & SDHC_TRNS_ACMD12) != 0) { in sdhci_end_transfer()
393 sdbus_do_command(&s->sdbus, &request, response); in sdhci_end_transfer()
395 s->rspreg[3] = ldl_be_p(response); in sdhci_end_transfer()
398 s->prnsts &= ~(SDHC_DOING_READ | SDHC_DOING_WRITE | in sdhci_end_transfer()
402 if (s->norintstsen & SDHC_NISEN_TRSCMP) { in sdhci_end_transfer()
403 s->norintsts |= SDHC_NIS_TRSCMP; in sdhci_end_transfer()
406 sdhci_update_irq(s); in sdhci_end_transfer()
414 static void sdhci_read_block_from_card(SDHCIState *s) in sdhci_read_block_from_card() argument
416 const uint16_t blk_size = s->blksize & BLOCK_SIZE_MASK; in sdhci_read_block_from_card()
418 if ((s->trnmod & SDHC_TRNS_MULTI) && in sdhci_read_block_from_card()
419 (s->trnmod & SDHC_TRNS_BLK_CNT_EN) && (s->blkcnt == 0)) { in sdhci_read_block_from_card()
423 if (!FIELD_EX32(s->hostctl2, SDHC_HOSTCTL2, EXECUTE_TUNING)) { in sdhci_read_block_from_card()
425 sdbus_read_data(&s->sdbus, s->fifo_buffer, blk_size); in sdhci_read_block_from_card()
428 if (FIELD_EX32(s->hostctl2, SDHC_HOSTCTL2, EXECUTE_TUNING)) { in sdhci_read_block_from_card()
430 s->hostctl2 &= ~R_SDHC_HOSTCTL2_EXECUTE_TUNING_MASK; in sdhci_read_block_from_card()
431 s->hostctl2 |= R_SDHC_HOSTCTL2_SAMPLING_CLKSEL_MASK; in sdhci_read_block_from_card()
432 s->prnsts &= ~(SDHC_DAT_LINE_ACTIVE | SDHC_DOING_READ | in sdhci_read_block_from_card()
438 s->prnsts |= SDHC_DATA_AVAILABLE; in sdhci_read_block_from_card()
439 if (s->norintstsen & SDHC_NISEN_RBUFRDY) { in sdhci_read_block_from_card()
440 s->norintsts |= SDHC_NIS_RBUFRDY; in sdhci_read_block_from_card()
444 if ((s->trnmod & SDHC_TRNS_MULTI) == 0 || in sdhci_read_block_from_card()
445 ((s->trnmod & SDHC_TRNS_MULTI) && s->blkcnt == 1)) { in sdhci_read_block_from_card()
446 s->prnsts &= ~SDHC_DAT_LINE_ACTIVE; in sdhci_read_block_from_card()
451 if (s->stopped_state == sdhc_gap_read && (s->trnmod & SDHC_TRNS_MULTI) && in sdhci_read_block_from_card()
452 s->blkcnt != 1) { in sdhci_read_block_from_card()
453 s->prnsts &= ~SDHC_DAT_LINE_ACTIVE; in sdhci_read_block_from_card()
454 if (s->norintstsen & SDHC_EISEN_BLKGAP) { in sdhci_read_block_from_card()
455 s->norintsts |= SDHC_EIS_BLKGAP; in sdhci_read_block_from_card()
460 sdhci_update_irq(s); in sdhci_read_block_from_card()
464 static uint32_t sdhci_read_dataport(SDHCIState *s, unsigned size) in sdhci_read_dataport() argument
470 if ((s->prnsts & SDHC_DATA_AVAILABLE) == 0) { in sdhci_read_dataport()
476 assert(s->data_count < s->buf_maxsz); in sdhci_read_dataport()
477 value |= s->fifo_buffer[s->data_count] << i * 8; in sdhci_read_dataport()
478 s->data_count++; in sdhci_read_dataport()
480 if ((s->data_count) >= (s->blksize & BLOCK_SIZE_MASK)) { in sdhci_read_dataport()
481 trace_sdhci_read_dataport(s->data_count); in sdhci_read_dataport()
482 s->prnsts &= ~SDHC_DATA_AVAILABLE; /* no more data in a buffer */ in sdhci_read_dataport()
483 s->data_count = 0; /* next buff read must start at position [0] */ in sdhci_read_dataport()
485 if (s->trnmod & SDHC_TRNS_BLK_CNT_EN) { in sdhci_read_dataport()
486 s->blkcnt--; in sdhci_read_dataport()
490 if ((s->trnmod & SDHC_TRNS_MULTI) == 0 || in sdhci_read_dataport()
491 ((s->trnmod & SDHC_TRNS_BLK_CNT_EN) && (s->blkcnt == 0)) || in sdhci_read_dataport()
493 (s->stopped_state == sdhc_gap_read && in sdhci_read_dataport()
494 !(s->prnsts & SDHC_DAT_LINE_ACTIVE))) { in sdhci_read_dataport()
495 sdhci_end_transfer(s); in sdhci_read_dataport()
497 sdhci_read_block_from_card(s); in sdhci_read_dataport()
507 static void sdhci_write_block_to_card(SDHCIState *s) in sdhci_write_block_to_card() argument
509 if (s->prnsts & SDHC_SPACE_AVAILABLE) { in sdhci_write_block_to_card()
510 if (s->norintstsen & SDHC_NISEN_WBUFRDY) { in sdhci_write_block_to_card()
511 s->norintsts |= SDHC_NIS_WBUFRDY; in sdhci_write_block_to_card()
513 sdhci_update_irq(s); in sdhci_write_block_to_card()
517 if (s->trnmod & SDHC_TRNS_BLK_CNT_EN) { in sdhci_write_block_to_card()
518 if (s->blkcnt == 0) { in sdhci_write_block_to_card()
521 s->blkcnt--; in sdhci_write_block_to_card()
525 sdbus_write_data(&s->sdbus, s->fifo_buffer, s->blksize & BLOCK_SIZE_MASK); in sdhci_write_block_to_card()
528 s->prnsts |= SDHC_SPACE_AVAILABLE; in sdhci_write_block_to_card()
531 if ((s->trnmod & SDHC_TRNS_MULTI) == 0 || in sdhci_write_block_to_card()
532 ((s->trnmod & SDHC_TRNS_MULTI) && in sdhci_write_block_to_card()
533 (s->trnmod & SDHC_TRNS_BLK_CNT_EN) && (s->blkcnt == 0))) { in sdhci_write_block_to_card()
534 sdhci_end_transfer(s); in sdhci_write_block_to_card()
535 } else if (s->norintstsen & SDHC_NISEN_WBUFRDY) { in sdhci_write_block_to_card()
536 s->norintsts |= SDHC_NIS_WBUFRDY; in sdhci_write_block_to_card()
540 if (s->stopped_state == sdhc_gap_write && (s->trnmod & SDHC_TRNS_MULTI) && in sdhci_write_block_to_card()
541 s->blkcnt > 0) { in sdhci_write_block_to_card()
542 s->prnsts &= ~SDHC_DOING_WRITE; in sdhci_write_block_to_card()
543 if (s->norintstsen & SDHC_EISEN_BLKGAP) { in sdhci_write_block_to_card()
544 s->norintsts |= SDHC_EIS_BLKGAP; in sdhci_write_block_to_card()
546 sdhci_end_transfer(s); in sdhci_write_block_to_card()
549 sdhci_update_irq(s); in sdhci_write_block_to_card()
554 static void sdhci_write_dataport(SDHCIState *s, uint32_t value, unsigned size) in sdhci_write_dataport() argument
559 if (!(s->prnsts & SDHC_SPACE_AVAILABLE)) { in sdhci_write_dataport()
565 assert(s->data_count < s->buf_maxsz); in sdhci_write_dataport()
566 s->fifo_buffer[s->data_count] = value & 0xFF; in sdhci_write_dataport()
567 s->data_count++; in sdhci_write_dataport()
569 if (s->data_count >= (s->blksize & BLOCK_SIZE_MASK)) { in sdhci_write_dataport()
570 trace_sdhci_write_dataport(s->data_count); in sdhci_write_dataport()
571 s->data_count = 0; in sdhci_write_dataport()
572 s->prnsts &= ~SDHC_SPACE_AVAILABLE; in sdhci_write_dataport()
573 if (s->prnsts & SDHC_DOING_WRITE) { in sdhci_write_dataport()
574 sdhci_write_block_to_card(s); in sdhci_write_dataport()
585 static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s) in sdhci_sdma_transfer_multi_blocks() argument
589 const uint16_t block_size = s->blksize & BLOCK_SIZE_MASK; in sdhci_sdma_transfer_multi_blocks()
590 uint32_t boundary_chk = 1 << (((s->blksize & ~BLOCK_SIZE_MASK) >> 12) + 12); in sdhci_sdma_transfer_multi_blocks()
591 uint32_t boundary_count = boundary_chk - (s->sdmasysad % boundary_chk); in sdhci_sdma_transfer_multi_blocks()
593 if (!(s->trnmod & SDHC_TRNS_BLK_CNT_EN) || !s->blkcnt) { in sdhci_sdma_transfer_multi_blocks()
601 if ((s->sdmasysad % boundary_chk) == 0) { in sdhci_sdma_transfer_multi_blocks()
605 s->prnsts |= SDHC_DATA_INHIBIT | SDHC_DAT_LINE_ACTIVE; in sdhci_sdma_transfer_multi_blocks()
606 if (s->trnmod & SDHC_TRNS_READ) { in sdhci_sdma_transfer_multi_blocks()
607 s->prnsts |= SDHC_DOING_READ; in sdhci_sdma_transfer_multi_blocks()
608 while (s->blkcnt) { in sdhci_sdma_transfer_multi_blocks()
609 if (s->data_count == 0) { in sdhci_sdma_transfer_multi_blocks()
610 sdbus_read_data(&s->sdbus, s->fifo_buffer, block_size); in sdhci_sdma_transfer_multi_blocks()
612 begin = s->data_count; in sdhci_sdma_transfer_multi_blocks()
614 s->data_count = boundary_count + begin; in sdhci_sdma_transfer_multi_blocks()
617 s->data_count = block_size; in sdhci_sdma_transfer_multi_blocks()
619 if (s->trnmod & SDHC_TRNS_BLK_CNT_EN) { in sdhci_sdma_transfer_multi_blocks()
620 s->blkcnt--; in sdhci_sdma_transfer_multi_blocks()
623 dma_memory_write(s->dma_as, s->sdmasysad, &s->fifo_buffer[begin], in sdhci_sdma_transfer_multi_blocks()
624 s->data_count - begin, MEMTXATTRS_UNSPECIFIED); in sdhci_sdma_transfer_multi_blocks()
625 s->sdmasysad += s->data_count - begin; in sdhci_sdma_transfer_multi_blocks()
626 if (s->data_count == block_size) { in sdhci_sdma_transfer_multi_blocks()
627 s->data_count = 0; in sdhci_sdma_transfer_multi_blocks()
634 s->prnsts |= SDHC_DOING_WRITE; in sdhci_sdma_transfer_multi_blocks()
635 while (s->blkcnt) { in sdhci_sdma_transfer_multi_blocks()
636 begin = s->data_count; in sdhci_sdma_transfer_multi_blocks()
638 s->data_count = boundary_count + begin; in sdhci_sdma_transfer_multi_blocks()
641 s->data_count = block_size; in sdhci_sdma_transfer_multi_blocks()
644 dma_memory_read(s->dma_as, s->sdmasysad, &s->fifo_buffer[begin], in sdhci_sdma_transfer_multi_blocks()
645 s->data_count - begin, MEMTXATTRS_UNSPECIFIED); in sdhci_sdma_transfer_multi_blocks()
646 s->sdmasysad += s->data_count - begin; in sdhci_sdma_transfer_multi_blocks()
647 if (s->data_count == block_size) { in sdhci_sdma_transfer_multi_blocks()
648 sdbus_write_data(&s->sdbus, s->fifo_buffer, block_size); in sdhci_sdma_transfer_multi_blocks()
649 s->data_count = 0; in sdhci_sdma_transfer_multi_blocks()
650 if (s->trnmod & SDHC_TRNS_BLK_CNT_EN) { in sdhci_sdma_transfer_multi_blocks()
651 s->blkcnt--; in sdhci_sdma_transfer_multi_blocks()
660 if (s->blkcnt == 0) { in sdhci_sdma_transfer_multi_blocks()
661 sdhci_end_transfer(s); in sdhci_sdma_transfer_multi_blocks()
663 if (s->norintstsen & SDHC_NISEN_DMA) { in sdhci_sdma_transfer_multi_blocks()
664 s->norintsts |= SDHC_NIS_DMA; in sdhci_sdma_transfer_multi_blocks()
666 sdhci_update_irq(s); in sdhci_sdma_transfer_multi_blocks()
671 static void sdhci_sdma_transfer_single_block(SDHCIState *s) in sdhci_sdma_transfer_single_block() argument
673 uint32_t datacnt = s->blksize & BLOCK_SIZE_MASK; in sdhci_sdma_transfer_single_block()
675 if (s->trnmod & SDHC_TRNS_READ) { in sdhci_sdma_transfer_single_block()
676 sdbus_read_data(&s->sdbus, s->fifo_buffer, datacnt); in sdhci_sdma_transfer_single_block()
677 dma_memory_write(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt, in sdhci_sdma_transfer_single_block()
680 dma_memory_read(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt, in sdhci_sdma_transfer_single_block()
682 sdbus_write_data(&s->sdbus, s->fifo_buffer, datacnt); in sdhci_sdma_transfer_single_block()
684 s->blkcnt--; in sdhci_sdma_transfer_single_block()
686 sdhci_end_transfer(s); in sdhci_sdma_transfer_single_block()
696 static void get_adma_description(SDHCIState *s, ADMADescr *dscr) in get_adma_description() argument
700 hwaddr entry_addr = (hwaddr)s->admasysaddr; in get_adma_description()
701 switch (SDHC_DMA_TYPE(s->hostctl1)) { in get_adma_description()
703 dma_memory_read(s->dma_as, entry_addr, &adma2, sizeof(adma2), in get_adma_description()
715 dma_memory_read(s->dma_as, entry_addr, &adma1, sizeof(adma1), in get_adma_description()
728 dma_memory_read(s->dma_as, entry_addr, &dscr->attr, 1, in get_adma_description()
730 dma_memory_read(s->dma_as, entry_addr + 2, &dscr->length, 2, in get_adma_description()
733 dma_memory_read(s->dma_as, entry_addr + 4, &dscr->addr, 8, in get_adma_description()
744 static void sdhci_do_adma(SDHCIState *s) in sdhci_do_adma() argument
747 const uint16_t block_size = s->blksize & BLOCK_SIZE_MASK; in sdhci_do_adma()
753 if (s->trnmod & SDHC_TRNS_BLK_CNT_EN && !s->blkcnt) { in sdhci_do_adma()
755 sdhci_end_transfer(s); in sdhci_do_adma()
760 s->admaerr &= ~SDHC_ADMAERR_LENGTH_MISMATCH; in sdhci_do_adma()
762 get_adma_description(s, &dscr); in sdhci_do_adma()
767 s->admaerr &= ~SDHC_ADMAERR_STATE_MASK; in sdhci_do_adma()
768 s->admaerr |= SDHC_ADMAERR_STATE_ST_FDS; in sdhci_do_adma()
771 if (s->errintstsen & SDHC_EISEN_ADMAERR) { in sdhci_do_adma()
772 s->errintsts |= SDHC_EIS_ADMAERR; in sdhci_do_adma()
773 s->norintsts |= SDHC_NIS_ERR; in sdhci_do_adma()
776 sdhci_update_irq(s); in sdhci_do_adma()
784 s->prnsts |= SDHC_DATA_INHIBIT | SDHC_DAT_LINE_ACTIVE; in sdhci_do_adma()
785 if (s->trnmod & SDHC_TRNS_READ) { in sdhci_do_adma()
786 s->prnsts |= SDHC_DOING_READ; in sdhci_do_adma()
788 if (s->data_count == 0) { in sdhci_do_adma()
789 sdbus_read_data(&s->sdbus, s->fifo_buffer, block_size); in sdhci_do_adma()
791 begin = s->data_count; in sdhci_do_adma()
793 s->data_count = length + begin; in sdhci_do_adma()
796 s->data_count = block_size; in sdhci_do_adma()
799 res = dma_memory_write(s->dma_as, dscr.addr, in sdhci_do_adma()
800 &s->fifo_buffer[begin], in sdhci_do_adma()
801 s->data_count - begin, in sdhci_do_adma()
806 dscr.addr += s->data_count - begin; in sdhci_do_adma()
807 if (s->data_count == block_size) { in sdhci_do_adma()
808 s->data_count = 0; in sdhci_do_adma()
809 if (s->trnmod & SDHC_TRNS_BLK_CNT_EN) { in sdhci_do_adma()
810 s->blkcnt--; in sdhci_do_adma()
811 if (s->blkcnt == 0) { in sdhci_do_adma()
818 s->prnsts |= SDHC_DOING_WRITE; in sdhci_do_adma()
820 begin = s->data_count; in sdhci_do_adma()
822 s->data_count = length + begin; in sdhci_do_adma()
825 s->data_count = block_size; in sdhci_do_adma()
828 res = dma_memory_read(s->dma_as, dscr.addr, in sdhci_do_adma()
829 &s->fifo_buffer[begin], in sdhci_do_adma()
830 s->data_count - begin, in sdhci_do_adma()
835 dscr.addr += s->data_count - begin; in sdhci_do_adma()
836 if (s->data_count == block_size) { in sdhci_do_adma()
837 sdbus_write_data(&s->sdbus, s->fifo_buffer, block_size); in sdhci_do_adma()
838 s->data_count = 0; in sdhci_do_adma()
839 if (s->trnmod & SDHC_TRNS_BLK_CNT_EN) { in sdhci_do_adma()
840 s->blkcnt--; in sdhci_do_adma()
841 if (s->blkcnt == 0) { in sdhci_do_adma()
849 if (s->errintstsen & SDHC_EISEN_ADMAERR) { in sdhci_do_adma()
851 s->errintsts |= SDHC_EIS_ADMAERR; in sdhci_do_adma()
852 s->norintsts |= SDHC_NIS_ERR; in sdhci_do_adma()
854 sdhci_update_irq(s); in sdhci_do_adma()
856 s->admasysaddr += dscr.incr; in sdhci_do_adma()
860 s->admasysaddr = dscr.addr; in sdhci_do_adma()
861 trace_sdhci_adma("link", s->admasysaddr); in sdhci_do_adma()
864 s->admasysaddr += dscr.incr; in sdhci_do_adma()
869 trace_sdhci_adma("interrupt", s->admasysaddr); in sdhci_do_adma()
870 if (s->norintstsen & SDHC_NISEN_DMA) { in sdhci_do_adma()
871 s->norintsts |= SDHC_NIS_DMA; in sdhci_do_adma()
874 if (sdhci_update_irq(s) && !(dscr.attr & SDHC_ADMA_ATTR_END)) { in sdhci_do_adma()
881 if (((s->trnmod & SDHC_TRNS_BLK_CNT_EN) && in sdhci_do_adma()
882 (s->blkcnt == 0)) || (dscr.attr & SDHC_ADMA_ATTR_END)) { in sdhci_do_adma()
885 (s->trnmod & SDHC_TRNS_BLK_CNT_EN) && in sdhci_do_adma()
886 s->blkcnt != 0)) { in sdhci_do_adma()
888 s->admaerr |= SDHC_ADMAERR_LENGTH_MISMATCH | in sdhci_do_adma()
890 if (s->errintstsen & SDHC_EISEN_ADMAERR) { in sdhci_do_adma()
892 s->errintsts |= SDHC_EIS_ADMAERR; in sdhci_do_adma()
893 s->norintsts |= SDHC_NIS_ERR; in sdhci_do_adma()
896 sdhci_update_irq(s); in sdhci_do_adma()
898 sdhci_end_transfer(s); in sdhci_do_adma()
905 timer_mod(s->transfer_timer, in sdhci_do_adma()
913 SDHCIState *s = (SDHCIState *)opaque; in sdhci_data_transfer() local
915 if (s->trnmod & SDHC_TRNS_DMA) { in sdhci_data_transfer()
916 switch (SDHC_DMA_TYPE(s->hostctl1)) { in sdhci_data_transfer()
918 if ((s->blkcnt == 1) || !(s->trnmod & SDHC_TRNS_MULTI)) { in sdhci_data_transfer()
919 sdhci_sdma_transfer_single_block(s); in sdhci_data_transfer()
921 sdhci_sdma_transfer_multi_blocks(s); in sdhci_data_transfer()
926 if (!(s->capareg & R_SDHC_CAPAB_ADMA1_MASK)) { in sdhci_data_transfer()
931 sdhci_do_adma(s); in sdhci_data_transfer()
934 if (!(s->capareg & R_SDHC_CAPAB_ADMA2_MASK)) { in sdhci_data_transfer()
939 sdhci_do_adma(s); in sdhci_data_transfer()
942 if (!(s->capareg & R_SDHC_CAPAB_ADMA2_MASK) || in sdhci_data_transfer()
943 !(s->capareg & R_SDHC_CAPAB_BUS64BIT_MASK)) { in sdhci_data_transfer()
948 sdhci_do_adma(s); in sdhci_data_transfer()
955 if ((s->trnmod & SDHC_TRNS_READ) && sdbus_data_ready(&s->sdbus)) { in sdhci_data_transfer()
956 s->prnsts |= SDHC_DOING_READ | SDHC_DATA_INHIBIT | in sdhci_data_transfer()
958 sdhci_read_block_from_card(s); in sdhci_data_transfer()
960 s->prnsts |= SDHC_DOING_WRITE | SDHC_DAT_LINE_ACTIVE | in sdhci_data_transfer()
962 sdhci_write_block_to_card(s); in sdhci_data_transfer()
967 static bool sdhci_can_issue_command(SDHCIState *s) in sdhci_can_issue_command() argument
969 if (!SDHC_CLOCK_IS_ON(s->clkcon) || in sdhci_can_issue_command()
970 (((s->prnsts & SDHC_DATA_INHIBIT) || s->stopped_state) && in sdhci_can_issue_command()
971 ((s->cmdreg & SDHC_CMD_DATA_PRESENT) || in sdhci_can_issue_command()
972 ((s->cmdreg & SDHC_CMD_RESPONSE) == SDHC_CMD_RSP_WITH_BUSY && in sdhci_can_issue_command()
973 !(SDHC_COMMAND_TYPE(s->cmdreg) == SDHC_CMD_ABORT))))) { in sdhci_can_issue_command()
983 sdhci_buff_access_is_sequential(SDHCIState *s, unsigned byte_num) in sdhci_buff_access_is_sequential() argument
985 if ((s->data_count & 0x3) != byte_num) { in sdhci_buff_access_is_sequential()
993 static void sdhci_resume_pending_transfer(SDHCIState *s) in sdhci_resume_pending_transfer() argument
995 timer_del(s->transfer_timer); in sdhci_resume_pending_transfer()
996 sdhci_data_transfer(s); in sdhci_resume_pending_transfer()
1001 SDHCIState *s = (SDHCIState *)opaque; in sdhci_read() local
1004 if (timer_pending(s->transfer_timer)) { in sdhci_read()
1005 sdhci_resume_pending_transfer(s); in sdhci_read()
1010 ret = s->sdmasysad; in sdhci_read()
1013 ret = s->blksize | (s->blkcnt << 16); in sdhci_read()
1016 ret = s->argument; in sdhci_read()
1019 ret = s->trnmod | (s->cmdreg << 16); in sdhci_read()
1022 ret = s->rspreg[((offset & ~0x3) - SDHC_RSPREG0) >> 2]; in sdhci_read()
1025 if (sdhci_buff_access_is_sequential(s, offset - SDHC_BDATA)) { in sdhci_read()
1026 ret = sdhci_read_dataport(s, size); in sdhci_read()
1032 ret = s->prnsts; in sdhci_read()
1034 sdbus_get_dat_lines(&s->sdbus)); in sdhci_read()
1036 sdbus_get_cmd_line(&s->sdbus)); in sdhci_read()
1039 ret = s->hostctl1 | (s->pwrcon << 8) | (s->blkgap << 16) | in sdhci_read()
1040 (s->wakcon << 24); in sdhci_read()
1043 ret = s->clkcon | (s->timeoutcon << 16); in sdhci_read()
1046 ret = s->norintsts | (s->errintsts << 16); in sdhci_read()
1049 ret = s->norintstsen | (s->errintstsen << 16); in sdhci_read()
1052 ret = s->norintsigen | (s->errintsigen << 16); in sdhci_read()
1055 ret = s->acmd12errsts | (s->hostctl2 << 16); in sdhci_read()
1058 ret = (uint32_t)s->capareg; in sdhci_read()
1061 ret = (uint32_t)(s->capareg >> 32); in sdhci_read()
1064 ret = (uint32_t)s->maxcurr; in sdhci_read()
1067 ret = (uint32_t)(s->maxcurr >> 32); in sdhci_read()
1070 ret = s->admaerr; in sdhci_read()
1073 ret = (uint32_t)s->admasysaddr; in sdhci_read()
1076 ret = (uint32_t)(s->admasysaddr >> 32); in sdhci_read()
1079 ret = (s->version << 16) | sdhci_slotint(s); in sdhci_read()
1093 static inline void sdhci_blkgap_write(SDHCIState *s, uint8_t value) in sdhci_blkgap_write() argument
1095 if ((value & SDHC_STOP_AT_GAP_REQ) && (s->blkgap & SDHC_STOP_AT_GAP_REQ)) { in sdhci_blkgap_write()
1098 s->blkgap = value & SDHC_STOP_AT_GAP_REQ; in sdhci_blkgap_write()
1100 if ((value & SDHC_CONTINUE_REQ) && s->stopped_state && in sdhci_blkgap_write()
1101 (s->blkgap & SDHC_STOP_AT_GAP_REQ) == 0) { in sdhci_blkgap_write()
1102 if (s->stopped_state == sdhc_gap_read) { in sdhci_blkgap_write()
1103 s->prnsts |= SDHC_DAT_LINE_ACTIVE | SDHC_DOING_READ; in sdhci_blkgap_write()
1104 sdhci_read_block_from_card(s); in sdhci_blkgap_write()
1106 s->prnsts |= SDHC_DAT_LINE_ACTIVE | SDHC_DOING_WRITE; in sdhci_blkgap_write()
1107 sdhci_write_block_to_card(s); in sdhci_blkgap_write()
1109 s->stopped_state = sdhc_not_stopped; in sdhci_blkgap_write()
1110 } else if (!s->stopped_state && (value & SDHC_STOP_AT_GAP_REQ)) { in sdhci_blkgap_write()
1111 if (s->prnsts & SDHC_DOING_READ) { in sdhci_blkgap_write()
1112 s->stopped_state = sdhc_gap_read; in sdhci_blkgap_write()
1113 } else if (s->prnsts & SDHC_DOING_WRITE) { in sdhci_blkgap_write()
1114 s->stopped_state = sdhc_gap_write; in sdhci_blkgap_write()
1119 static inline void sdhci_reset_write(SDHCIState *s, uint8_t value) in sdhci_reset_write() argument
1123 sdhci_reset(s); in sdhci_reset_write()
1126 s->prnsts &= ~SDHC_CMD_INHIBIT; in sdhci_reset_write()
1127 s->norintsts &= ~SDHC_NIS_CMDCMP; in sdhci_reset_write()
1130 s->data_count = 0; in sdhci_reset_write()
1131 s->prnsts &= ~(SDHC_SPACE_AVAILABLE | SDHC_DATA_AVAILABLE | in sdhci_reset_write()
1134 s->blkgap &= ~(SDHC_STOP_AT_GAP_REQ | SDHC_CONTINUE_REQ); in sdhci_reset_write()
1135 s->stopped_state = sdhc_not_stopped; in sdhci_reset_write()
1136 s->norintsts &= ~(SDHC_NIS_WBUFRDY | SDHC_NIS_RBUFRDY | in sdhci_reset_write()
1145 SDHCIState *s = (SDHCIState *)opaque; in sdhci_write() local
1151 if (timer_pending(s->transfer_timer)) { in sdhci_write()
1152 sdhci_resume_pending_transfer(s); in sdhci_write()
1157 if (!TRANSFERRING_DATA(s->prnsts)) { in sdhci_write()
1158 s->sdmasysad = (s->sdmasysad & mask) | value; in sdhci_write()
1159 MASKED_WRITE(s->sdmasysad, mask, value); in sdhci_write()
1161 if (!(mask & 0xFF000000) && s->blkcnt && in sdhci_write()
1162 (s->blksize & BLOCK_SIZE_MASK) && in sdhci_write()
1163 SDHC_DMA_TYPE(s->hostctl1) == SDHC_CTRL_SDMA) { in sdhci_write()
1164 if (s->trnmod & SDHC_TRNS_MULTI) { in sdhci_write()
1165 sdhci_sdma_transfer_multi_blocks(s); in sdhci_write()
1167 sdhci_sdma_transfer_single_block(s); in sdhci_write()
1173 if (!TRANSFERRING_DATA(s->prnsts)) { in sdhci_write()
1174 uint16_t blksize = s->blksize; in sdhci_write()
1180 MASKED_WRITE(s->blksize, mask, extract32(value, 0, 15)); in sdhci_write()
1181 MASKED_WRITE(s->blkcnt, mask >> 16, value >> 16); in sdhci_write()
1184 if (extract32(s->blksize, 0, 12) > s->buf_maxsz) { in sdhci_write()
1186 "the maximum buffer 0x%x\n", __func__, s->blksize, in sdhci_write()
1187 s->buf_maxsz); in sdhci_write()
1189 s->blksize = deposit32(s->blksize, 0, 12, s->buf_maxsz); in sdhci_write()
1198 if (blksize != s->blksize) { in sdhci_write()
1199 s->data_count = 0; in sdhci_write()
1205 MASKED_WRITE(s->argument, mask, value); in sdhci_write()
1210 if (!(s->capareg & R_SDHC_CAPAB_SDMA_MASK)) { in sdhci_write()
1215 if (s->prnsts & SDHC_DATA_INHIBIT) { in sdhci_write()
1219 MASKED_WRITE(s->trnmod, mask, value & SDHC_TRNMOD_MASK); in sdhci_write()
1220 MASKED_WRITE(s->cmdreg, mask >> 16, value >> 16); in sdhci_write()
1223 if ((mask & 0xFF000000) || !sdhci_can_issue_command(s)) { in sdhci_write()
1227 sdhci_send_command(s); in sdhci_write()
1230 if (sdhci_buff_access_is_sequential(s, offset - SDHC_BDATA)) { in sdhci_write()
1231 sdhci_write_dataport(s, value >> shift, size); in sdhci_write()
1236 sdhci_blkgap_write(s, value >> 16); in sdhci_write()
1238 MASKED_WRITE(s->hostctl1, mask, value); in sdhci_write()
1239 MASKED_WRITE(s->pwrcon, mask >> 8, value >> 8); in sdhci_write()
1240 MASKED_WRITE(s->wakcon, mask >> 24, value >> 24); in sdhci_write()
1241 if (!(s->prnsts & SDHC_CARD_PRESENT) || ((s->pwrcon >> 1) & 0x7) < 5 || in sdhci_write()
1242 !(s->capareg & (1 << (31 - ((s->pwrcon >> 1) & 0x7))))) { in sdhci_write()
1243 s->pwrcon &= ~SDHC_POWER_ON; in sdhci_write()
1248 sdhci_reset_write(s, value >> 24); in sdhci_write()
1250 MASKED_WRITE(s->clkcon, mask, value); in sdhci_write()
1251 MASKED_WRITE(s->timeoutcon, mask >> 16, value >> 16); in sdhci_write()
1252 if (s->clkcon & SDHC_CLOCK_INT_EN) { in sdhci_write()
1253 s->clkcon |= SDHC_CLOCK_INT_STABLE; in sdhci_write()
1255 s->clkcon &= ~SDHC_CLOCK_INT_STABLE; in sdhci_write()
1259 if (s->norintstsen & SDHC_NISEN_CARDINT) { in sdhci_write()
1262 s->norintsts &= mask | ~value; in sdhci_write()
1263 s->errintsts &= (mask >> 16) | ~(value >> 16); in sdhci_write()
1264 if (s->errintsts) { in sdhci_write()
1265 s->norintsts |= SDHC_NIS_ERR; in sdhci_write()
1267 s->norintsts &= ~SDHC_NIS_ERR; in sdhci_write()
1269 sdhci_update_irq(s); in sdhci_write()
1272 MASKED_WRITE(s->norintstsen, mask, value); in sdhci_write()
1273 MASKED_WRITE(s->errintstsen, mask >> 16, value >> 16); in sdhci_write()
1274 s->norintsts &= s->norintstsen; in sdhci_write()
1275 s->errintsts &= s->errintstsen; in sdhci_write()
1276 if (s->errintsts) { in sdhci_write()
1277 s->norintsts |= SDHC_NIS_ERR; in sdhci_write()
1279 s->norintsts &= ~SDHC_NIS_ERR; in sdhci_write()
1283 if ((s->norintstsen & SDHC_NISEN_INSERT) && s->pending_insert_state) { in sdhci_write()
1284 assert(s->pending_insert_quirk); in sdhci_write()
1285 s->norintsts |= SDHC_NIS_INSERT; in sdhci_write()
1286 s->pending_insert_state = false; in sdhci_write()
1288 sdhci_update_irq(s); in sdhci_write()
1291 MASKED_WRITE(s->norintsigen, mask, value); in sdhci_write()
1292 MASKED_WRITE(s->errintsigen, mask >> 16, value >> 16); in sdhci_write()
1293 sdhci_update_irq(s); in sdhci_write()
1296 MASKED_WRITE(s->admaerr, mask, value); in sdhci_write()
1299 s->admasysaddr = (s->admasysaddr & (0xFFFFFFFF00000000ULL | in sdhci_write()
1303 s->admasysaddr = (s->admasysaddr & (0x00000000FFFFFFFFULL | in sdhci_write()
1307 s->acmd12errsts |= value; in sdhci_write()
1308 s->errintsts |= (value >> 16) & s->errintstsen; in sdhci_write()
1309 if (s->acmd12errsts) { in sdhci_write()
1310 s->errintsts |= SDHC_EIS_CMD12ERR; in sdhci_write()
1312 if (s->errintsts) { in sdhci_write()
1313 s->norintsts |= SDHC_NIS_ERR; in sdhci_write()
1315 sdhci_update_irq(s); in sdhci_write()
1318 MASKED_WRITE(s->acmd12errsts, mask, value & UINT16_MAX); in sdhci_write()
1319 if (s->uhs_mode >= UHS_I) { in sdhci_write()
1320 MASKED_WRITE(s->hostctl2, mask >> 16, value >> 16); in sdhci_write()
1322 if (FIELD_EX32(s->hostctl2, SDHC_HOSTCTL2, V18_ENA)) { in sdhci_write()
1323 sdbus_set_voltage(&s->sdbus, SD_VOLTAGE_1_8V); in sdhci_write()
1325 sdbus_set_voltage(&s->sdbus, SD_VOLTAGE_3_3V); in sdhci_write()
1373 static void sdhci_init_readonly_registers(SDHCIState *s, Error **errp) in sdhci_init_readonly_registers() argument
1377 switch (s->sd_spec_version) { in sdhci_init_readonly_registers()
1384 s->version = (SDHC_HCVER_VENDOR << 8) | (s->sd_spec_version - 1); in sdhci_init_readonly_registers()
1386 sdhci_check_capareg(s, errp); in sdhci_init_readonly_registers()
1394 void sdhci_initfn(SDHCIState *s) in sdhci_initfn() argument
1396 qbus_init(&s->sdbus, sizeof(s->sdbus), TYPE_SDHCI_BUS, DEVICE(s), "sd-bus"); in sdhci_initfn()
1398 s->insert_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_raise_insertion_irq, s); in sdhci_initfn()
1399 s->transfer_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_data_transfer, s); in sdhci_initfn()
1401 s->io_ops = &sdhci_mmio_le_ops; in sdhci_initfn()
1404 void sdhci_uninitfn(SDHCIState *s) in sdhci_uninitfn() argument
1406 timer_free(s->insert_timer); in sdhci_uninitfn()
1407 timer_free(s->transfer_timer); in sdhci_uninitfn()
1409 g_free(s->fifo_buffer); in sdhci_uninitfn()
1410 s->fifo_buffer = NULL; in sdhci_uninitfn()
1413 void sdhci_common_realize(SDHCIState *s, Error **errp) in sdhci_common_realize() argument
1417 switch (s->endianness) { in sdhci_common_realize()
1422 if (s->io_ops != &sdhci_mmio_le_ops) { in sdhci_common_realize()
1426 s->io_ops = &sdhci_mmio_be_ops; in sdhci_common_realize()
1433 sdhci_init_readonly_registers(s, errp); in sdhci_common_realize()
1438 s->buf_maxsz = sdhci_get_fifolen(s); in sdhci_common_realize()
1439 s->fifo_buffer = g_malloc0(s->buf_maxsz); in sdhci_common_realize()
1441 memory_region_init_io(&s->iomem, OBJECT(s), s->io_ops, s, "sdhci", in sdhci_common_realize()
1445 void sdhci_common_unrealize(SDHCIState *s) in sdhci_common_unrealize() argument
1452 g_free(s->fifo_buffer); in sdhci_common_unrealize()
1453 s->fifo_buffer = NULL; in sdhci_common_unrealize()
1458 SDHCIState *s = opaque; in sdhci_pending_insert_vmstate_needed() local
1460 return s->pending_insert_state; in sdhci_pending_insert_vmstate_needed()
1537 SDHCIState *s = SYSBUS_SDHCI(obj); in sdhci_sysbus_init() local
1539 sdhci_initfn(s); in sdhci_sysbus_init()
1544 SDHCIState *s = SYSBUS_SDHCI(obj); in sdhci_sysbus_finalize() local
1546 if (s->dma_mr) { in sdhci_sysbus_finalize()
1547 object_unparent(OBJECT(s->dma_mr)); in sdhci_sysbus_finalize()
1550 sdhci_uninitfn(s); in sdhci_sysbus_finalize()
1556 SDHCIState *s = SYSBUS_SDHCI(dev); in sdhci_sysbus_realize() local
1559 sdhci_common_realize(s, errp); in sdhci_sysbus_realize()
1564 if (s->dma_mr) { in sdhci_sysbus_realize()
1565 s->dma_as = &s->sysbus_dma_as; in sdhci_sysbus_realize()
1566 address_space_init(s->dma_as, s->dma_mr, "sdhci-dma"); in sdhci_sysbus_realize()
1569 s->dma_as = &address_space_memory; in sdhci_sysbus_realize()
1572 sysbus_init_irq(sbd, &s->irq); in sdhci_sysbus_realize()
1574 sysbus_init_mmio(sbd, &s->iomem); in sdhci_sysbus_realize()
1579 SDHCIState *s = SYSBUS_SDHCI(dev); in sdhci_sysbus_unrealize() local
1581 sdhci_common_unrealize(s); in sdhci_sysbus_unrealize()
1583 if (s->dma_mr) { in sdhci_sysbus_unrealize()
1584 address_space_destroy(s->dma_as); in sdhci_sysbus_unrealize()
1648 SDHCIState *s = SYSBUS_SDHCI(opaque); in usdhc_read() local
1662 hostctl1 = SDHC_DMA_TYPE(s->hostctl1) << (8 - 3); in usdhc_read()
1664 if (s->hostctl1 & SDHC_CTRL_8BITBUS) { in usdhc_read()
1668 if (s->hostctl1 & SDHC_CTRL_4BITBUS) { in usdhc_read()
1673 ret |= (uint32_t)s->blkgap << 16; in usdhc_read()
1674 ret |= (uint32_t)s->wakcon << 24; in usdhc_read()
1681 if (s->clkcon & SDHC_CLOCK_INT_STABLE) { in usdhc_read()
1687 ret = s->vendor_spec; in usdhc_read()
1705 SDHCIState *s = SYSBUS_SDHCI(opaque); in usdhc_write() local
1718 s->vendor_spec = value; in usdhc_write()
1719 switch (s->vendor) { in usdhc_write()
1722 s->prnsts &= ~SDHC_IMX_CLOCK_GATE_OFF; in usdhc_write()
1724 s->prnsts |= SDHC_IMX_CLOCK_GATE_OFF; in usdhc_write()
1813 value |= (uint16_t)s->pwrcon << 8; in usdhc_write()
1833 s->trnmod = value & UINT16_MAX; in usdhc_write()
1844 sdhci_write(opaque, offset, val | s->trnmod, size); in usdhc_write()
1877 SDHCIState *s = SYSBUS_SDHCI(obj); in imx_usdhc_init() local
1879 s->io_ops = &usdhc_mmio_ops; in imx_usdhc_init()
1880 s->quirks = SDHCI_QUIRK_NO_BUSY_IRQ; in imx_usdhc_init()
1942 SDHCIState *s = SYSBUS_SDHCI(obj); in sdhci_s3c_init() local
1944 s->io_ops = &sdhci_s3c_mmio_ops; in sdhci_s3c_init()