Lines Matching refs:s

247 static void tusb_intr_update(TUSBState *s)  in tusb_intr_update()  argument
249 if (s->control_config & TUSB_INT_CTRL_CONF_INT_POLARITY) in tusb_intr_update()
250 qemu_set_irq(s->irq, s->intr & ~s->mask & s->intr_ok); in tusb_intr_update()
252 qemu_set_irq(s->irq, (!(s->intr & ~s->mask)) & s->intr_ok); in tusb_intr_update()
255 static void tusb_usbip_intr_update(TUSBState *s) in tusb_usbip_intr_update() argument
258 if (s->usbip_intr & 0x0000ffff & ~s->usbip_mask) in tusb_usbip_intr_update()
259 s->intr |= TUSB_INT_SRC_USB_IP_TX; in tusb_usbip_intr_update()
261 s->intr &= ~TUSB_INT_SRC_USB_IP_TX; in tusb_usbip_intr_update()
264 if (s->usbip_intr & 0xffff0000 & ~s->usbip_mask) in tusb_usbip_intr_update()
265 s->intr |= TUSB_INT_SRC_USB_IP_RX; in tusb_usbip_intr_update()
267 s->intr &= ~TUSB_INT_SRC_USB_IP_RX; in tusb_usbip_intr_update()
271 tusb_intr_update(s); in tusb_usbip_intr_update()
274 static void tusb_dma_intr_update(TUSBState *s) in tusb_dma_intr_update() argument
276 if (s->dma_intr & ~s->dma_mask) in tusb_dma_intr_update()
277 s->intr |= TUSB_INT_SRC_TXRX_DMA_DONE; in tusb_dma_intr_update()
279 s->intr &= ~TUSB_INT_SRC_TXRX_DMA_DONE; in tusb_dma_intr_update()
281 tusb_intr_update(s); in tusb_dma_intr_update()
284 static void tusb_gpio_intr_update(TUSBState *s) in tusb_gpio_intr_update() argument
291 TUSBState *s = (TUSBState *) opaque; in tusb_async_readb() local
295 return musb_read[0](s->musb, addr & 0x1ff); in tusb_async_readb()
298 return musb_read[0](s->musb, 0x20 + ((addr >> 3) & 0x3c)); in tusb_async_readb()
308 TUSBState *s = (TUSBState *) opaque; in tusb_async_readh() local
312 return musb_read[1](s->musb, addr & 0x1ff); in tusb_async_readh()
315 return musb_read[1](s->musb, 0x20 + ((addr >> 3) & 0x3c)); in tusb_async_readh()
325 TUSBState *s = (TUSBState *) opaque; in tusb_async_readw() local
332 return s->dev_config; in tusb_async_readw()
335 return musb_read[2](s->musb, offset & 0x1ff); in tusb_async_readw()
338 return musb_read[2](s->musb, 0x20 + ((addr >> 3) & 0x3c)); in tusb_async_readw()
345 ret = s->otg_status; in tusb_async_readw()
347 if (!(s->prcm_mngmt & TUSB_PRCM_MNGMT_OTG_VBUS_DET_EN)) in tusb_async_readw()
352 return s->otg_timer_val; in tusb_async_readw()
357 return s->prcm_config; in tusb_async_readw()
359 return s->prcm_mngmt; in tusb_async_readw()
364 return s->wkup_mask; in tusb_async_readw()
367 return s->pullup[0]; in tusb_async_readw()
369 return s->pullup[1]; in tusb_async_readw()
374 return s->control_config; in tusb_async_readw()
379 return s->usbip_intr; in tusb_async_readw()
381 return s->usbip_mask; in tusb_async_readw()
386 return s->dma_intr; in tusb_async_readw()
388 return s->dma_mask; in tusb_async_readw()
393 return s->gpio_intr; in tusb_async_readw()
395 return s->gpio_mask; in tusb_async_readw()
400 return s->intr; in tusb_async_readw()
402 return s->mask; in tusb_async_readw()
407 return s->gpio_config; in tusb_async_readw()
412 return s->dma_config; in tusb_async_readw()
414 return s->ep0_config; in tusb_async_readw()
417 return s->tx_config[epnum]; in tusb_async_readw()
419 return s->dma_map; in tusb_async_readw()
422 return s->rx_config[epnum]; in tusb_async_readw()
430 return s->scratch; in tusb_async_readw()
433 return s->test_reset; in tusb_async_readw()
449 TUSBState *s = (TUSBState *) opaque; in tusb_async_writeb() local
453 musb_write[0](s->musb, addr & 0x1ff, value); in tusb_async_writeb()
457 musb_write[0](s->musb, 0x20 + ((addr >> 3) & 0x3c), value); in tusb_async_writeb()
470 TUSBState *s = (TUSBState *) opaque; in tusb_async_writeh() local
474 musb_write[1](s->musb, addr & 0x1ff, value); in tusb_async_writeh()
478 musb_write[1](s->musb, 0x20 + ((addr >> 3) & 0x3c), value); in tusb_async_writeh()
491 TUSBState *s = (TUSBState *) opaque; in tusb_async_writew() local
500 musb_write[2](s->musb, offset & 0x1ff, value); in tusb_async_writew()
504 musb_write[2](s->musb, 0x20 + ((addr >> 3) & 0x3c), value); in tusb_async_writew()
508 s->dev_config = value; in tusb_async_writew()
509 s->host_mode = (value & TUSB_DEV_CONF_USB_HOST_MODE); in tusb_async_writew()
518 s->otg_timer_val = value; in tusb_async_writew()
520 timer_mod(s->otg_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + in tusb_async_writew()
524 timer_del(s->otg_timer); in tusb_async_writew()
528 s->prcm_config = value; in tusb_async_writew()
531 s->prcm_mngmt = value; in tusb_async_writew()
536 s->wkup_mask = value; in tusb_async_writew()
540 s->pullup[0] = value; in tusb_async_writew()
543 s->pullup[1] = value; in tusb_async_writew()
546 s->control_config = value; in tusb_async_writew()
547 tusb_intr_update(s); in tusb_async_writew()
551 s->usbip_intr |= value; in tusb_async_writew()
552 tusb_usbip_intr_update(s); in tusb_async_writew()
555 s->usbip_intr &= ~value; in tusb_async_writew()
556 tusb_usbip_intr_update(s); in tusb_async_writew()
557 musb_core_intr_clear(s->musb, ~value); in tusb_async_writew()
560 s->usbip_mask = value; in tusb_async_writew()
561 tusb_usbip_intr_update(s); in tusb_async_writew()
565 s->dma_intr |= value; in tusb_async_writew()
566 tusb_dma_intr_update(s); in tusb_async_writew()
569 s->dma_intr &= ~value; in tusb_async_writew()
570 tusb_dma_intr_update(s); in tusb_async_writew()
573 s->dma_mask = value; in tusb_async_writew()
574 tusb_dma_intr_update(s); in tusb_async_writew()
578 s->gpio_intr |= value; in tusb_async_writew()
579 tusb_gpio_intr_update(s); in tusb_async_writew()
582 s->gpio_intr &= ~value; in tusb_async_writew()
583 tusb_gpio_intr_update(s); in tusb_async_writew()
586 s->gpio_mask = value; in tusb_async_writew()
587 tusb_gpio_intr_update(s); in tusb_async_writew()
591 s->intr |= value; in tusb_async_writew()
592 tusb_intr_update(s); in tusb_async_writew()
595 s->intr &= ~value; in tusb_async_writew()
596 tusb_intr_update(s); in tusb_async_writew()
599 s->mask = value; in tusb_async_writew()
600 tusb_intr_update(s); in tusb_async_writew()
604 s->gpio_config = value; in tusb_async_writew()
607 s->dma_config = value; in tusb_async_writew()
610 s->ep0_config = value & 0x1ff; in tusb_async_writew()
611 musb_set_size(s->musb, 0, TUSB_EP0_CONFIG_XFR_SIZE(value), in tusb_async_writew()
616 s->tx_config[epnum] = value; in tusb_async_writew()
617 musb_set_size(s->musb, epnum + 1, TUSB_EP_CONFIG_XFR_SIZE(value), 1); in tusb_async_writew()
620 s->dma_map = value; in tusb_async_writew()
624 s->rx_config[epnum] = value; in tusb_async_writew()
625 musb_set_size(s->musb, epnum + 1, TUSB_EP_CONFIG_XFR_SIZE(value), 0); in tusb_async_writew()
634 s->scratch = value; in tusb_async_writew()
638 s->test_reset = value; in tusb_async_writew()
689 TUSBState *s = (TUSBState *) opaque; in tusb_otg_tick() local
691 s->otg_timer_val = 0; in tusb_otg_tick()
692 s->intr |= TUSB_INT_SRC_OTG_TIMEOUT; in tusb_otg_tick()
693 tusb_intr_update(s); in tusb_otg_tick()
698 TUSBState *s = (TUSBState *) opaque; in tusb_power_tick() local
700 if (s->power) { in tusb_power_tick()
701 s->intr_ok = ~0; in tusb_power_tick()
702 tusb_intr_update(s); in tusb_power_tick()
708 TUSBState *s = (TUSBState *) opaque; in tusb_musb_core_intr() local
709 uint16_t otg_status = s->otg_status; in tusb_musb_core_intr()
720 if (s->otg_status != otg_status) { in tusb_musb_core_intr()
721 s->otg_status = otg_status; in tusb_musb_core_intr()
722 s->intr |= TUSB_INT_SRC_VBUS_SENSE_CHNG; in tusb_musb_core_intr()
723 tusb_intr_update(s); in tusb_musb_core_intr()
731 s->otg_status |= TUSB_DEV_OTG_STAT_SESS_VALID; in tusb_musb_core_intr()
732 s->otg_status &= ~TUSB_DEV_OTG_STAT_SESS_END; in tusb_musb_core_intr()
734 s->otg_status &= ~TUSB_DEV_OTG_STAT_SESS_VALID; in tusb_musb_core_intr()
735 s->otg_status |= TUSB_DEV_OTG_STAT_SESS_END; in tusb_musb_core_intr()
743 s->usbip_intr = musb_core_intr_get(s->musb); in tusb_musb_core_intr()
747 s->intr |= 1 << source; in tusb_musb_core_intr()
749 s->intr &= ~(1 << source); in tusb_musb_core_intr()
750 tusb_intr_update(s); in tusb_musb_core_intr()
755 static void tusb6010_power(TUSBState *s, int on) in tusb6010_power() argument
758 s->power = 0; in tusb6010_power()
759 } else if (!s->power && on) { in tusb6010_power()
760 s->power = 1; in tusb6010_power()
762 s->intr_ok = 0; in tusb6010_power()
763 tusb_intr_update(s); in tusb6010_power()
764 timer_mod(s->pwr_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + in tusb6010_power()
780 TUSBState *s = TUSB6010(dev); in tusb6010_reset() local
783 s->test_reset = TUSB_PROD_TEST_RESET_VAL; in tusb6010_reset()
784 s->host_mode = 0; in tusb6010_reset()
785 s->dev_config = 0; in tusb6010_reset()
786 s->otg_status = 0; /* !TUSB_DEV_OTG_STAT_ID_STATUS means host mode */ in tusb6010_reset()
787 s->power = 0; in tusb6010_reset()
788 s->mask = 0xffffffff; in tusb6010_reset()
789 s->intr = 0x00000000; in tusb6010_reset()
790 s->otg_timer_val = 0; in tusb6010_reset()
791 s->scratch = 0; in tusb6010_reset()
792 s->prcm_config = 0; in tusb6010_reset()
793 s->prcm_mngmt = 0; in tusb6010_reset()
794 s->intr_ok = 0; in tusb6010_reset()
795 s->usbip_intr = 0; in tusb6010_reset()
796 s->usbip_mask = 0; in tusb6010_reset()
797 s->gpio_intr = 0; in tusb6010_reset()
798 s->gpio_mask = 0; in tusb6010_reset()
799 s->gpio_config = 0; in tusb6010_reset()
800 s->dma_intr = 0; in tusb6010_reset()
801 s->dma_mask = 0; in tusb6010_reset()
802 s->dma_map = 0; in tusb6010_reset()
803 s->dma_config = 0; in tusb6010_reset()
804 s->ep0_config = 0; in tusb6010_reset()
805 s->wkup_mask = 0; in tusb6010_reset()
806 s->pullup[0] = s->pullup[1] = 0; in tusb6010_reset()
807 s->control_config = 0; in tusb6010_reset()
809 s->rx_config[i] = s->tx_config[i] = 0; in tusb6010_reset()
811 musb_reset(s->musb); in tusb6010_reset()
816 TUSBState *s = TUSB6010(dev); in tusb6010_realize() local
819 s->otg_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tusb_otg_tick, s); in tusb6010_realize()
820 s->pwr_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tusb_power_tick, s); in tusb6010_realize()
821 memory_region_init_io(&s->iomem[1], OBJECT(s), &tusb_async_ops, s, in tusb6010_realize()
823 sysbus_init_mmio(sbd, &s->iomem[0]); in tusb6010_realize()
824 sysbus_init_mmio(sbd, &s->iomem[1]); in tusb6010_realize()
825 sysbus_init_irq(sbd, &s->irq); in tusb6010_realize()
827 s->musb = musb_init(dev, 1); in tusb6010_realize()