Lines Matching refs:t

183     uint64_t t;  in cpu_arm_set_rme()  local
185 t = cpu->isar.id_aa64pfr0; in cpu_arm_set_rme()
186 t = FIELD_DP64(t, ID_AA64PFR0, RME, value); in cpu_arm_set_rme()
187 cpu->isar.id_aa64pfr0 = t; in cpu_arm_set_rme()
1086 uint64_t t; in aarch64_max_tcg_initfn() local
1110 t = FIELD_DP64(0, MIDR_EL1, IMPLEMENTER, 0); in aarch64_max_tcg_initfn()
1111 t = FIELD_DP64(t, MIDR_EL1, ARCHITECTURE, 0xf); in aarch64_max_tcg_initfn()
1112 t = FIELD_DP64(t, MIDR_EL1, PARTNUM, 'Q'); in aarch64_max_tcg_initfn()
1113 t = FIELD_DP64(t, MIDR_EL1, VARIANT, 0); in aarch64_max_tcg_initfn()
1114 t = FIELD_DP64(t, MIDR_EL1, REVISION, 0); in aarch64_max_tcg_initfn()
1115 cpu->midr = t; in aarch64_max_tcg_initfn()
1131 t = cpu->ctr; in aarch64_max_tcg_initfn()
1132 t = FIELD_DP64(t, CTR_EL0, IDC, 1); in aarch64_max_tcg_initfn()
1133 t = FIELD_DP64(t, CTR_EL0, DIC, 1); in aarch64_max_tcg_initfn()
1134 cpu->ctr = t; in aarch64_max_tcg_initfn()
1136 t = cpu->isar.id_aa64isar0; in aarch64_max_tcg_initfn()
1137 t = FIELD_DP64(t, ID_AA64ISAR0, AES, 2); /* FEAT_PMULL */ in aarch64_max_tcg_initfn()
1138 t = FIELD_DP64(t, ID_AA64ISAR0, SHA1, 1); /* FEAT_SHA1 */ in aarch64_max_tcg_initfn()
1139 t = FIELD_DP64(t, ID_AA64ISAR0, SHA2, 2); /* FEAT_SHA512 */ in aarch64_max_tcg_initfn()
1140 t = FIELD_DP64(t, ID_AA64ISAR0, CRC32, 1); /* FEAT_CRC32 */ in aarch64_max_tcg_initfn()
1141 t = FIELD_DP64(t, ID_AA64ISAR0, ATOMIC, 2); /* FEAT_LSE */ in aarch64_max_tcg_initfn()
1142 t = FIELD_DP64(t, ID_AA64ISAR0, RDM, 1); /* FEAT_RDM */ in aarch64_max_tcg_initfn()
1143 t = FIELD_DP64(t, ID_AA64ISAR0, SHA3, 1); /* FEAT_SHA3 */ in aarch64_max_tcg_initfn()
1144 t = FIELD_DP64(t, ID_AA64ISAR0, SM3, 1); /* FEAT_SM3 */ in aarch64_max_tcg_initfn()
1145 t = FIELD_DP64(t, ID_AA64ISAR0, SM4, 1); /* FEAT_SM4 */ in aarch64_max_tcg_initfn()
1146 t = FIELD_DP64(t, ID_AA64ISAR0, DP, 1); /* FEAT_DotProd */ in aarch64_max_tcg_initfn()
1147 t = FIELD_DP64(t, ID_AA64ISAR0, FHM, 1); /* FEAT_FHM */ in aarch64_max_tcg_initfn()
1148 t = FIELD_DP64(t, ID_AA64ISAR0, TS, 2); /* FEAT_FlagM2 */ in aarch64_max_tcg_initfn()
1149 t = FIELD_DP64(t, ID_AA64ISAR0, TLB, 2); /* FEAT_TLBIRANGE */ in aarch64_max_tcg_initfn()
1150 t = FIELD_DP64(t, ID_AA64ISAR0, RNDR, 1); /* FEAT_RNG */ in aarch64_max_tcg_initfn()
1151 cpu->isar.id_aa64isar0 = t; in aarch64_max_tcg_initfn()
1153 t = cpu->isar.id_aa64isar1; in aarch64_max_tcg_initfn()
1154 t = FIELD_DP64(t, ID_AA64ISAR1, DPB, 2); /* FEAT_DPB2 */ in aarch64_max_tcg_initfn()
1155 t = FIELD_DP64(t, ID_AA64ISAR1, APA, PauthFeat_FPACCOMBINED); in aarch64_max_tcg_initfn()
1156 t = FIELD_DP64(t, ID_AA64ISAR1, API, 1); in aarch64_max_tcg_initfn()
1157 t = FIELD_DP64(t, ID_AA64ISAR1, JSCVT, 1); /* FEAT_JSCVT */ in aarch64_max_tcg_initfn()
1158 t = FIELD_DP64(t, ID_AA64ISAR1, FCMA, 1); /* FEAT_FCMA */ in aarch64_max_tcg_initfn()
1159 t = FIELD_DP64(t, ID_AA64ISAR1, LRCPC, 2); /* FEAT_LRCPC2 */ in aarch64_max_tcg_initfn()
1160 t = FIELD_DP64(t, ID_AA64ISAR1, FRINTTS, 1); /* FEAT_FRINTTS */ in aarch64_max_tcg_initfn()
1161 t = FIELD_DP64(t, ID_AA64ISAR1, SB, 1); /* FEAT_SB */ in aarch64_max_tcg_initfn()
1162 t = FIELD_DP64(t, ID_AA64ISAR1, SPECRES, 1); /* FEAT_SPECRES */ in aarch64_max_tcg_initfn()
1163 t = FIELD_DP64(t, ID_AA64ISAR1, BF16, 1); /* FEAT_BF16 */ in aarch64_max_tcg_initfn()
1164 t = FIELD_DP64(t, ID_AA64ISAR1, DGH, 1); /* FEAT_DGH */ in aarch64_max_tcg_initfn()
1165 t = FIELD_DP64(t, ID_AA64ISAR1, I8MM, 1); /* FEAT_I8MM */ in aarch64_max_tcg_initfn()
1166 cpu->isar.id_aa64isar1 = t; in aarch64_max_tcg_initfn()
1168 t = cpu->isar.id_aa64isar2; in aarch64_max_tcg_initfn()
1169 t = FIELD_DP64(t, ID_AA64ISAR2, MOPS, 1); /* FEAT_MOPS */ in aarch64_max_tcg_initfn()
1170 t = FIELD_DP64(t, ID_AA64ISAR2, BC, 1); /* FEAT_HBC */ in aarch64_max_tcg_initfn()
1171 cpu->isar.id_aa64isar2 = t; in aarch64_max_tcg_initfn()
1173 t = cpu->isar.id_aa64pfr0; in aarch64_max_tcg_initfn()
1174 t = FIELD_DP64(t, ID_AA64PFR0, FP, 1); /* FEAT_FP16 */ in aarch64_max_tcg_initfn()
1175 t = FIELD_DP64(t, ID_AA64PFR0, ADVSIMD, 1); /* FEAT_FP16 */ in aarch64_max_tcg_initfn()
1176 t = FIELD_DP64(t, ID_AA64PFR0, RAS, 2); /* FEAT_RASv1p1 + FEAT_DoubleFault */ in aarch64_max_tcg_initfn()
1177 t = FIELD_DP64(t, ID_AA64PFR0, SVE, 1); in aarch64_max_tcg_initfn()
1178 t = FIELD_DP64(t, ID_AA64PFR0, SEL2, 1); /* FEAT_SEL2 */ in aarch64_max_tcg_initfn()
1179 t = FIELD_DP64(t, ID_AA64PFR0, DIT, 1); /* FEAT_DIT */ in aarch64_max_tcg_initfn()
1180 t = FIELD_DP64(t, ID_AA64PFR0, CSV2, 3); /* FEAT_CSV2_3 */ in aarch64_max_tcg_initfn()
1181 t = FIELD_DP64(t, ID_AA64PFR0, CSV3, 1); /* FEAT_CSV3 */ in aarch64_max_tcg_initfn()
1182 cpu->isar.id_aa64pfr0 = t; in aarch64_max_tcg_initfn()
1184 t = cpu->isar.id_aa64pfr1; in aarch64_max_tcg_initfn()
1185 t = FIELD_DP64(t, ID_AA64PFR1, BT, 1); /* FEAT_BTI */ in aarch64_max_tcg_initfn()
1186 t = FIELD_DP64(t, ID_AA64PFR1, SSBS, 2); /* FEAT_SSBS2 */ in aarch64_max_tcg_initfn()
1192 t = FIELD_DP64(t, ID_AA64PFR1, MTE, 3); /* FEAT_MTE3 */ in aarch64_max_tcg_initfn()
1193 t = FIELD_DP64(t, ID_AA64PFR1, RAS_FRAC, 0); /* FEAT_RASv1p1 + FEAT_DoubleFault */ in aarch64_max_tcg_initfn()
1194 t = FIELD_DP64(t, ID_AA64PFR1, SME, 1); /* FEAT_SME */ in aarch64_max_tcg_initfn()
1195 t = FIELD_DP64(t, ID_AA64PFR1, CSV2_FRAC, 0); /* FEAT_CSV2_3 */ in aarch64_max_tcg_initfn()
1196 t = FIELD_DP64(t, ID_AA64PFR1, NMI, 1); /* FEAT_NMI */ in aarch64_max_tcg_initfn()
1197 cpu->isar.id_aa64pfr1 = t; in aarch64_max_tcg_initfn()
1199 t = cpu->isar.id_aa64mmfr0; in aarch64_max_tcg_initfn()
1200 t = FIELD_DP64(t, ID_AA64MMFR0, PARANGE, 6); /* FEAT_LPA: 52 bits */ in aarch64_max_tcg_initfn()
1201 t = FIELD_DP64(t, ID_AA64MMFR0, TGRAN16, 1); /* 16k pages supported */ in aarch64_max_tcg_initfn()
1202 t = FIELD_DP64(t, ID_AA64MMFR0, TGRAN16_2, 2); /* 16k stage2 supported */ in aarch64_max_tcg_initfn()
1203 t = FIELD_DP64(t, ID_AA64MMFR0, TGRAN64_2, 2); /* 64k stage2 supported */ in aarch64_max_tcg_initfn()
1204 t = FIELD_DP64(t, ID_AA64MMFR0, TGRAN4_2, 2); /* 4k stage2 supported */ in aarch64_max_tcg_initfn()
1205 t = FIELD_DP64(t, ID_AA64MMFR0, FGT, 1); /* FEAT_FGT */ in aarch64_max_tcg_initfn()
1206 t = FIELD_DP64(t, ID_AA64MMFR0, ECV, 2); /* FEAT_ECV */ in aarch64_max_tcg_initfn()
1207 cpu->isar.id_aa64mmfr0 = t; in aarch64_max_tcg_initfn()
1209 t = cpu->isar.id_aa64mmfr1; in aarch64_max_tcg_initfn()
1210 t = FIELD_DP64(t, ID_AA64MMFR1, HAFDBS, 2); /* FEAT_HAFDBS */ in aarch64_max_tcg_initfn()
1211 t = FIELD_DP64(t, ID_AA64MMFR1, VMIDBITS, 2); /* FEAT_VMID16 */ in aarch64_max_tcg_initfn()
1212 t = FIELD_DP64(t, ID_AA64MMFR1, VH, 1); /* FEAT_VHE */ in aarch64_max_tcg_initfn()
1213 t = FIELD_DP64(t, ID_AA64MMFR1, HPDS, 2); /* FEAT_HPDS2 */ in aarch64_max_tcg_initfn()
1214 t = FIELD_DP64(t, ID_AA64MMFR1, LO, 1); /* FEAT_LOR */ in aarch64_max_tcg_initfn()
1215 t = FIELD_DP64(t, ID_AA64MMFR1, PAN, 3); /* FEAT_PAN3 */ in aarch64_max_tcg_initfn()
1216 t = FIELD_DP64(t, ID_AA64MMFR1, XNX, 1); /* FEAT_XNX */ in aarch64_max_tcg_initfn()
1217 t = FIELD_DP64(t, ID_AA64MMFR1, ETS, 2); /* FEAT_ETS2 */ in aarch64_max_tcg_initfn()
1218 t = FIELD_DP64(t, ID_AA64MMFR1, HCX, 1); /* FEAT_HCX */ in aarch64_max_tcg_initfn()
1219 t = FIELD_DP64(t, ID_AA64MMFR1, TIDCP1, 1); /* FEAT_TIDCP1 */ in aarch64_max_tcg_initfn()
1220 cpu->isar.id_aa64mmfr1 = t; in aarch64_max_tcg_initfn()
1222 t = cpu->isar.id_aa64mmfr2; in aarch64_max_tcg_initfn()
1223 t = FIELD_DP64(t, ID_AA64MMFR2, CNP, 1); /* FEAT_TTCNP */ in aarch64_max_tcg_initfn()
1224 t = FIELD_DP64(t, ID_AA64MMFR2, UAO, 1); /* FEAT_UAO */ in aarch64_max_tcg_initfn()
1225 t = FIELD_DP64(t, ID_AA64MMFR2, IESB, 1); /* FEAT_IESB */ in aarch64_max_tcg_initfn()
1226 t = FIELD_DP64(t, ID_AA64MMFR2, VARANGE, 1); /* FEAT_LVA */ in aarch64_max_tcg_initfn()
1227 t = FIELD_DP64(t, ID_AA64MMFR2, NV, 2); /* FEAT_NV2 */ in aarch64_max_tcg_initfn()
1228 t = FIELD_DP64(t, ID_AA64MMFR2, ST, 1); /* FEAT_TTST */ in aarch64_max_tcg_initfn()
1229 t = FIELD_DP64(t, ID_AA64MMFR2, AT, 1); /* FEAT_LSE2 */ in aarch64_max_tcg_initfn()
1230 t = FIELD_DP64(t, ID_AA64MMFR2, IDS, 1); /* FEAT_IDST */ in aarch64_max_tcg_initfn()
1231 t = FIELD_DP64(t, ID_AA64MMFR2, FWB, 1); /* FEAT_S2FWB */ in aarch64_max_tcg_initfn()
1232 t = FIELD_DP64(t, ID_AA64MMFR2, TTL, 1); /* FEAT_TTL */ in aarch64_max_tcg_initfn()
1233 t = FIELD_DP64(t, ID_AA64MMFR2, BBM, 2); /* FEAT_BBM at level 2 */ in aarch64_max_tcg_initfn()
1234 t = FIELD_DP64(t, ID_AA64MMFR2, EVT, 2); /* FEAT_EVT */ in aarch64_max_tcg_initfn()
1235 t = FIELD_DP64(t, ID_AA64MMFR2, E0PD, 1); /* FEAT_E0PD */ in aarch64_max_tcg_initfn()
1236 cpu->isar.id_aa64mmfr2 = t; in aarch64_max_tcg_initfn()
1238 t = cpu->isar.id_aa64mmfr3; in aarch64_max_tcg_initfn()
1239 t = FIELD_DP64(t, ID_AA64MMFR3, SPEC_FPACC, 1); /* FEAT_FPACC_SPEC */ in aarch64_max_tcg_initfn()
1240 cpu->isar.id_aa64mmfr3 = t; in aarch64_max_tcg_initfn()
1242 t = cpu->isar.id_aa64zfr0; in aarch64_max_tcg_initfn()
1243 t = FIELD_DP64(t, ID_AA64ZFR0, SVEVER, 1); in aarch64_max_tcg_initfn()
1244 t = FIELD_DP64(t, ID_AA64ZFR0, AES, 2); /* FEAT_SVE_PMULL128 */ in aarch64_max_tcg_initfn()
1245 t = FIELD_DP64(t, ID_AA64ZFR0, BITPERM, 1); /* FEAT_SVE_BitPerm */ in aarch64_max_tcg_initfn()
1246 t = FIELD_DP64(t, ID_AA64ZFR0, BFLOAT16, 1); /* FEAT_BF16 */ in aarch64_max_tcg_initfn()
1247 t = FIELD_DP64(t, ID_AA64ZFR0, SHA3, 1); /* FEAT_SVE_SHA3 */ in aarch64_max_tcg_initfn()
1248 t = FIELD_DP64(t, ID_AA64ZFR0, SM4, 1); /* FEAT_SVE_SM4 */ in aarch64_max_tcg_initfn()
1249 t = FIELD_DP64(t, ID_AA64ZFR0, I8MM, 1); /* FEAT_I8MM */ in aarch64_max_tcg_initfn()
1250 t = FIELD_DP64(t, ID_AA64ZFR0, F32MM, 1); /* FEAT_F32MM */ in aarch64_max_tcg_initfn()
1251 t = FIELD_DP64(t, ID_AA64ZFR0, F64MM, 1); /* FEAT_F64MM */ in aarch64_max_tcg_initfn()
1252 cpu->isar.id_aa64zfr0 = t; in aarch64_max_tcg_initfn()
1254 t = cpu->isar.id_aa64dfr0; in aarch64_max_tcg_initfn()
1255 t = FIELD_DP64(t, ID_AA64DFR0, DEBUGVER, 9); /* FEAT_Debugv8p4 */ in aarch64_max_tcg_initfn()
1256 t = FIELD_DP64(t, ID_AA64DFR0, PMUVER, 6); /* FEAT_PMUv3p5 */ in aarch64_max_tcg_initfn()
1257 t = FIELD_DP64(t, ID_AA64DFR0, HPMN0, 1); /* FEAT_HPMN0 */ in aarch64_max_tcg_initfn()
1258 cpu->isar.id_aa64dfr0 = t; in aarch64_max_tcg_initfn()
1260 t = cpu->isar.id_aa64smfr0; in aarch64_max_tcg_initfn()
1261 t = FIELD_DP64(t, ID_AA64SMFR0, F32F32, 1); /* FEAT_SME */ in aarch64_max_tcg_initfn()
1262 t = FIELD_DP64(t, ID_AA64SMFR0, B16F32, 1); /* FEAT_SME */ in aarch64_max_tcg_initfn()
1263 t = FIELD_DP64(t, ID_AA64SMFR0, F16F32, 1); /* FEAT_SME */ in aarch64_max_tcg_initfn()
1264 t = FIELD_DP64(t, ID_AA64SMFR0, I8I32, 0xf); /* FEAT_SME */ in aarch64_max_tcg_initfn()
1265 t = FIELD_DP64(t, ID_AA64SMFR0, F64F64, 1); /* FEAT_SME_F64F64 */ in aarch64_max_tcg_initfn()
1266 t = FIELD_DP64(t, ID_AA64SMFR0, I16I64, 0xf); /* FEAT_SME_I16I64 */ in aarch64_max_tcg_initfn()
1267 t = FIELD_DP64(t, ID_AA64SMFR0, FA64, 1); /* FEAT_SME_FA64 */ in aarch64_max_tcg_initfn()
1268 cpu->isar.id_aa64smfr0 = t; in aarch64_max_tcg_initfn()