67 static TCGv cpu_psw_o, cpu_psw_s, cpu_psw_z, cpu_psw_c;  variable
263         dc->value = cpu_psw_c;  in psw_cond()
267         dc->value = cpu_psw_c;  in psw_cond()
272         tcg_gen_and_i32(dc->temp, dc->temp, cpu_psw_c);  in psw_cond()
951     tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_psw_c, ret, 0);  in rx_neg()
969     tcg_gen_add2_i32(cpu_psw_s, cpu_psw_c, arg1, z, cpu_psw_c, z);  in rx_adc()
970     tcg_gen_add2_i32(cpu_psw_s, cpu_psw_c, cpu_psw_s, cpu_psw_c, arg2, z);  in rx_adc()
1007     tcg_gen_add2_i32(cpu_psw_s, cpu_psw_c, arg1, z, arg2, z);  in rx_add()
1042     tcg_gen_setcond_i32(TCG_COND_GEU, cpu_psw_c, arg1, arg2);  in rx_sub()
1288         tcg_gen_sari_i32(cpu_psw_c, cpu_regs[a->rs2], 32 - a->imm);  in trans_SHLL_irr()
1290         tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_psw_o, cpu_psw_c, 0);  in trans_SHLL_irr()
1291         tcg_gen_setcondi_i32(TCG_COND_EQ, tmp, cpu_psw_c, 0xffffffff);  in trans_SHLL_irr()
1293         tcg_gen_setcondi_i32(TCG_COND_NE, cpu_psw_c, cpu_psw_c, 0);  in trans_SHLL_irr()
1296         tcg_gen_movi_i32(cpu_psw_c, 0);  in trans_SHLL_irr()
1318     tcg_gen_sar_i32(cpu_psw_c, cpu_regs[a->rd], count);  in trans_SHLL_rr()
1320     tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_psw_o, cpu_psw_c, 0);  in trans_SHLL_rr()
1321     tcg_gen_setcondi_i32(TCG_COND_EQ, tmp, cpu_psw_c, 0xffffffff);  in trans_SHLL_rr()
1323     tcg_gen_setcondi_i32(TCG_COND_NE, cpu_psw_c, cpu_psw_c, 0);  in trans_SHLL_rr()
1327     tcg_gen_movi_i32(cpu_psw_c, 0);  in trans_SHLL_rr()
1345         tcg_gen_andi_i32(cpu_psw_c, cpu_regs[rd], 0x00000001);  in shiftr_imm()
1349         tcg_gen_movi_i32(cpu_psw_c, 0);  in shiftr_imm()
1375     tcg_gen_andi_i32(cpu_psw_c, cpu_regs[rd], 0x00000001);  in shiftr_reg()
1380     tcg_gen_movi_i32(cpu_psw_c, 0);  in shiftr_reg()
1425     tcg_gen_or_i32(cpu_regs[a->rd], cpu_regs[a->rd], cpu_psw_c);  in trans_ROLC()
1426     tcg_gen_mov_i32(cpu_psw_c, tmp);  in trans_ROLC()
1439     tcg_gen_shli_i32(cpu_psw_c, cpu_psw_c, 31);  in trans_RORC()
1440     tcg_gen_or_i32(cpu_regs[a->rd], cpu_regs[a->rd], cpu_psw_c);  in trans_RORC()
1441     tcg_gen_mov_i32(cpu_psw_c, tmp);  in trans_RORC()
1458         tcg_gen_andi_i32(cpu_psw_c, cpu_regs[rd], 0x00000001);  in rx_rot()
1466         tcg_gen_shri_i32(cpu_psw_c, cpu_regs[rd], 31);  in rx_rot()
1920     tcg_gen_setcondi_i32(TCG_COND_NE, cpu_psw_c, val, 0);  in rx_btstm()
1921     tcg_gen_mov_i32(cpu_psw_z, cpu_psw_c);  in rx_btstm()
1948     tcg_gen_setcondi_i32(TCG_COND_NE, cpu_psw_c, t0, 0);  in rx_btstr()
1949     tcg_gen_mov_i32(cpu_psw_z, cpu_psw_c);  in rx_btstr()
2052             tcg_gen_movi_i32(cpu_psw_c, val);  in clrsetpsw()