Lines Matching refs:t1

421     TCGv_i64 t1 = tcg_temp_new_i64();  in gen_add64_d()  local
426 tcg_gen_xor_i64(t1, result, r1); in gen_add64_d()
428 tcg_gen_andc_i64(t1, t1, t0); in gen_add64_d()
429 tcg_gen_extrh_i64_i32(cpu_PSW_V, t1); in gen_add64_d()
491 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_madd32_d() local
495 tcg_gen_ext_i32_i64(t1, r1); in gen_madd32_d()
499 tcg_gen_mul_i64(t1, t1, t3); in gen_madd32_d()
500 tcg_gen_add_i64(t1, t2, t1); in gen_madd32_d()
502 tcg_gen_extrl_i64_i32(ret, t1); in gen_madd32_d()
505 tcg_gen_setcondi_i64(TCG_COND_GT, t3, t1, 0x7fffffffLL); in gen_madd32_d()
507 tcg_gen_setcondi_i64(TCG_COND_LT, t2, t1, -0x80000000LL); in gen_madd32_d()
530 TCGv t1 = tcg_temp_new(); in gen_madd64_d() local
535 tcg_gen_muls2_tl(t1, t2, r1, r3); in gen_madd64_d()
537 tcg_gen_add2_tl(t3, t4, r2_low, r2_high, t1, t2); in gen_madd64_d()
540 tcg_gen_xor_tl(t1, r2_high, t2); in gen_madd64_d()
541 tcg_gen_andc_tl(cpu_PSW_V, cpu_PSW_V, t1); in gen_madd64_d()
558 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_maddu64_d() local
562 tcg_gen_extu_i32_i64(t1, r1); in gen_maddu64_d()
566 tcg_gen_mul_i64(t1, t1, t3); in gen_maddu64_d()
567 tcg_gen_add_i64(t2, t2, t1); in gen_maddu64_d()
572 tcg_gen_setcond_i64(TCG_COND_LTU, t2, t2, t1); in gen_maddu64_d()
990 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_madd32_q() local
1000 tcg_gen_ext_i32_i64(t1, arg1); in gen_madd32_q()
1003 tcg_gen_add_i64(t3, t1, t2); in gen_madd32_q()
1006 tcg_gen_setcondi_i64(TCG_COND_GT, t1, t3, 0x7fffffffLL); in gen_madd32_q()
1008 tcg_gen_or_i64(t1, t1, t2); in gen_madd32_q()
1009 tcg_gen_extrl_i64_i32(cpu_PSW_V, t1); in gen_madd32_q()
1073 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_m16add64_q() local
1088 tcg_gen_concat_i32_i64(t1, arg1_low, arg1_high); in gen_m16add64_q()
1089 gen_add64_d(t3, t1, t2); in gen_m16add64_q()
1100 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_m16adds64_q() local
1114 tcg_gen_concat_i32_i64(t1, arg1_low, arg1_high); in gen_m16adds64_q()
1116 gen_helper_add64_ssov(t1, tcg_env, t1, t2); in gen_m16adds64_q()
1117 tcg_gen_extr_i64_i32(rl, rh, t1); in gen_m16adds64_q()
1124 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_madd64_q() local
1130 tcg_gen_concat_i32_i64(t1, arg1_low, arg1_high); in gen_madd64_q()
1138 tcg_gen_add_i64(t4, t1, t2); in gen_madd64_q()
1140 tcg_gen_xor_i64(t3, t4, t1); in gen_madd64_q()
1141 tcg_gen_xor_i64(t2, t1, t2); in gen_madd64_q()
1172 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_madds32_q() local
1176 tcg_gen_ext_i32_i64(t1, arg1); in gen_madds32_q()
1183 gen_helper_madd32_q_add_ssov(ret, tcg_env, t1, t2); in gen_madds32_q()
1201 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_msub32_d() local
1205 tcg_gen_ext_i32_i64(t1, r1); in gen_msub32_d()
1209 tcg_gen_mul_i64(t1, t1, t3); in gen_msub32_d()
1210 tcg_gen_sub_i64(t1, t2, t1); in gen_msub32_d()
1212 tcg_gen_extrl_i64_i32(ret, t1); in gen_msub32_d()
1215 tcg_gen_setcondi_i64(TCG_COND_GT, t3, t1, 0x7fffffffLL); in gen_msub32_d()
1217 tcg_gen_setcondi_i64(TCG_COND_LT, t2, t1, -0x80000000LL); in gen_msub32_d()
1241 TCGv t1 = tcg_temp_new(); in gen_msub64_d() local
1246 tcg_gen_muls2_tl(t1, t2, r1, r3); in gen_msub64_d()
1248 tcg_gen_sub2_tl(t3, t4, r2_low, r2_high, t1, t2); in gen_msub64_d()
1251 tcg_gen_xor_tl(t1, r2_high, t2); in gen_msub64_d()
1252 tcg_gen_and_tl(cpu_PSW_V, cpu_PSW_V, t1); in gen_msub64_d()
1277 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_msubu64_d() local
1281 tcg_gen_extu_i32_i64(t1, r1); in gen_msubu64_d()
1285 tcg_gen_mul_i64(t1, t1, t3); in gen_msubu64_d()
1286 tcg_gen_sub_i64(t3, t2, t1); in gen_msubu64_d()
1289 tcg_gen_setcond_i64(TCG_COND_GTU, t1, t1, t2); in gen_msubu64_d()
1290 tcg_gen_extrl_i64_i32(cpu_PSW_V, t1); in gen_msubu64_d()
1443 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_sub64_d() local
1448 tcg_gen_xor_i64(t1, result, r1); in gen_sub64_d()
1450 tcg_gen_and_i64(t1, t1, t0); in gen_sub64_d()
1451 tcg_gen_extrh_i64_i32(cpu_PSW_V, t1); in gen_sub64_d()
1730 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_msub32_q() local
1740 tcg_gen_ext_i32_i64(t1, arg1); in gen_msub32_q()
1747 tcg_gen_sub_i64(t3, t1, t2); in gen_msub32_q()
1750 tcg_gen_setcondi_i64(TCG_COND_GT, t1, t3, 0x7fffffffLL); in gen_msub32_q()
1752 tcg_gen_or_i64(t1, t1, t2); in gen_msub32_q()
1753 tcg_gen_extrl_i64_i32(cpu_PSW_V, t1); in gen_msub32_q()
1806 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_m16sub64_q() local
1821 tcg_gen_concat_i32_i64(t1, arg1_low, arg1_high); in gen_m16sub64_q()
1822 gen_sub64_d(t3, t1, t2); in gen_m16sub64_q()
1833 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_m16subs64_q() local
1847 tcg_gen_concat_i32_i64(t1, arg1_low, arg1_high); in gen_m16subs64_q()
1849 gen_helper_sub64_ssov(t1, tcg_env, t1, t2); in gen_m16subs64_q()
1850 tcg_gen_extr_i64_i32(rl, rh, t1); in gen_m16subs64_q()
1857 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_msub64_q() local
1863 tcg_gen_concat_i32_i64(t1, arg1_low, arg1_high); in gen_msub64_q()
1871 tcg_gen_sub_i64(t4, t1, t2); in gen_msub64_q()
1873 tcg_gen_xor_i64(t3, t4, t1); in gen_msub64_q()
1874 tcg_gen_xor_i64(t2, t1, t2); in gen_msub64_q()
1905 TCGv_i64 t1 = tcg_temp_new_i64(); in gen_msubs32_q() local
1910 tcg_gen_ext_i32_i64(t1, arg1); in gen_msubs32_q()
1921 gen_helper_msub32_q_sub_ssov(ret, tcg_env, t1, t3); in gen_msubs32_q()