Lines Matching refs:static

28 static xtensa_sysreg_internal sysregs[] = {
108 static xtensa_state_internal states[] = {
266 static unsigned
274 static void
282 static unsigned
290 static void
298 static unsigned
306 static void
314 static unsigned
322 static void
330 static unsigned
339 static void
349 static unsigned
357 static void
365 static unsigned
373 static void
381 static unsigned
389 static void
397 static unsigned
405 static void
413 static unsigned
421 static void
429 static unsigned
438 static void
448 static unsigned
456 static void
464 static unsigned
472 static void
480 static unsigned
488 static void
496 static unsigned
504 static void
512 static unsigned
520 static void
528 static unsigned
536 static void
544 static unsigned
552 static void
560 static unsigned
568 static void
576 static unsigned
584 static void
592 static unsigned
600 static void
608 static unsigned
616 static void
624 static unsigned
632 static void
640 static unsigned
648 static void
656 static unsigned
664 static void
672 static unsigned
681 static void
691 static unsigned
700 static void
710 static unsigned
719 static void
729 static unsigned
737 static void
745 static unsigned
754 static void
764 static unsigned
773 static void
783 static unsigned
792 static void
802 static unsigned
811 static void
821 static unsigned
830 static void
840 static unsigned
849 static void
859 static unsigned
868 static void
878 static unsigned
886 static void
894 static unsigned
902 static void
910 static unsigned
918 static void
926 static unsigned
934 static void
942 static unsigned
951 static void
961 static unsigned
969 static void
977 static unsigned
985 static void
993 static unsigned
1001 static void
1009 static unsigned
1017 static void
1025 static unsigned
1033 static void
1041 static unsigned
1049 static void
1057 static unsigned
1065 static void
1073 static unsigned
1081 static void
1089 static unsigned
1097 static void
1105 static unsigned
1113 static void
1121 static unsigned
1129 static void
1137 static unsigned
1145 static void
1153 static unsigned
1162 static void
1172 static unsigned
1181 static void
1191 static unsigned
1200 static void
1210 static unsigned
1219 static void
1229 static unsigned
1237 static void
1245 static unsigned
1253 static void
1261 static unsigned
1269 static void
1277 static unsigned
1285 static void
1293 static unsigned
1301 static void
1309 static unsigned
1317 static void
1325 static unsigned
1333 static void
1341 static unsigned
1349 static void
1357 static unsigned
1365 static void
1373 static unsigned
1381 static void
1389 static unsigned
1397 static void
1405 static unsigned
1414 static void
1424 static unsigned
1433 static void
1443 static unsigned
1452 static void
1462 static unsigned
1470 static void
1478 static unsigned
1486 static void
1494 static unsigned
1502 static void
1510 static void
1517 static unsigned
1523 static unsigned
1529 static unsigned
1535 static unsigned
1541 static unsigned
1547 static unsigned
1553 static unsigned
1559 static unsigned
1568 static xtensa_funcUnit_internal funcUnits[] = {
1575 static xtensa_regfile_internal regfiles[] = {
1583 static xtensa_interface_internal interfaces[] = {
1591 static const unsigned CONST_TBL_ai4c_0[] = {
1612 static const unsigned CONST_TBL_b4c_0[] = {
1633 static const unsigned CONST_TBL_b4cu_0[] = {
1656 static int
1666 static int
1676 static int
1683 static int
1690 static int
1700 static int
1710 static int
1720 static int
1730 static int
1736 static int
1742 static int
1748 static int
1754 static int
1760 static int
1766 static int
1772 static int
1778 static int
1784 static int
1790 static int
1796 static int
1802 static int
1808 static int
1814 static int
1820 static int
1826 static int
1836 static int
1846 static int
1856 static int
1866 static int
1876 static int
1886 static int
1896 static int
1906 static int
1913 static int
1920 static int
1930 static int
1958 static int
1968 static int
1996 static int
2006 static int
2034 static int
2044 static int
2054 static int
2064 static int
2074 static int
2084 static int
2094 static int
2104 static int
2114 static int
2124 static int
2134 static int
2144 static int
2154 static int
2164 static int
2174 static int
2184 static int
2194 static int
2204 static int
2214 static int
2224 static int
2234 static int
2241 static int
2248 static int
2258 static int
2268 static int
2275 static int
2282 static int
2292 static int
2302 static int
2309 static int
2316 static int
2326 static int
2336 static int
2343 static int
2350 static int
2360 static int
2370 static int
2377 static int
2384 static int
2390 static int
2396 static int
2403 static int
2412 static int
2418 static int
2424 static int
2430 static int
2436 static int
2442 static int
2448 static int
2454 static int
2460 static int
2466 static int
2472 static int
2482 static int
2492 static int
2502 static int
2512 static int
2522 static int
2532 static int
2542 static int
2552 static int
2559 static int
2566 static int
2576 static int
2586 static int
2593 static int
2600 static xtensa_operand_internal operands[] = {
2834 static xtensa_arg_internal Iclass_xt_iclass_rfe_stateArgs[] = {
2840 static xtensa_arg_internal Iclass_xt_iclass_rfde_stateArgs[] = {
2846 static xtensa_arg_internal Iclass_xt_iclass_call12_args[] = {
2851 static xtensa_arg_internal Iclass_xt_iclass_call12_stateArgs[] = {
2855 static xtensa_arg_internal Iclass_xt_iclass_call8_args[] = {
2860 static xtensa_arg_internal Iclass_xt_iclass_call8_stateArgs[] = {
2864 static xtensa_arg_internal Iclass_xt_iclass_call4_args[] = {
2869 static xtensa_arg_internal Iclass_xt_iclass_call4_stateArgs[] = {
2873 static xtensa_arg_internal Iclass_xt_iclass_callx12_args[] = {
2878 static xtensa_arg_internal Iclass_xt_iclass_callx12_stateArgs[] = {
2882 static xtensa_arg_internal Iclass_xt_iclass_callx8_args[] = {
2887 static xtensa_arg_internal Iclass_xt_iclass_callx8_stateArgs[] = {
2891 static xtensa_arg_internal Iclass_xt_iclass_callx4_args[] = {
2896 static xtensa_arg_internal Iclass_xt_iclass_callx4_stateArgs[] = {
2900 static xtensa_arg_internal Iclass_xt_iclass_entry_args[] = {
2906 static xtensa_arg_internal Iclass_xt_iclass_entry_stateArgs[] = {
2914 static xtensa_arg_internal Iclass_xt_iclass_movsp_args[] = {
2919 static xtensa_arg_internal Iclass_xt_iclass_movsp_stateArgs[] = {
2924 static xtensa_arg_internal Iclass_xt_iclass_rotw_args[] = {
2928 static xtensa_arg_internal Iclass_xt_iclass_rotw_stateArgs[] = {
2934 static xtensa_arg_internal Iclass_xt_iclass_retw_args[] = {
2938 static xtensa_arg_internal Iclass_xt_iclass_retw_stateArgs[] = {
2945 static xtensa_arg_internal Iclass_xt_iclass_rfwou_stateArgs[] = {
2954 static xtensa_arg_internal Iclass_xt_iclass_l32e_args[] = {
2960 static xtensa_arg_internal Iclass_xt_iclass_l32e_stateArgs[] = {
2965 static xtensa_arg_internal Iclass_xt_iclass_s32e_args[] = {
2971 static xtensa_arg_internal Iclass_xt_iclass_s32e_stateArgs[] = {
2976 static xtensa_arg_internal Iclass_xt_iclass_rsr_windowbase_args[] = {
2980 static xtensa_arg_internal Iclass_xt_iclass_rsr_windowbase_stateArgs[] = {
2986 static xtensa_arg_internal Iclass_xt_iclass_wsr_windowbase_args[] = {
2990 static xtensa_arg_internal Iclass_xt_iclass_wsr_windowbase_stateArgs[] = {
2996 static xtensa_arg_internal Iclass_xt_iclass_xsr_windowbase_args[] = {
3000 static xtensa_arg_internal Iclass_xt_iclass_xsr_windowbase_stateArgs[] = {
3006 static xtensa_arg_internal Iclass_xt_iclass_rsr_windowstart_args[] = {
3010 static xtensa_arg_internal Iclass_xt_iclass_rsr_windowstart_stateArgs[] = {
3016 static xtensa_arg_internal Iclass_xt_iclass_wsr_windowstart_args[] = {
3020 static xtensa_arg_internal Iclass_xt_iclass_wsr_windowstart_stateArgs[] = {
3026 static xtensa_arg_internal Iclass_xt_iclass_xsr_windowstart_args[] = {
3030 static xtensa_arg_internal Iclass_xt_iclass_xsr_windowstart_stateArgs[] = {
3036 static xtensa_arg_internal Iclass_xt_iclass_add_n_args[] = {
3042 static xtensa_arg_internal Iclass_xt_iclass_addi_n_args[] = {
3048 static xtensa_arg_internal Iclass_xt_iclass_bz6_args[] = {
3053 static xtensa_arg_internal Iclass_xt_iclass_loadi4_args[] = {
3059 static xtensa_arg_internal Iclass_xt_iclass_mov_n_args[] = {
3064 static xtensa_arg_internal Iclass_xt_iclass_movi_n_args[] = {
3069 static xtensa_arg_internal Iclass_xt_iclass_retn_args[] = {
3073 static xtensa_arg_internal Iclass_xt_iclass_storei4_args[] = {
3079 static xtensa_arg_internal Iclass_rur_threadptr_args[] = {
3083 static xtensa_arg_internal Iclass_rur_threadptr_stateArgs[] = {
3087 static xtensa_arg_internal Iclass_wur_threadptr_args[] = {
3091 static xtensa_arg_internal Iclass_wur_threadptr_stateArgs[] = {
3095 static xtensa_arg_internal Iclass_xt_iclass_addi_args[] = {
3101 static xtensa_arg_internal Iclass_xt_iclass_addmi_args[] = {
3107 static xtensa_arg_internal Iclass_xt_iclass_addsub_args[] = {
3113 static xtensa_arg_internal Iclass_xt_iclass_bit_args[] = {
3119 static xtensa_arg_internal Iclass_xt_iclass_bsi8_args[] = {
3125 static xtensa_arg_internal Iclass_xt_iclass_bsi8b_args[] = {
3131 static xtensa_arg_internal Iclass_xt_iclass_bsi8u_args[] = {
3137 static xtensa_arg_internal Iclass_xt_iclass_bst8_args[] = {
3143 static xtensa_arg_internal Iclass_xt_iclass_bsz12_args[] = {
3148 static xtensa_arg_internal Iclass_xt_iclass_call0_args[] = {
3153 static xtensa_arg_internal Iclass_xt_iclass_callx0_args[] = {
3158 static xtensa_arg_internal Iclass_xt_iclass_exti_args[] = {
3165 static xtensa_arg_internal Iclass_xt_iclass_jump_args[] = {
3169 static xtensa_arg_internal Iclass_xt_iclass_jumpx_args[] = {
3173 static xtensa_arg_internal Iclass_xt_iclass_l16ui_args[] = {
3179 static xtensa_arg_internal Iclass_xt_iclass_l16si_args[] = {
3185 static xtensa_arg_internal Iclass_xt_iclass_l32i_args[] = {
3191 static xtensa_arg_internal Iclass_xt_iclass_l32r_args[] = {
3196 static xtensa_arg_internal Iclass_xt_iclass_l32r_stateArgs[] = {
3201 static xtensa_arg_internal Iclass_xt_iclass_l8i_args[] = {
3207 static xtensa_arg_internal Iclass_xt_iclass_loop_args[] = {
3212 static xtensa_arg_internal Iclass_xt_iclass_loop_stateArgs[] = {
3218 static xtensa_arg_internal Iclass_xt_iclass_loopz_args[] = {
3223 static xtensa_arg_internal Iclass_xt_iclass_loopz_stateArgs[] = {
3229 static xtensa_arg_internal Iclass_xt_iclass_movi_args[] = {
3234 static xtensa_arg_internal Iclass_xt_iclass_movz_args[] = {
3240 static xtensa_arg_internal Iclass_xt_iclass_neg_args[] = {
3245 static xtensa_arg_internal Iclass_xt_iclass_return_args[] = {
3249 static xtensa_arg_internal Iclass_xt_iclass_s16i_args[] = {
3255 static xtensa_arg_internal Iclass_xt_iclass_s32i_args[] = {
3261 static xtensa_arg_internal Iclass_xt_iclass_s8i_args[] = {
3267 static xtensa_arg_internal Iclass_xt_iclass_sar_args[] = {
3271 static xtensa_arg_internal Iclass_xt_iclass_sar_stateArgs[] = {
3275 static xtensa_arg_internal Iclass_xt_iclass_sari_args[] = {
3279 static xtensa_arg_internal Iclass_xt_iclass_sari_stateArgs[] = {
3283 static xtensa_arg_internal Iclass_xt_iclass_shifts_args[] = {
3288 static xtensa_arg_internal Iclass_xt_iclass_shifts_stateArgs[] = {
3292 static xtensa_arg_internal Iclass_xt_iclass_shiftst_args[] = {
3298 static xtensa_arg_internal Iclass_xt_iclass_shiftst_stateArgs[] = {
3302 static xtensa_arg_internal Iclass_xt_iclass_shiftt_args[] = {
3307 static xtensa_arg_internal Iclass_xt_iclass_shiftt_stateArgs[] = {
3311 static xtensa_arg_internal Iclass_xt_iclass_slli_args[] = {
3317 static xtensa_arg_internal Iclass_xt_iclass_srai_args[] = {
3323 static xtensa_arg_internal Iclass_xt_iclass_srli_args[] = {
3329 static xtensa_arg_internal Iclass_xt_iclass_sync_stateArgs[] = {
3333 static xtensa_arg_internal Iclass_xt_iclass_rsil_args[] = {
3338 static xtensa_arg_internal Iclass_xt_iclass_rsil_stateArgs[] = {
3348 static xtensa_arg_internal Iclass_xt_iclass_rsr_lend_args[] = {
3352 static xtensa_arg_internal Iclass_xt_iclass_rsr_lend_stateArgs[] = {
3356 static xtensa_arg_internal Iclass_xt_iclass_wsr_lend_args[] = {
3360 static xtensa_arg_internal Iclass_xt_iclass_wsr_lend_stateArgs[] = {
3364 static xtensa_arg_internal Iclass_xt_iclass_xsr_lend_args[] = {
3368 static xtensa_arg_internal Iclass_xt_iclass_xsr_lend_stateArgs[] = {
3372 static xtensa_arg_internal Iclass_xt_iclass_rsr_lcount_args[] = {
3376 static xtensa_arg_internal Iclass_xt_iclass_rsr_lcount_stateArgs[] = {
3380 static xtensa_arg_internal Iclass_xt_iclass_wsr_lcount_args[] = {
3384 static xtensa_arg_internal Iclass_xt_iclass_wsr_lcount_stateArgs[] = {
3389 static xtensa_arg_internal Iclass_xt_iclass_xsr_lcount_args[] = {
3393 static xtensa_arg_internal Iclass_xt_iclass_xsr_lcount_stateArgs[] = {
3398 static xtensa_arg_internal Iclass_xt_iclass_rsr_lbeg_args[] = {
3402 static xtensa_arg_internal Iclass_xt_iclass_rsr_lbeg_stateArgs[] = {
3406 static xtensa_arg_internal Iclass_xt_iclass_wsr_lbeg_args[] = {
3410 static xtensa_arg_internal Iclass_xt_iclass_wsr_lbeg_stateArgs[] = {
3414 static xtensa_arg_internal Iclass_xt_iclass_xsr_lbeg_args[] = {
3418 static xtensa_arg_internal Iclass_xt_iclass_xsr_lbeg_stateArgs[] = {
3422 static xtensa_arg_internal Iclass_xt_iclass_rsr_sar_args[] = {
3426 static xtensa_arg_internal Iclass_xt_iclass_rsr_sar_stateArgs[] = {
3430 static xtensa_arg_internal Iclass_xt_iclass_wsr_sar_args[] = {
3434 static xtensa_arg_internal Iclass_xt_iclass_wsr_sar_stateArgs[] = {
3439 static xtensa_arg_internal Iclass_xt_iclass_xsr_sar_args[] = {
3443 static xtensa_arg_internal Iclass_xt_iclass_xsr_sar_stateArgs[] = {
3447 static xtensa_arg_internal Iclass_xt_iclass_rsr_litbase_args[] = {
3451 static xtensa_arg_internal Iclass_xt_iclass_rsr_litbase_stateArgs[] = {
3456 static xtensa_arg_internal Iclass_xt_iclass_wsr_litbase_args[] = {
3460 static xtensa_arg_internal Iclass_xt_iclass_wsr_litbase_stateArgs[] = {
3465 static xtensa_arg_internal Iclass_xt_iclass_xsr_litbase_args[] = {
3469 static xtensa_arg_internal Iclass_xt_iclass_xsr_litbase_stateArgs[] = {
3474 static xtensa_arg_internal Iclass_xt_iclass_rsr_176_args[] = {
3478 static xtensa_arg_internal Iclass_xt_iclass_rsr_176_stateArgs[] = {
3483 static xtensa_arg_internal Iclass_xt_iclass_rsr_208_args[] = {
3487 static xtensa_arg_internal Iclass_xt_iclass_rsr_208_stateArgs[] = {
3492 static xtensa_arg_internal Iclass_xt_iclass_rsr_ps_args[] = {
3496 static xtensa_arg_internal Iclass_xt_iclass_rsr_ps_stateArgs[] = {
3506 static xtensa_arg_internal Iclass_xt_iclass_wsr_ps_args[] = {
3510 static xtensa_arg_internal Iclass_xt_iclass_wsr_ps_stateArgs[] = {
3520 static xtensa_arg_internal Iclass_xt_iclass_xsr_ps_args[] = {
3524 static xtensa_arg_internal Iclass_xt_iclass_xsr_ps_stateArgs[] = {
3534 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc1_args[] = {
3538 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc1_stateArgs[] = {
3544 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc1_args[] = {
3548 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc1_stateArgs[] = {
3554 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc1_args[] = {
3558 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc1_stateArgs[] = {
3564 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave1_args[] = {
3568 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave1_stateArgs[] = {
3574 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave1_args[] = {
3578 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave1_stateArgs[] = {
3584 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave1_args[] = {
3588 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave1_stateArgs[] = {
3594 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc2_args[] = {
3598 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc2_stateArgs[] = {
3604 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc2_args[] = {
3608 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc2_stateArgs[] = {
3614 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc2_args[] = {
3618 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc2_stateArgs[] = {
3624 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave2_args[] = {
3628 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave2_stateArgs[] = {
3634 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave2_args[] = {
3638 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave2_stateArgs[] = {
3644 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave2_args[] = {
3648 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave2_stateArgs[] = {
3654 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc3_args[] = {
3658 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc3_stateArgs[] = {
3664 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc3_args[] = {
3668 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc3_stateArgs[] = {
3674 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc3_args[] = {
3678 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc3_stateArgs[] = {
3684 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave3_args[] = {
3688 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave3_stateArgs[] = {
3694 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave3_args[] = {
3698 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave3_stateArgs[] = {
3704 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave3_args[] = {
3708 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave3_stateArgs[] = {
3714 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc4_args[] = {
3718 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc4_stateArgs[] = {
3724 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc4_args[] = {
3728 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc4_stateArgs[] = {
3734 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc4_args[] = {
3738 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc4_stateArgs[] = {
3744 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave4_args[] = {
3748 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave4_stateArgs[] = {
3754 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave4_args[] = {
3758 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave4_stateArgs[] = {
3764 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave4_args[] = {
3768 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave4_stateArgs[] = {
3774 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc5_args[] = {
3778 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc5_stateArgs[] = {
3784 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc5_args[] = {
3788 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc5_stateArgs[] = {
3794 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc5_args[] = {
3798 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc5_stateArgs[] = {
3804 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave5_args[] = {
3808 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave5_stateArgs[] = {
3814 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave5_args[] = {
3818 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave5_stateArgs[] = {
3824 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave5_args[] = {
3828 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave5_stateArgs[] = {
3834 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc6_args[] = {
3838 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc6_stateArgs[] = {
3844 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc6_args[] = {
3848 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc6_stateArgs[] = {
3854 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc6_args[] = {
3858 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc6_stateArgs[] = {
3864 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave6_args[] = {
3868 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave6_stateArgs[] = {
3874 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave6_args[] = {
3878 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave6_stateArgs[] = {
3884 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave6_args[] = {
3888 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave6_stateArgs[] = {
3894 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc7_args[] = {
3898 static xtensa_arg_internal Iclass_xt_iclass_rsr_epc7_stateArgs[] = {
3904 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc7_args[] = {
3908 static xtensa_arg_internal Iclass_xt_iclass_wsr_epc7_stateArgs[] = {
3914 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc7_args[] = {
3918 static xtensa_arg_internal Iclass_xt_iclass_xsr_epc7_stateArgs[] = {
3924 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave7_args[] = {
3928 static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave7_stateArgs[] = {
3934 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave7_args[] = {
3938 static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave7_stateArgs[] = {
3944 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave7_args[] = {
3948 static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave7_stateArgs[] = {
3954 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps2_args[] = {
3958 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps2_stateArgs[] = {
3964 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps2_args[] = {
3968 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps2_stateArgs[] = {
3974 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps2_args[] = {
3978 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps2_stateArgs[] = {
3984 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps3_args[] = {
3988 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps3_stateArgs[] = {
3994 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps3_args[] = {
3998 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps3_stateArgs[] = {
4004 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps3_args[] = {
4008 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps3_stateArgs[] = {
4014 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps4_args[] = {
4018 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps4_stateArgs[] = {
4024 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps4_args[] = {
4028 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps4_stateArgs[] = {
4034 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps4_args[] = {
4038 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps4_stateArgs[] = {
4044 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps5_args[] = {
4048 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps5_stateArgs[] = {
4054 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps5_args[] = {
4058 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps5_stateArgs[] = {
4064 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps5_args[] = {
4068 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps5_stateArgs[] = {
4074 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps6_args[] = {
4078 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps6_stateArgs[] = {
4084 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps6_args[] = {
4088 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps6_stateArgs[] = {
4094 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps6_args[] = {
4098 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps6_stateArgs[] = {
4104 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps7_args[] = {
4108 static xtensa_arg_internal Iclass_xt_iclass_rsr_eps7_stateArgs[] = {
4114 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps7_args[] = {
4118 static xtensa_arg_internal Iclass_xt_iclass_wsr_eps7_stateArgs[] = {
4124 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps7_args[] = {
4128 static xtensa_arg_internal Iclass_xt_iclass_xsr_eps7_stateArgs[] = {
4134 static xtensa_arg_internal Iclass_xt_iclass_rsr_excvaddr_args[] = {
4138 static xtensa_arg_internal Iclass_xt_iclass_rsr_excvaddr_stateArgs[] = {
4144 static xtensa_arg_internal Iclass_xt_iclass_wsr_excvaddr_args[] = {
4148 static xtensa_arg_internal Iclass_xt_iclass_wsr_excvaddr_stateArgs[] = {
4154 static xtensa_arg_internal Iclass_xt_iclass_xsr_excvaddr_args[] = {
4158 static xtensa_arg_internal Iclass_xt_iclass_xsr_excvaddr_stateArgs[] = {
4164 static xtensa_arg_internal Iclass_xt_iclass_rsr_depc_args[] = {
4168 static xtensa_arg_internal Iclass_xt_iclass_rsr_depc_stateArgs[] = {
4174 static xtensa_arg_internal Iclass_xt_iclass_wsr_depc_args[] = {
4178 static xtensa_arg_internal Iclass_xt_iclass_wsr_depc_stateArgs[] = {
4184 static xtensa_arg_internal Iclass_xt_iclass_xsr_depc_args[] = {
4188 static xtensa_arg_internal Iclass_xt_iclass_xsr_depc_stateArgs[] = {
4194 static xtensa_arg_internal Iclass_xt_iclass_rsr_exccause_args[] = {
4198 static xtensa_arg_internal Iclass_xt_iclass_rsr_exccause_stateArgs[] = {
4205 static xtensa_arg_internal Iclass_xt_iclass_wsr_exccause_args[] = {
4209 static xtensa_arg_internal Iclass_xt_iclass_wsr_exccause_stateArgs[] = {
4215 static xtensa_arg_internal Iclass_xt_iclass_xsr_exccause_args[] = {
4219 static xtensa_arg_internal Iclass_xt_iclass_xsr_exccause_stateArgs[] = {
4225 static xtensa_arg_internal Iclass_xt_iclass_rsr_misc0_args[] = {
4229 static xtensa_arg_internal Iclass_xt_iclass_rsr_misc0_stateArgs[] = {
4235 static xtensa_arg_internal Iclass_xt_iclass_wsr_misc0_args[] = {
4239 static xtensa_arg_internal Iclass_xt_iclass_wsr_misc0_stateArgs[] = {
4245 static xtensa_arg_internal Iclass_xt_iclass_xsr_misc0_args[] = {
4249 static xtensa_arg_internal Iclass_xt_iclass_xsr_misc0_stateArgs[] = {
4255 static xtensa_arg_internal Iclass_xt_iclass_rsr_misc1_args[] = {
4259 static xtensa_arg_internal Iclass_xt_iclass_rsr_misc1_stateArgs[] = {
4265 static xtensa_arg_internal Iclass_xt_iclass_wsr_misc1_args[] = {
4269 static xtensa_arg_internal Iclass_xt_iclass_wsr_misc1_stateArgs[] = {
4275 static xtensa_arg_internal Iclass_xt_iclass_xsr_misc1_args[] = {
4279 static xtensa_arg_internal Iclass_xt_iclass_xsr_misc1_stateArgs[] = {
4285 static xtensa_arg_internal Iclass_xt_iclass_rsr_prid_args[] = {
4289 static xtensa_arg_internal Iclass_xt_iclass_rsr_prid_stateArgs[] = {
4294 static xtensa_arg_internal Iclass_xt_iclass_rsr_vecbase_args[] = {
4298 static xtensa_arg_internal Iclass_xt_iclass_rsr_vecbase_stateArgs[] = {
4304 static xtensa_arg_internal Iclass_xt_iclass_wsr_vecbase_args[] = {
4308 static xtensa_arg_internal Iclass_xt_iclass_wsr_vecbase_stateArgs[] = {
4314 static xtensa_arg_internal Iclass_xt_iclass_xsr_vecbase_args[] = {
4318 static xtensa_arg_internal Iclass_xt_iclass_xsr_vecbase_stateArgs[] = {
4324 static xtensa_arg_internal Iclass_xt_iclass_mac16_aa_args[] = {
4329 static xtensa_arg_internal Iclass_xt_iclass_mac16_aa_stateArgs[] = {
4333 static xtensa_arg_internal Iclass_xt_iclass_mac16_ad_args[] = {
4338 static xtensa_arg_internal Iclass_xt_iclass_mac16_ad_stateArgs[] = {
4342 static xtensa_arg_internal Iclass_xt_iclass_mac16_da_args[] = {
4347 static xtensa_arg_internal Iclass_xt_iclass_mac16_da_stateArgs[] = {
4351 static xtensa_arg_internal Iclass_xt_iclass_mac16_dd_args[] = {
4356 static xtensa_arg_internal Iclass_xt_iclass_mac16_dd_stateArgs[] = {
4360 static xtensa_arg_internal Iclass_xt_iclass_mac16a_aa_args[] = {
4365 static xtensa_arg_internal Iclass_xt_iclass_mac16a_aa_stateArgs[] = {
4369 static xtensa_arg_internal Iclass_xt_iclass_mac16a_ad_args[] = {
4374 static xtensa_arg_internal Iclass_xt_iclass_mac16a_ad_stateArgs[] = {
4378 static xtensa_arg_internal Iclass_xt_iclass_mac16a_da_args[] = {
4383 static xtensa_arg_internal Iclass_xt_iclass_mac16a_da_stateArgs[] = {
4387 static xtensa_arg_internal Iclass_xt_iclass_mac16a_dd_args[] = {
4392 static xtensa_arg_internal Iclass_xt_iclass_mac16a_dd_stateArgs[] = {
4396 static xtensa_arg_internal Iclass_xt_iclass_mac16al_da_args[] = {
4403 static xtensa_arg_internal Iclass_xt_iclass_mac16al_da_stateArgs[] = {
4407 static xtensa_arg_internal Iclass_xt_iclass_mac16al_dd_args[] = {
4414 static xtensa_arg_internal Iclass_xt_iclass_mac16al_dd_stateArgs[] = {
4418 static xtensa_arg_internal Iclass_xt_iclass_mac16_l_args[] = {
4423 static xtensa_arg_internal Iclass_xt_iclass_mul16_args[] = {
4429 static xtensa_arg_internal Iclass_xt_iclass_rsr_m0_args[] = {
4434 static xtensa_arg_internal Iclass_xt_iclass_wsr_m0_args[] = {
4439 static xtensa_arg_internal Iclass_xt_iclass_xsr_m0_args[] = {
4444 static xtensa_arg_internal Iclass_xt_iclass_rsr_m1_args[] = {
4449 static xtensa_arg_internal Iclass_xt_iclass_wsr_m1_args[] = {
4454 static xtensa_arg_internal Iclass_xt_iclass_xsr_m1_args[] = {
4459 static xtensa_arg_internal Iclass_xt_iclass_rsr_m2_args[] = {
4464 static xtensa_arg_internal Iclass_xt_iclass_wsr_m2_args[] = {
4469 static xtensa_arg_internal Iclass_xt_iclass_xsr_m2_args[] = {
4474 static xtensa_arg_internal Iclass_xt_iclass_rsr_m3_args[] = {
4479 static xtensa_arg_internal Iclass_xt_iclass_wsr_m3_args[] = {
4484 static xtensa_arg_internal Iclass_xt_iclass_xsr_m3_args[] = {
4489 static xtensa_arg_internal Iclass_xt_iclass_rsr_acclo_args[] = {
4493 static xtensa_arg_internal Iclass_xt_iclass_rsr_acclo_stateArgs[] = {
4497 static xtensa_arg_internal Iclass_xt_iclass_wsr_acclo_args[] = {
4501 static xtensa_arg_internal Iclass_xt_iclass_wsr_acclo_stateArgs[] = {
4505 static xtensa_arg_internal Iclass_xt_iclass_xsr_acclo_args[] = {
4509 static xtensa_arg_internal Iclass_xt_iclass_xsr_acclo_stateArgs[] = {
4513 static xtensa_arg_internal Iclass_xt_iclass_rsr_acchi_args[] = {
4517 static xtensa_arg_internal Iclass_xt_iclass_rsr_acchi_stateArgs[] = {
4521 static xtensa_arg_internal Iclass_xt_iclass_wsr_acchi_args[] = {
4525 static xtensa_arg_internal Iclass_xt_iclass_wsr_acchi_stateArgs[] = {
4529 static xtensa_arg_internal Iclass_xt_iclass_xsr_acchi_args[] = {
4533 static xtensa_arg_internal Iclass_xt_iclass_xsr_acchi_stateArgs[] = {
4537 static xtensa_arg_internal Iclass_xt_iclass_rfi_args[] = {
4541 static xtensa_arg_internal Iclass_xt_iclass_rfi_stateArgs[] = {
4565 static xtensa_arg_internal Iclass_xt_iclass_wait_args[] = {
4569 static xtensa_arg_internal Iclass_xt_iclass_wait_stateArgs[] = {
4575 static xtensa_arg_internal Iclass_xt_iclass_rsr_interrupt_args[] = {
4579 static xtensa_arg_internal Iclass_xt_iclass_rsr_interrupt_stateArgs[] = {
4585 static xtensa_arg_internal Iclass_xt_iclass_wsr_intset_args[] = {
4589 static xtensa_arg_internal Iclass_xt_iclass_wsr_intset_stateArgs[] = {
4596 static xtensa_arg_internal Iclass_xt_iclass_wsr_intclear_args[] = {
4600 static xtensa_arg_internal Iclass_xt_iclass_wsr_intclear_stateArgs[] = {
4607 static xtensa_arg_internal Iclass_xt_iclass_rsr_intenable_args[] = {
4611 static xtensa_arg_internal Iclass_xt_iclass_rsr_intenable_stateArgs[] = {
4617 static xtensa_arg_internal Iclass_xt_iclass_wsr_intenable_args[] = {
4621 static xtensa_arg_internal Iclass_xt_iclass_wsr_intenable_stateArgs[] = {
4627 static xtensa_arg_internal Iclass_xt_iclass_xsr_intenable_args[] = {
4631 static xtensa_arg_internal Iclass_xt_iclass_xsr_intenable_stateArgs[] = {
4637 static xtensa_arg_internal Iclass_xt_iclass_break_args[] = {
4642 static xtensa_arg_internal Iclass_xt_iclass_break_stateArgs[] = {
4647 static xtensa_arg_internal Iclass_xt_iclass_break_n_args[] = {
4651 static xtensa_arg_internal Iclass_xt_iclass_break_n_stateArgs[] = {
4656 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreaka0_args[] = {
4660 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreaka0_stateArgs[] = {
4666 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreaka0_args[] = {
4670 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreaka0_stateArgs[] = {
4677 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreaka0_args[] = {
4681 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreaka0_stateArgs[] = {
4688 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreakc0_args[] = {
4692 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreakc0_stateArgs[] = {
4698 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreakc0_args[] = {
4702 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreakc0_stateArgs[] = {
4709 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreakc0_args[] = {
4713 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreakc0_stateArgs[] = {
4720 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreaka1_args[] = {
4724 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreaka1_stateArgs[] = {
4730 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreaka1_args[] = {
4734 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreaka1_stateArgs[] = {
4741 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreaka1_args[] = {
4745 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreaka1_stateArgs[] = {
4752 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreakc1_args[] = {
4756 static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreakc1_stateArgs[] = {
4762 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreakc1_args[] = {
4766 static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreakc1_stateArgs[] = {
4773 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreakc1_args[] = {
4777 static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreakc1_stateArgs[] = {
4784 static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreaka0_args[] = {
4788 static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreaka0_stateArgs[] = {
4794 static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreaka0_args[] = {
4798 static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreaka0_stateArgs[] = {
4804 static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreaka0_args[] = {
4808 static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreaka0_stateArgs[] = {
4814 static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreaka1_args[] = {
4818 static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreaka1_stateArgs[] = {
4824 static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreaka1_args[] = {
4828 static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreaka1_stateArgs[] = {
4834 static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreaka1_args[] = {
4838 static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreaka1_stateArgs[] = {
4844 static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreakenable_args[] = {
4848 static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreakenable_stateArgs[] = {
4854 static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreakenable_args[] = {
4858 static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreakenable_stateArgs[] = {
4864 static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreakenable_args[] = {
4868 static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreakenable_stateArgs[] = {
4874 static xtensa_arg_internal Iclass_xt_iclass_rsr_debugcause_args[] = {
4878 static xtensa_arg_internal Iclass_xt_iclass_rsr_debugcause_stateArgs[] = {
4885 static xtensa_arg_internal Iclass_xt_iclass_wsr_debugcause_args[] = {
4889 static xtensa_arg_internal Iclass_xt_iclass_wsr_debugcause_stateArgs[] = {
4896 static xtensa_arg_internal Iclass_xt_iclass_xsr_debugcause_args[] = {
4900 static xtensa_arg_internal Iclass_xt_iclass_xsr_debugcause_stateArgs[] = {
4907 static xtensa_arg_internal Iclass_xt_iclass_rsr_icount_args[] = {
4911 static xtensa_arg_internal Iclass_xt_iclass_rsr_icount_stateArgs[] = {
4917 static xtensa_arg_internal Iclass_xt_iclass_wsr_icount_args[] = {
4921 static xtensa_arg_internal Iclass_xt_iclass_wsr_icount_stateArgs[] = {
4928 static xtensa_arg_internal Iclass_xt_iclass_xsr_icount_args[] = {
4932 static xtensa_arg_internal Iclass_xt_iclass_xsr_icount_stateArgs[] = {
4939 static xtensa_arg_internal Iclass_xt_iclass_rsr_icountlevel_args[] = {
4943 static xtensa_arg_internal Iclass_xt_iclass_rsr_icountlevel_stateArgs[] = {
4949 static xtensa_arg_internal Iclass_xt_iclass_wsr_icountlevel_args[] = {
4953 static xtensa_arg_internal Iclass_xt_iclass_wsr_icountlevel_stateArgs[] = {
4959 static xtensa_arg_internal Iclass_xt_iclass_xsr_icountlevel_args[] = {
4963 static xtensa_arg_internal Iclass_xt_iclass_xsr_icountlevel_stateArgs[] = {
4969 static xtensa_arg_internal Iclass_xt_iclass_rsr_ddr_args[] = {
4973 static xtensa_arg_internal Iclass_xt_iclass_rsr_ddr_stateArgs[] = {
4979 static xtensa_arg_internal Iclass_xt_iclass_wsr_ddr_args[] = {
4983 static xtensa_arg_internal Iclass_xt_iclass_wsr_ddr_stateArgs[] = {
4990 static xtensa_arg_internal Iclass_xt_iclass_xsr_ddr_args[] = {
4994 static xtensa_arg_internal Iclass_xt_iclass_xsr_ddr_stateArgs[] = {
5001 static xtensa_arg_internal Iclass_xt_iclass_rfdo_args[] = {
5005 static xtensa_arg_internal Iclass_xt_iclass_rfdo_stateArgs[] = {
5018 static xtensa_arg_internal Iclass_xt_iclass_rfdd_stateArgs[] = {
5022 static xtensa_arg_internal Iclass_xt_iclass_wsr_mmid_args[] = {
5026 static xtensa_arg_internal Iclass_xt_iclass_wsr_mmid_stateArgs[] = {
5032 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccount_args[] = {
5036 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccount_stateArgs[] = {
5042 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccount_args[] = {
5046 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccount_stateArgs[] = {
5053 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccount_args[] = {
5057 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccount_stateArgs[] = {
5064 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare0_args[] = {
5068 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare0_stateArgs[] = {
5074 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare0_args[] = {
5078 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare0_stateArgs[] = {
5085 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare0_args[] = {
5089 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare0_stateArgs[] = {
5096 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare1_args[] = {
5100 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare1_stateArgs[] = {
5106 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare1_args[] = {
5110 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare1_stateArgs[] = {
5117 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare1_args[] = {
5121 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare1_stateArgs[] = {
5128 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare2_args[] = {
5132 static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare2_stateArgs[] = {
5138 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare2_args[] = {
5142 static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare2_stateArgs[] = {
5149 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare2_args[] = {
5153 static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare2_stateArgs[] = {
5160 static xtensa_arg_internal Iclass_xt_iclass_icache_args[] = {
5165 static xtensa_arg_internal Iclass_xt_iclass_icache_lock_args[] = {
5170 static xtensa_arg_internal Iclass_xt_iclass_icache_lock_stateArgs[] = {
5175 static xtensa_arg_internal Iclass_xt_iclass_icache_inv_args[] = {
5180 static xtensa_arg_internal Iclass_xt_iclass_icache_inv_stateArgs[] = {
5185 static xtensa_arg_internal Iclass_xt_iclass_licx_args[] = {
5190 static xtensa_arg_internal Iclass_xt_iclass_licx_stateArgs[] = {
5195 static xtensa_arg_internal Iclass_xt_iclass_sicx_args[] = {
5200 static xtensa_arg_internal Iclass_xt_iclass_sicx_stateArgs[] = {
5205 static xtensa_arg_internal Iclass_xt_iclass_dcache_args[] = {
5210 static xtensa_arg_internal Iclass_xt_iclass_dcache_ind_args[] = {
5215 static xtensa_arg_internal Iclass_xt_iclass_dcache_ind_stateArgs[] = {
5220 static xtensa_arg_internal Iclass_xt_iclass_dcache_inv_args[] = {
5225 static xtensa_arg_internal Iclass_xt_iclass_dcache_inv_stateArgs[] = {
5230 static xtensa_arg_internal Iclass_xt_iclass_dpf_args[] = {
5235 static xtensa_arg_internal Iclass_xt_iclass_dcache_lock_args[] = {
5240 static xtensa_arg_internal Iclass_xt_iclass_dcache_lock_stateArgs[] = {
5245 static xtensa_arg_internal Iclass_xt_iclass_sdct_args[] = {
5250 static xtensa_arg_internal Iclass_xt_iclass_sdct_stateArgs[] = {
5255 static xtensa_arg_internal Iclass_xt_iclass_ldct_args[] = {
5260 static xtensa_arg_internal Iclass_xt_iclass_ldct_stateArgs[] = {
5265 static xtensa_arg_internal Iclass_xt_iclass_wsr_ptevaddr_args[] = {
5269 static xtensa_arg_internal Iclass_xt_iclass_wsr_ptevaddr_stateArgs[] = {
5276 static xtensa_arg_internal Iclass_xt_iclass_rsr_ptevaddr_args[] = {
5280 static xtensa_arg_internal Iclass_xt_iclass_rsr_ptevaddr_stateArgs[] = {
5287 static xtensa_arg_internal Iclass_xt_iclass_xsr_ptevaddr_args[] = {
5291 static xtensa_arg_internal Iclass_xt_iclass_xsr_ptevaddr_stateArgs[] = {
5299 static xtensa_arg_internal Iclass_xt_iclass_rsr_rasid_args[] = {
5303 static xtensa_arg_internal Iclass_xt_iclass_rsr_rasid_stateArgs[] = {
5311 static xtensa_arg_internal Iclass_xt_iclass_wsr_rasid_args[] = {
5315 static xtensa_arg_internal Iclass_xt_iclass_wsr_rasid_stateArgs[] = {
5324 static xtensa_arg_internal Iclass_xt_iclass_xsr_rasid_args[] = {
5328 static xtensa_arg_internal Iclass_xt_iclass_xsr_rasid_stateArgs[] = {
5337 static xtensa_arg_internal Iclass_xt_iclass_rsr_itlbcfg_args[] = {
5341 static xtensa_arg_internal Iclass_xt_iclass_rsr_itlbcfg_stateArgs[] = {
5347 static xtensa_arg_internal Iclass_xt_iclass_wsr_itlbcfg_args[] = {
5351 static xtensa_arg_internal Iclass_xt_iclass_wsr_itlbcfg_stateArgs[] = {
5358 static xtensa_arg_internal Iclass_xt_iclass_xsr_itlbcfg_args[] = {
5362 static xtensa_arg_internal Iclass_xt_iclass_xsr_itlbcfg_stateArgs[] = {
5369 static xtensa_arg_internal Iclass_xt_iclass_rsr_dtlbcfg_args[] = {
5373 static xtensa_arg_internal Iclass_xt_iclass_rsr_dtlbcfg_stateArgs[] = {
5379 static xtensa_arg_internal Iclass_xt_iclass_wsr_dtlbcfg_args[] = {
5383 static xtensa_arg_internal Iclass_xt_iclass_wsr_dtlbcfg_stateArgs[] = {
5390 static xtensa_arg_internal Iclass_xt_iclass_xsr_dtlbcfg_args[] = {
5394 static xtensa_arg_internal Iclass_xt_iclass_xsr_dtlbcfg_stateArgs[] = {
5401 static xtensa_arg_internal Iclass_xt_iclass_idtlb_args[] = {
5405 static xtensa_arg_internal Iclass_xt_iclass_idtlb_stateArgs[] = {
5411 static xtensa_arg_internal Iclass_xt_iclass_rdtlb_args[] = {
5416 static xtensa_arg_internal Iclass_xt_iclass_rdtlb_stateArgs[] = {
5421 static xtensa_arg_internal Iclass_xt_iclass_wdtlb_args[] = {
5426 static xtensa_arg_internal Iclass_xt_iclass_wdtlb_stateArgs[] = {
5432 static xtensa_arg_internal Iclass_xt_iclass_iitlb_args[] = {
5436 static xtensa_arg_internal Iclass_xt_iclass_iitlb_stateArgs[] = {
5441 static xtensa_arg_internal Iclass_xt_iclass_ritlb_args[] = {
5446 static xtensa_arg_internal Iclass_xt_iclass_ritlb_stateArgs[] = {
5451 static xtensa_arg_internal Iclass_xt_iclass_witlb_args[] = {
5456 static xtensa_arg_internal Iclass_xt_iclass_witlb_stateArgs[] = {
5461 static xtensa_arg_internal Iclass_xt_iclass_ldpte_stateArgs[] = {
5466 static xtensa_arg_internal Iclass_xt_iclass_hwwitlba_stateArgs[] = {
5470 static xtensa_arg_internal Iclass_xt_iclass_hwwdtlba_stateArgs[] = {
5474 static xtensa_arg_internal Iclass_xt_iclass_rsr_cpenable_args[] = {
5478 static xtensa_arg_internal Iclass_xt_iclass_rsr_cpenable_stateArgs[] = {
5484 static xtensa_arg_internal Iclass_xt_iclass_wsr_cpenable_args[] = {
5488 static xtensa_arg_internal Iclass_xt_iclass_wsr_cpenable_stateArgs[] = {
5494 static xtensa_arg_internal Iclass_xt_iclass_xsr_cpenable_args[] = {
5498 static xtensa_arg_internal Iclass_xt_iclass_xsr_cpenable_stateArgs[] = {
5504 static xtensa_arg_internal Iclass_xt_iclass_clamp_args[] = {
5510 static xtensa_arg_internal Iclass_xt_iclass_minmax_args[] = {
5516 static xtensa_arg_internal Iclass_xt_iclass_nsa_args[] = {
5521 static xtensa_arg_internal Iclass_xt_iclass_sx_args[] = {
5527 static xtensa_arg_internal Iclass_xt_iclass_l32ai_args[] = {
5533 static xtensa_arg_internal Iclass_xt_iclass_s32ri_args[] = {
5539 static xtensa_arg_internal Iclass_xt_iclass_s32c1i_args[] = {
5545 static xtensa_arg_internal Iclass_xt_iclass_s32c1i_stateArgs[] = {
5550 static xtensa_arg_internal Iclass_xt_iclass_rsr_scompare1_args[] = {
5554 static xtensa_arg_internal Iclass_xt_iclass_rsr_scompare1_stateArgs[] = {
5558 static xtensa_arg_internal Iclass_xt_iclass_wsr_scompare1_args[] = {
5562 static xtensa_arg_internal Iclass_xt_iclass_wsr_scompare1_stateArgs[] = {
5566 static xtensa_arg_internal Iclass_xt_iclass_xsr_scompare1_args[] = {
5570 static xtensa_arg_internal Iclass_xt_iclass_xsr_scompare1_stateArgs[] = {
5574 static xtensa_arg_internal Iclass_xt_iclass_div_args[] = {
5580 static xtensa_arg_internal Iclass_xt_mul32_args[] = {
5586 static xtensa_arg_internal Iclass_rur_expstate_args[] = {
5590 static xtensa_arg_internal Iclass_rur_expstate_stateArgs[] = {
5595 static xtensa_arg_internal Iclass_wur_expstate_args[] = {
5599 static xtensa_arg_internal Iclass_wur_expstate_stateArgs[] = {
5604 static xtensa_arg_internal Iclass_iclass_READ_IMPWIRE_args[] = {
5608 static xtensa_arg_internal Iclass_iclass_READ_IMPWIRE_stateArgs[] = {
5612 static xtensa_interface Iclass_iclass_READ_IMPWIRE_intfArgs[] = {
5616 static xtensa_arg_internal Iclass_iclass_SETB_EXPSTATE_args[] = {
5620 static xtensa_arg_internal Iclass_iclass_SETB_EXPSTATE_stateArgs[] = {
5625 static xtensa_arg_internal Iclass_iclass_CLRB_EXPSTATE_args[] = {
5629 static xtensa_arg_internal Iclass_iclass_CLRB_EXPSTATE_stateArgs[] = {
5634 static xtensa_arg_internal Iclass_iclass_WRMSK_EXPSTATE_args[] = {
5639 static xtensa_arg_internal Iclass_iclass_WRMSK_EXPSTATE_stateArgs[] = {
5644 static xtensa_iclass_internal iclasses[] = {
6290 static void
6296 static void
6302 static void
6308 static void
6314 static void
6320 static void
6326 static void
6332 static void
6338 static void
6344 static void
6350 static void
6356 static void
6362 static void
6368 static void
6374 static void
6380 static void
6386 static void
6392 static void
6398 static void
6404 static void
6410 static void
6416 static void
6422 static void
6428 static void
6434 static void
6440 static void
6446 static void
6452 static void
6458 static void
6464 static void
6470 static void
6476 static void
6482 static void
6488 static void
6494 static void
6500 static void
6506 static void
6512 static void
6518 static void
6524 static void
6530 static void
6536 static void
6542 static void
6548 static void
6554 static void
6560 static void
6566 static void
6572 static void
6578 static void
6584 static void
6590 static void
6596 static void
6602 static void
6608 static void
6614 static void
6620 static void
6626 static void
6632 static void
6638 static void
6644 static void
6650 static void
6656 static void
6662 static void
6668 static void
6674 static void
6680 static void
6686 static void
6692 static void
6698 static void
6704 static void
6710 static void
6716 static void
6722 static void
6728 static void
6734 static void
6740 static void
6746 static void
6752 static void
6758 static void
6764 static void
6770 static void
6776 static void
6782 static void
6788 static void
6794 static void
6800 static void
6806 static void
6812 static void
6818 static void
6824 static void
6830 static void
6836 static void
6842 static void
6848 static void
6854 static void
6860 static void
6866 static void
6872 static void
6878 static void
6884 static void
6890 static void
6896 static void
6902 static void
6908 static void
6914 static void
6920 static void
6926 static void
6932 static void
6938 static void
6944 static void
6950 static void
6956 static void
6962 static void
6968 static void
6974 static void
6980 static void
6986 static void
6992 static void
6998 static void
7004 static void
7010 static void
7016 static void
7022 static void
7028 static void
7034 static void
7040 static void
7046 static void
7052 static void
7058 static void
7064 static void
7070 static void
7076 static void
7082 static void
7088 static void
7094 static void
7100 static void
7106 static void
7112 static void
7118 static void
7124 static void
7130 static void
7136 static void
7142 static void
7148 static void
7154 static void
7160 static void
7166 static void
7172 static void
7178 static void
7184 static void
7190 static void
7196 static void
7202 static void
7208 static void
7214 static void
7220 static void
7226 static void
7232 static void
7238 static void
7244 static void
7250 static void
7256 static void
7262 static void
7268 static void
7274 static void
7280 static void
7286 static void
7292 static void
7298 static void
7304 static void
7310 static void
7316 static void
7322 static void
7328 static void
7334 static void
7340 static void
7346 static void
7352 static void
7358 static void
7364 static void
7370 static void
7376 static void
7382 static void
7388 static void
7394 static void
7400 static void
7406 static void
7412 static void
7418 static void
7424 static void
7430 static void
7436 static void
7442 static void
7448 static void
7454 static void
7460 static void
7466 static void
7472 static void
7478 static void
7484 static void
7490 static void
7496 static void
7502 static void
7508 static void
7514 static void
7520 static void
7526 static void
7532 static void
7538 static void
7544 static void
7550 static void
7556 static void
7562 static void
7568 static void
7574 static void
7580 static void
7586 static void
7592 static void
7598 static void
7604 static void
7610 static void
7616 static void
7622 static void
7628 static void
7634 static void
7640 static void
7646 static void
7652 static void
7658 static void
7664 static void
7670 static void
7676 static void
7682 static void
7688 static void
7694 static void
7700 static void
7706 static void
7712 static void
7718 static void
7724 static void
7730 static void
7736 static void
7742 static void
7748 static void
7754 static void
7760 static void
7766 static void
7772 static void
7778 static void
7784 static void
7790 static void
7796 static void
7802 static void
7808 static void
7814 static void
7820 static void
7826 static void
7832 static void
7838 static void
7844 static void
7850 static void
7856 static void
7862 static void
7868 static void
7874 static void
7880 static void
7886 static void
7892 static void
7898 static void
7904 static void
7910 static void
7916 static void
7922 static void
7928 static void
7934 static void
7940 static void
7946 static void
7952 static void
7958 static void
7964 static void
7970 static void
7976 static void
7982 static void
7988 static void
7994 static void
8000 static void
8006 static void
8012 static void
8018 static void
8024 static void
8030 static void
8036 static void
8042 static void
8048 static void
8054 static void
8060 static void
8066 static void
8072 static void
8078 static void
8084 static void
8090 static void
8096 static void
8102 static void
8108 static void
8114 static void
8120 static void
8126 static void
8132 static void
8138 static void
8144 static void
8150 static void
8156 static void
8162 static void
8168 static void
8174 static void
8180 static void
8186 static void
8192 static void
8198 static void
8204 static void
8210 static void
8216 static void
8222 static void
8228 static void
8234 static void
8240 static void
8246 static void
8252 static void
8258 static void
8264 static void
8270 static void
8276 static void
8282 static void
8288 static void
8294 static void
8300 static void
8306 static void
8312 static void
8318 static void
8324 static void
8330 static void
8336 static void
8342 static void
8348 static void
8354 static void
8360 static void
8366 static void
8372 static void
8378 static void
8384 static void
8390 static void
8396 static void
8402 static void
8408 static void
8414 static void
8420 static void
8426 static void
8432 static void
8438 static void
8444 static void
8450 static void
8456 static void
8462 static void
8468 static void
8474 static void
8480 static void
8486 static void
8492 static void
8498 static void
8504 static void
8510 static void
8516 static void
8522 static void
8528 static void
8534 static void
8540 static void
8546 static void
8552 static void
8558 static void
8564 static void
8570 static void
8576 static void
8582 static void
8588 static void
8594 static void
8600 static void
8606 static void
8612 static void
8618 static void
8624 static void
8630 static void
8636 static void
8642 static void
8648 static void
8654 static void
8660 static void
8666 static void
8672 static void
8678 static void
8684 static void
8690 static void
8696 static void
8702 static void
8708 static void
8714 static void
8720 static void
8726 static void
8732 static void
8738 static void
8744 static void
8750 static void
8756 static void
8762 static void
8768 static void
8774 static void
8780 static void
8786 static void
8792 static void
8798 static void
8804 static void
8810 static void
8816 static void
8822 static void
8828 static void
8834 static void
8840 static void
8846 static void
8852 static void
8858 static void
8864 static void
8870 static void
8876 static void
8882 static void
8888 static void
8894 static void
8900 static void
8906 static void
8912 static void
8918 static void
8924 static void
8930 static void
8936 static void
8942 static void
8948 static void
8954 static void
8960 static void
8966 static xtensa_opcode_encode_fn Opcode_excw_encode_fns[] = {
8970 static xtensa_opcode_encode_fn Opcode_rfe_encode_fns[] = {
8974 static xtensa_opcode_encode_fn Opcode_rfde_encode_fns[] = {
8978 static xtensa_opcode_encode_fn Opcode_syscall_encode_fns[] = {
8982 static xtensa_opcode_encode_fn Opcode_simcall_encode_fns[] = {
8986 static xtensa_opcode_encode_fn Opcode_call12_encode_fns[] = {
8990 static xtensa_opcode_encode_fn Opcode_call8_encode_fns[] = {
8994 static xtensa_opcode_encode_fn Opcode_call4_encode_fns[] = {
8998 static xtensa_opcode_encode_fn Opcode_callx12_encode_fns[] = {
9002 static xtensa_opcode_encode_fn Opcode_callx8_encode_fns[] = {
9006 static xtensa_opcode_encode_fn Opcode_callx4_encode_fns[] = {
9010 static xtensa_opcode_encode_fn Opcode_entry_encode_fns[] = {
9014 static xtensa_opcode_encode_fn Opcode_movsp_encode_fns[] = {
9018 static xtensa_opcode_encode_fn Opcode_rotw_encode_fns[] = {
9022 static xtensa_opcode_encode_fn Opcode_retw_encode_fns[] = {
9026 static xtensa_opcode_encode_fn Opcode_retw_n_encode_fns[] = {
9030 static xtensa_opcode_encode_fn Opcode_rfwo_encode_fns[] = {
9034 static xtensa_opcode_encode_fn Opcode_rfwu_encode_fns[] = {
9038 static xtensa_opcode_encode_fn Opcode_l32e_encode_fns[] = {
9042 static xtensa_opcode_encode_fn Opcode_s32e_encode_fns[] = {
9046 static xtensa_opcode_encode_fn Opcode_rsr_windowbase_encode_fns[] = {
9050 static xtensa_opcode_encode_fn Opcode_wsr_windowbase_encode_fns[] = {
9054 static xtensa_opcode_encode_fn Opcode_xsr_windowbase_encode_fns[] = {
9058 static xtensa_opcode_encode_fn Opcode_rsr_windowstart_encode_fns[] = {
9062 static xtensa_opcode_encode_fn Opcode_wsr_windowstart_encode_fns[] = {
9066 static xtensa_opcode_encode_fn Opcode_xsr_windowstart_encode_fns[] = {
9070 static xtensa_opcode_encode_fn Opcode_add_n_encode_fns[] = {
9074 static xtensa_opcode_encode_fn Opcode_addi_n_encode_fns[] = {
9078 static xtensa_opcode_encode_fn Opcode_beqz_n_encode_fns[] = {
9082 static xtensa_opcode_encode_fn Opcode_bnez_n_encode_fns[] = {
9086 static xtensa_opcode_encode_fn Opcode_ill_n_encode_fns[] = {
9090 static xtensa_opcode_encode_fn Opcode_l32i_n_encode_fns[] = {
9094 static xtensa_opcode_encode_fn Opcode_mov_n_encode_fns[] = {
9098 static xtensa_opcode_encode_fn Opcode_movi_n_encode_fns[] = {
9102 static xtensa_opcode_encode_fn Opcode_nop_n_encode_fns[] = {
9106 static xtensa_opcode_encode_fn Opcode_ret_n_encode_fns[] = {
9110 static xtensa_opcode_encode_fn Opcode_s32i_n_encode_fns[] = {
9114 static xtensa_opcode_encode_fn Opcode_rur_threadptr_encode_fns[] = {
9118 static xtensa_opcode_encode_fn Opcode_wur_threadptr_encode_fns[] = {
9122 static xtensa_opcode_encode_fn Opcode_addi_encode_fns[] = {
9126 static xtensa_opcode_encode_fn Opcode_addmi_encode_fns[] = {
9130 static xtensa_opcode_encode_fn Opcode_add_encode_fns[] = {
9134 static xtensa_opcode_encode_fn Opcode_sub_encode_fns[] = {
9138 static xtensa_opcode_encode_fn Opcode_addx2_encode_fns[] = {
9142 static xtensa_opcode_encode_fn Opcode_addx4_encode_fns[] = {
9146 static xtensa_opcode_encode_fn Opcode_addx8_encode_fns[] = {
9150 static xtensa_opcode_encode_fn Opcode_subx2_encode_fns[] = {
9154 static xtensa_opcode_encode_fn Opcode_subx4_encode_fns[] = {
9158 static xtensa_opcode_encode_fn Opcode_subx8_encode_fns[] = {
9162 static xtensa_opcode_encode_fn Opcode_and_encode_fns[] = {
9166 static xtensa_opcode_encode_fn Opcode_or_encode_fns[] = {
9170 static xtensa_opcode_encode_fn Opcode_xor_encode_fns[] = {
9174 static xtensa_opcode_encode_fn Opcode_beqi_encode_fns[] = {
9178 static xtensa_opcode_encode_fn Opcode_bnei_encode_fns[] = {
9182 static xtensa_opcode_encode_fn Opcode_bgei_encode_fns[] = {
9186 static xtensa_opcode_encode_fn Opcode_blti_encode_fns[] = {
9190 static xtensa_opcode_encode_fn Opcode_bbci_encode_fns[] = {
9194 static xtensa_opcode_encode_fn Opcode_bbsi_encode_fns[] = {
9198 static xtensa_opcode_encode_fn Opcode_bgeui_encode_fns[] = {
9202 static xtensa_opcode_encode_fn Opcode_bltui_encode_fns[] = {
9206 static xtensa_opcode_encode_fn Opcode_beq_encode_fns[] = {
9210 static xtensa_opcode_encode_fn Opcode_bne_encode_fns[] = {
9214 static xtensa_opcode_encode_fn Opcode_bge_encode_fns[] = {
9218 static xtensa_opcode_encode_fn Opcode_blt_encode_fns[] = {
9222 static xtensa_opcode_encode_fn Opcode_bgeu_encode_fns[] = {
9226 static xtensa_opcode_encode_fn Opcode_bltu_encode_fns[] = {
9230 static xtensa_opcode_encode_fn Opcode_bany_encode_fns[] = {
9234 static xtensa_opcode_encode_fn Opcode_bnone_encode_fns[] = {
9238 static xtensa_opcode_encode_fn Opcode_ball_encode_fns[] = {
9242 static xtensa_opcode_encode_fn Opcode_bnall_encode_fns[] = {
9246 static xtensa_opcode_encode_fn Opcode_bbc_encode_fns[] = {
9250 static xtensa_opcode_encode_fn Opcode_bbs_encode_fns[] = {
9254 static xtensa_opcode_encode_fn Opcode_beqz_encode_fns[] = {
9258 static xtensa_opcode_encode_fn Opcode_bnez_encode_fns[] = {
9262 static xtensa_opcode_encode_fn Opcode_bgez_encode_fns[] = {
9266 static xtensa_opcode_encode_fn Opcode_bltz_encode_fns[] = {
9270 static xtensa_opcode_encode_fn Opcode_call0_encode_fns[] = {
9274 static xtensa_opcode_encode_fn Opcode_callx0_encode_fns[] = {
9278 static xtensa_opcode_encode_fn Opcode_extui_encode_fns[] = {
9282 static xtensa_opcode_encode_fn Opcode_ill_encode_fns[] = {
9286 static xtensa_opcode_encode_fn Opcode_j_encode_fns[] = {
9290 static xtensa_opcode_encode_fn Opcode_jx_encode_fns[] = {
9294 static xtensa_opcode_encode_fn Opcode_l16ui_encode_fns[] = {
9298 static xtensa_opcode_encode_fn Opcode_l16si_encode_fns[] = {
9302 static xtensa_opcode_encode_fn Opcode_l32i_encode_fns[] = {
9306 static xtensa_opcode_encode_fn Opcode_l32r_encode_fns[] = {
9310 static xtensa_opcode_encode_fn Opcode_l8ui_encode_fns[] = {
9314 static xtensa_opcode_encode_fn Opcode_loop_encode_fns[] = {
9318 static xtensa_opcode_encode_fn Opcode_loopnez_encode_fns[] = {
9322 static xtensa_opcode_encode_fn Opcode_loopgtz_encode_fns[] = {
9326 static xtensa_opcode_encode_fn Opcode_movi_encode_fns[] = {
9330 static xtensa_opcode_encode_fn Opcode_moveqz_encode_fns[] = {
9334 static xtensa_opcode_encode_fn Opcode_movnez_encode_fns[] = {
9338 static xtensa_opcode_encode_fn Opcode_movltz_encode_fns[] = {
9342 static xtensa_opcode_encode_fn Opcode_movgez_encode_fns[] = {
9346 static xtensa_opcode_encode_fn Opcode_neg_encode_fns[] = {
9350 static xtensa_opcode_encode_fn Opcode_abs_encode_fns[] = {
9354 static xtensa_opcode_encode_fn Opcode_nop_encode_fns[] = {
9358 static xtensa_opcode_encode_fn Opcode_ret_encode_fns[] = {
9362 static xtensa_opcode_encode_fn Opcode_s16i_encode_fns[] = {
9366 static xtensa_opcode_encode_fn Opcode_s32i_encode_fns[] = {
9370 static xtensa_opcode_encode_fn Opcode_s8i_encode_fns[] = {
9374 static xtensa_opcode_encode_fn Opcode_ssr_encode_fns[] = {
9378 static xtensa_opcode_encode_fn Opcode_ssl_encode_fns[] = {
9382 static xtensa_opcode_encode_fn Opcode_ssa8l_encode_fns[] = {
9386 static xtensa_opcode_encode_fn Opcode_ssa8b_encode_fns[] = {
9390 static xtensa_opcode_encode_fn Opcode_ssai_encode_fns[] = {
9394 static xtensa_opcode_encode_fn Opcode_sll_encode_fns[] = {
9398 static xtensa_opcode_encode_fn Opcode_src_encode_fns[] = {
9402 static xtensa_opcode_encode_fn Opcode_srl_encode_fns[] = {
9406 static xtensa_opcode_encode_fn Opcode_sra_encode_fns[] = {
9410 static xtensa_opcode_encode_fn Opcode_slli_encode_fns[] = {
9414 static xtensa_opcode_encode_fn Opcode_srai_encode_fns[] = {
9418 static xtensa_opcode_encode_fn Opcode_srli_encode_fns[] = {
9422 static xtensa_opcode_encode_fn Opcode_memw_encode_fns[] = {
9426 static xtensa_opcode_encode_fn Opcode_extw_encode_fns[] = {
9430 static xtensa_opcode_encode_fn Opcode_isync_encode_fns[] = {
9434 static xtensa_opcode_encode_fn Opcode_rsync_encode_fns[] = {
9438 static xtensa_opcode_encode_fn Opcode_esync_encode_fns[] = {
9442 static xtensa_opcode_encode_fn Opcode_dsync_encode_fns[] = {
9446 static xtensa_opcode_encode_fn Opcode_rsil_encode_fns[] = {
9450 static xtensa_opcode_encode_fn Opcode_rsr_lend_encode_fns[] = {
9454 static xtensa_opcode_encode_fn Opcode_wsr_lend_encode_fns[] = {
9458 static xtensa_opcode_encode_fn Opcode_xsr_lend_encode_fns[] = {
9462 static xtensa_opcode_encode_fn Opcode_rsr_lcount_encode_fns[] = {
9466 static xtensa_opcode_encode_fn Opcode_wsr_lcount_encode_fns[] = {
9470 static xtensa_opcode_encode_fn Opcode_xsr_lcount_encode_fns[] = {
9474 static xtensa_opcode_encode_fn Opcode_rsr_lbeg_encode_fns[] = {
9478 static xtensa_opcode_encode_fn Opcode_wsr_lbeg_encode_fns[] = {
9482 static xtensa_opcode_encode_fn Opcode_xsr_lbeg_encode_fns[] = {
9486 static xtensa_opcode_encode_fn Opcode_rsr_sar_encode_fns[] = {
9490 static xtensa_opcode_encode_fn Opcode_wsr_sar_encode_fns[] = {
9494 static xtensa_opcode_encode_fn Opcode_xsr_sar_encode_fns[] = {
9498 static xtensa_opcode_encode_fn Opcode_rsr_litbase_encode_fns[] = {
9502 static xtensa_opcode_encode_fn Opcode_wsr_litbase_encode_fns[] = {
9506 static xtensa_opcode_encode_fn Opcode_xsr_litbase_encode_fns[] = {
9510 static xtensa_opcode_encode_fn Opcode_rsr_176_encode_fns[] = {
9514 static xtensa_opcode_encode_fn Opcode_rsr_208_encode_fns[] = {
9518 static xtensa_opcode_encode_fn Opcode_rsr_ps_encode_fns[] = {
9522 static xtensa_opcode_encode_fn Opcode_wsr_ps_encode_fns[] = {
9526 static xtensa_opcode_encode_fn Opcode_xsr_ps_encode_fns[] = {
9530 static xtensa_opcode_encode_fn Opcode_rsr_epc1_encode_fns[] = {
9534 static xtensa_opcode_encode_fn Opcode_wsr_epc1_encode_fns[] = {
9538 static xtensa_opcode_encode_fn Opcode_xsr_epc1_encode_fns[] = {
9542 static xtensa_opcode_encode_fn Opcode_rsr_excsave1_encode_fns[] = {
9546 static xtensa_opcode_encode_fn Opcode_wsr_excsave1_encode_fns[] = {
9550 static xtensa_opcode_encode_fn Opcode_xsr_excsave1_encode_fns[] = {
9554 static xtensa_opcode_encode_fn Opcode_rsr_epc2_encode_fns[] = {
9558 static xtensa_opcode_encode_fn Opcode_wsr_epc2_encode_fns[] = {
9562 static xtensa_opcode_encode_fn Opcode_xsr_epc2_encode_fns[] = {
9566 static xtensa_opcode_encode_fn Opcode_rsr_excsave2_encode_fns[] = {
9570 static xtensa_opcode_encode_fn Opcode_wsr_excsave2_encode_fns[] = {
9574 static xtensa_opcode_encode_fn Opcode_xsr_excsave2_encode_fns[] = {
9578 static xtensa_opcode_encode_fn Opcode_rsr_epc3_encode_fns[] = {
9582 static xtensa_opcode_encode_fn Opcode_wsr_epc3_encode_fns[] = {
9586 static xtensa_opcode_encode_fn Opcode_xsr_epc3_encode_fns[] = {
9590 static xtensa_opcode_encode_fn Opcode_rsr_excsave3_encode_fns[] = {
9594 static xtensa_opcode_encode_fn Opcode_wsr_excsave3_encode_fns[] = {
9598 static xtensa_opcode_encode_fn Opcode_xsr_excsave3_encode_fns[] = {
9602 static xtensa_opcode_encode_fn Opcode_rsr_epc4_encode_fns[] = {
9606 static xtensa_opcode_encode_fn Opcode_wsr_epc4_encode_fns[] = {
9610 static xtensa_opcode_encode_fn Opcode_xsr_epc4_encode_fns[] = {
9614 static xtensa_opcode_encode_fn Opcode_rsr_excsave4_encode_fns[] = {
9618 static xtensa_opcode_encode_fn Opcode_wsr_excsave4_encode_fns[] = {
9622 static xtensa_opcode_encode_fn Opcode_xsr_excsave4_encode_fns[] = {
9626 static xtensa_opcode_encode_fn Opcode_rsr_epc5_encode_fns[] = {
9630 static xtensa_opcode_encode_fn Opcode_wsr_epc5_encode_fns[] = {
9634 static xtensa_opcode_encode_fn Opcode_xsr_epc5_encode_fns[] = {
9638 static xtensa_opcode_encode_fn Opcode_rsr_excsave5_encode_fns[] = {
9642 static xtensa_opcode_encode_fn Opcode_wsr_excsave5_encode_fns[] = {
9646 static xtensa_opcode_encode_fn Opcode_xsr_excsave5_encode_fns[] = {
9650 static xtensa_opcode_encode_fn Opcode_rsr_epc6_encode_fns[] = {
9654 static xtensa_opcode_encode_fn Opcode_wsr_epc6_encode_fns[] = {
9658 static xtensa_opcode_encode_fn Opcode_xsr_epc6_encode_fns[] = {
9662 static xtensa_opcode_encode_fn Opcode_rsr_excsave6_encode_fns[] = {
9666 static xtensa_opcode_encode_fn Opcode_wsr_excsave6_encode_fns[] = {
9670 static xtensa_opcode_encode_fn Opcode_xsr_excsave6_encode_fns[] = {
9674 static xtensa_opcode_encode_fn Opcode_rsr_epc7_encode_fns[] = {
9678 static xtensa_opcode_encode_fn Opcode_wsr_epc7_encode_fns[] = {
9682 static xtensa_opcode_encode_fn Opcode_xsr_epc7_encode_fns[] = {
9686 static xtensa_opcode_encode_fn Opcode_rsr_excsave7_encode_fns[] = {
9690 static xtensa_opcode_encode_fn Opcode_wsr_excsave7_encode_fns[] = {
9694 static xtensa_opcode_encode_fn Opcode_xsr_excsave7_encode_fns[] = {
9698 static xtensa_opcode_encode_fn Opcode_rsr_eps2_encode_fns[] = {
9702 static xtensa_opcode_encode_fn Opcode_wsr_eps2_encode_fns[] = {
9706 static xtensa_opcode_encode_fn Opcode_xsr_eps2_encode_fns[] = {
9710 static xtensa_opcode_encode_fn Opcode_rsr_eps3_encode_fns[] = {
9714 static xtensa_opcode_encode_fn Opcode_wsr_eps3_encode_fns[] = {
9718 static xtensa_opcode_encode_fn Opcode_xsr_eps3_encode_fns[] = {
9722 static xtensa_opcode_encode_fn Opcode_rsr_eps4_encode_fns[] = {
9726 static xtensa_opcode_encode_fn Opcode_wsr_eps4_encode_fns[] = {
9730 static xtensa_opcode_encode_fn Opcode_xsr_eps4_encode_fns[] = {
9734 static xtensa_opcode_encode_fn Opcode_rsr_eps5_encode_fns[] = {
9738 static xtensa_opcode_encode_fn Opcode_wsr_eps5_encode_fns[] = {
9742 static xtensa_opcode_encode_fn Opcode_xsr_eps5_encode_fns[] = {
9746 static xtensa_opcode_encode_fn Opcode_rsr_eps6_encode_fns[] = {
9750 static xtensa_opcode_encode_fn Opcode_wsr_eps6_encode_fns[] = {
9754 static xtensa_opcode_encode_fn Opcode_xsr_eps6_encode_fns[] = {
9758 static xtensa_opcode_encode_fn Opcode_rsr_eps7_encode_fns[] = {
9762 static xtensa_opcode_encode_fn Opcode_wsr_eps7_encode_fns[] = {
9766 static xtensa_opcode_encode_fn Opcode_xsr_eps7_encode_fns[] = {
9770 static xtensa_opcode_encode_fn Opcode_rsr_excvaddr_encode_fns[] = {
9774 static xtensa_opcode_encode_fn Opcode_wsr_excvaddr_encode_fns[] = {
9778 static xtensa_opcode_encode_fn Opcode_xsr_excvaddr_encode_fns[] = {
9782 static xtensa_opcode_encode_fn Opcode_rsr_depc_encode_fns[] = {
9786 static xtensa_opcode_encode_fn Opcode_wsr_depc_encode_fns[] = {
9790 static xtensa_opcode_encode_fn Opcode_xsr_depc_encode_fns[] = {
9794 static xtensa_opcode_encode_fn Opcode_rsr_exccause_encode_fns[] = {
9798 static xtensa_opcode_encode_fn Opcode_wsr_exccause_encode_fns[] = {
9802 static xtensa_opcode_encode_fn Opcode_xsr_exccause_encode_fns[] = {
9806 static xtensa_opcode_encode_fn Opcode_rsr_misc0_encode_fns[] = {
9810 static xtensa_opcode_encode_fn Opcode_wsr_misc0_encode_fns[] = {
9814 static xtensa_opcode_encode_fn Opcode_xsr_misc0_encode_fns[] = {
9818 static xtensa_opcode_encode_fn Opcode_rsr_misc1_encode_fns[] = {
9822 static xtensa_opcode_encode_fn Opcode_wsr_misc1_encode_fns[] = {
9826 static xtensa_opcode_encode_fn Opcode_xsr_misc1_encode_fns[] = {
9830 static xtensa_opcode_encode_fn Opcode_rsr_prid_encode_fns[] = {
9834 static xtensa_opcode_encode_fn Opcode_rsr_vecbase_encode_fns[] = {
9838 static xtensa_opcode_encode_fn Opcode_wsr_vecbase_encode_fns[] = {
9842 static xtensa_opcode_encode_fn Opcode_xsr_vecbase_encode_fns[] = {
9846 static xtensa_opcode_encode_fn Opcode_mul_aa_ll_encode_fns[] = {
9850 static xtensa_opcode_encode_fn Opcode_mul_aa_hl_encode_fns[] = {
9854 static xtensa_opcode_encode_fn Opcode_mul_aa_lh_encode_fns[] = {
9858 static xtensa_opcode_encode_fn Opcode_mul_aa_hh_encode_fns[] = {
9862 static xtensa_opcode_encode_fn Opcode_umul_aa_ll_encode_fns[] = {
9866 static xtensa_opcode_encode_fn Opcode_umul_aa_hl_encode_fns[] = {
9870 static xtensa_opcode_encode_fn Opcode_umul_aa_lh_encode_fns[] = {
9874 static xtensa_opcode_encode_fn Opcode_umul_aa_hh_encode_fns[] = {
9878 static xtensa_opcode_encode_fn Opcode_mul_ad_ll_encode_fns[] = {
9882 static xtensa_opcode_encode_fn Opcode_mul_ad_hl_encode_fns[] = {
9886 static xtensa_opcode_encode_fn Opcode_mul_ad_lh_encode_fns[] = {
9890 static xtensa_opcode_encode_fn Opcode_mul_ad_hh_encode_fns[] = {
9894 static xtensa_opcode_encode_fn Opcode_mul_da_ll_encode_fns[] = {
9898 static xtensa_opcode_encode_fn Opcode_mul_da_hl_encode_fns[] = {
9902 static xtensa_opcode_encode_fn Opcode_mul_da_lh_encode_fns[] = {
9906 static xtensa_opcode_encode_fn Opcode_mul_da_hh_encode_fns[] = {
9910 static xtensa_opcode_encode_fn Opcode_mul_dd_ll_encode_fns[] = {
9914 static xtensa_opcode_encode_fn Opcode_mul_dd_hl_encode_fns[] = {
9918 static xtensa_opcode_encode_fn Opcode_mul_dd_lh_encode_fns[] = {
9922 static xtensa_opcode_encode_fn Opcode_mul_dd_hh_encode_fns[] = {
9926 static xtensa_opcode_encode_fn Opcode_mula_aa_ll_encode_fns[] = {
9930 static xtensa_opcode_encode_fn Opcode_mula_aa_hl_encode_fns[] = {
9934 static xtensa_opcode_encode_fn Opcode_mula_aa_lh_encode_fns[] = {
9938 static xtensa_opcode_encode_fn Opcode_mula_aa_hh_encode_fns[] = {
9942 static xtensa_opcode_encode_fn Opcode_muls_aa_ll_encode_fns[] = {
9946 static xtensa_opcode_encode_fn Opcode_muls_aa_hl_encode_fns[] = {
9950 static xtensa_opcode_encode_fn Opcode_muls_aa_lh_encode_fns[] = {
9954 static xtensa_opcode_encode_fn Opcode_muls_aa_hh_encode_fns[] = {
9958 static xtensa_opcode_encode_fn Opcode_mula_ad_ll_encode_fns[] = {
9962 static xtensa_opcode_encode_fn Opcode_mula_ad_hl_encode_fns[] = {
9966 static xtensa_opcode_encode_fn Opcode_mula_ad_lh_encode_fns[] = {
9970 static xtensa_opcode_encode_fn Opcode_mula_ad_hh_encode_fns[] = {
9974 static xtensa_opcode_encode_fn Opcode_muls_ad_ll_encode_fns[] = {
9978 static xtensa_opcode_encode_fn Opcode_muls_ad_hl_encode_fns[] = {
9982 static xtensa_opcode_encode_fn Opcode_muls_ad_lh_encode_fns[] = {
9986 static xtensa_opcode_encode_fn Opcode_muls_ad_hh_encode_fns[] = {
9990 static xtensa_opcode_encode_fn Opcode_mula_da_ll_encode_fns[] = {
9994 static xtensa_opcode_encode_fn Opcode_mula_da_hl_encode_fns[] = {
9998 static xtensa_opcode_encode_fn Opcode_mula_da_lh_encode_fns[] = {
10002 static xtensa_opcode_encode_fn Opcode_mula_da_hh_encode_fns[] = {
10006 static xtensa_opcode_encode_fn Opcode_muls_da_ll_encode_fns[] = {
10010 static xtensa_opcode_encode_fn Opcode_muls_da_hl_encode_fns[] = {
10014 static xtensa_opcode_encode_fn Opcode_muls_da_lh_encode_fns[] = {
10018 static xtensa_opcode_encode_fn Opcode_muls_da_hh_encode_fns[] = {
10022 static xtensa_opcode_encode_fn Opcode_mula_dd_ll_encode_fns[] = {
10026 static xtensa_opcode_encode_fn Opcode_mula_dd_hl_encode_fns[] = {
10030 static xtensa_opcode_encode_fn Opcode_mula_dd_lh_encode_fns[] = {
10034 static xtensa_opcode_encode_fn Opcode_mula_dd_hh_encode_fns[] = {
10038 static xtensa_opcode_encode_fn Opcode_muls_dd_ll_encode_fns[] = {
10042 static xtensa_opcode_encode_fn Opcode_muls_dd_hl_encode_fns[] = {
10046 static xtensa_opcode_encode_fn Opcode_muls_dd_lh_encode_fns[] = {
10050 static xtensa_opcode_encode_fn Opcode_muls_dd_hh_encode_fns[] = {
10054 static xtensa_opcode_encode_fn Opcode_mula_da_ll_lddec_encode_fns[] = {
10058 static xtensa_opcode_encode_fn Opcode_mula_da_ll_ldinc_encode_fns[] = {
10062 static xtensa_opcode_encode_fn Opcode_mula_da_hl_lddec_encode_fns[] = {
10066 static xtensa_opcode_encode_fn Opcode_mula_da_hl_ldinc_encode_fns[] = {
10070 static xtensa_opcode_encode_fn Opcode_mula_da_lh_lddec_encode_fns[] = {
10074 static xtensa_opcode_encode_fn Opcode_mula_da_lh_ldinc_encode_fns[] = {
10078 static xtensa_opcode_encode_fn Opcode_mula_da_hh_lddec_encode_fns[] = {
10082 static xtensa_opcode_encode_fn Opcode_mula_da_hh_ldinc_encode_fns[] = {
10086 static xtensa_opcode_encode_fn Opcode_mula_dd_ll_lddec_encode_fns[] = {
10090 static xtensa_opcode_encode_fn Opcode_mula_dd_ll_ldinc_encode_fns[] = {
10094 static xtensa_opcode_encode_fn Opcode_mula_dd_hl_lddec_encode_fns[] = {
10098 static xtensa_opcode_encode_fn Opcode_mula_dd_hl_ldinc_encode_fns[] = {
10102 static xtensa_opcode_encode_fn Opcode_mula_dd_lh_lddec_encode_fns[] = {
10106 static xtensa_opcode_encode_fn Opcode_mula_dd_lh_ldinc_encode_fns[] = {
10110 static xtensa_opcode_encode_fn Opcode_mula_dd_hh_lddec_encode_fns[] = {
10114 static xtensa_opcode_encode_fn Opcode_mula_dd_hh_ldinc_encode_fns[] = {
10118 static xtensa_opcode_encode_fn Opcode_lddec_encode_fns[] = {
10122 static xtensa_opcode_encode_fn Opcode_ldinc_encode_fns[] = {
10126 static xtensa_opcode_encode_fn Opcode_mul16u_encode_fns[] = {
10130 static xtensa_opcode_encode_fn Opcode_mul16s_encode_fns[] = {
10134 static xtensa_opcode_encode_fn Opcode_rsr_m0_encode_fns[] = {
10138 static xtensa_opcode_encode_fn Opcode_wsr_m0_encode_fns[] = {
10142 static xtensa_opcode_encode_fn Opcode_xsr_m0_encode_fns[] = {
10146 static xtensa_opcode_encode_fn Opcode_rsr_m1_encode_fns[] = {
10150 static xtensa_opcode_encode_fn Opcode_wsr_m1_encode_fns[] = {
10154 static xtensa_opcode_encode_fn Opcode_xsr_m1_encode_fns[] = {
10158 static xtensa_opcode_encode_fn Opcode_rsr_m2_encode_fns[] = {
10162 static xtensa_opcode_encode_fn Opcode_wsr_m2_encode_fns[] = {
10166 static xtensa_opcode_encode_fn Opcode_xsr_m2_encode_fns[] = {
10170 static xtensa_opcode_encode_fn Opcode_rsr_m3_encode_fns[] = {
10174 static xtensa_opcode_encode_fn Opcode_wsr_m3_encode_fns[] = {
10178 static xtensa_opcode_encode_fn Opcode_xsr_m3_encode_fns[] = {
10182 static xtensa_opcode_encode_fn Opcode_rsr_acclo_encode_fns[] = {
10186 static xtensa_opcode_encode_fn Opcode_wsr_acclo_encode_fns[] = {
10190 static xtensa_opcode_encode_fn Opcode_xsr_acclo_encode_fns[] = {
10194 static xtensa_opcode_encode_fn Opcode_rsr_acchi_encode_fns[] = {
10198 static xtensa_opcode_encode_fn Opcode_wsr_acchi_encode_fns[] = {
10202 static xtensa_opcode_encode_fn Opcode_xsr_acchi_encode_fns[] = {
10206 static xtensa_opcode_encode_fn Opcode_rfi_encode_fns[] = {
10210 static xtensa_opcode_encode_fn Opcode_waiti_encode_fns[] = {
10214 static xtensa_opcode_encode_fn Opcode_rsr_interrupt_encode_fns[] = {
10218 static xtensa_opcode_encode_fn Opcode_wsr_intset_encode_fns[] = {
10222 static xtensa_opcode_encode_fn Opcode_wsr_intclear_encode_fns[] = {
10226 static xtensa_opcode_encode_fn Opcode_rsr_intenable_encode_fns[] = {
10230 static xtensa_opcode_encode_fn Opcode_wsr_intenable_encode_fns[] = {
10234 static xtensa_opcode_encode_fn Opcode_xsr_intenable_encode_fns[] = {
10238 static xtensa_opcode_encode_fn Opcode_break_encode_fns[] = {
10242 static xtensa_opcode_encode_fn Opcode_break_n_encode_fns[] = {
10246 static xtensa_opcode_encode_fn Opcode_rsr_dbreaka0_encode_fns[] = {
10250 static xtensa_opcode_encode_fn Opcode_wsr_dbreaka0_encode_fns[] = {
10254 static xtensa_opcode_encode_fn Opcode_xsr_dbreaka0_encode_fns[] = {
10258 static xtensa_opcode_encode_fn Opcode_rsr_dbreakc0_encode_fns[] = {
10262 static xtensa_opcode_encode_fn Opcode_wsr_dbreakc0_encode_fns[] = {
10266 static xtensa_opcode_encode_fn Opcode_xsr_dbreakc0_encode_fns[] = {
10270 static xtensa_opcode_encode_fn Opcode_rsr_dbreaka1_encode_fns[] = {
10274 static xtensa_opcode_encode_fn Opcode_wsr_dbreaka1_encode_fns[] = {
10278 static xtensa_opcode_encode_fn Opcode_xsr_dbreaka1_encode_fns[] = {
10282 static xtensa_opcode_encode_fn Opcode_rsr_dbreakc1_encode_fns[] = {
10286 static xtensa_opcode_encode_fn Opcode_wsr_dbreakc1_encode_fns[] = {
10290 static xtensa_opcode_encode_fn Opcode_xsr_dbreakc1_encode_fns[] = {
10294 static xtensa_opcode_encode_fn Opcode_rsr_ibreaka0_encode_fns[] = {
10298 static xtensa_opcode_encode_fn Opcode_wsr_ibreaka0_encode_fns[] = {
10302 static xtensa_opcode_encode_fn Opcode_xsr_ibreaka0_encode_fns[] = {
10306 static xtensa_opcode_encode_fn Opcode_rsr_ibreaka1_encode_fns[] = {
10310 static xtensa_opcode_encode_fn Opcode_wsr_ibreaka1_encode_fns[] = {
10314 static xtensa_opcode_encode_fn Opcode_xsr_ibreaka1_encode_fns[] = {
10318 static xtensa_opcode_encode_fn Opcode_rsr_ibreakenable_encode_fns[] = {
10322 static xtensa_opcode_encode_fn Opcode_wsr_ibreakenable_encode_fns[] = {
10326 static xtensa_opcode_encode_fn Opcode_xsr_ibreakenable_encode_fns[] = {
10330 static xtensa_opcode_encode_fn Opcode_rsr_debugcause_encode_fns[] = {
10334 static xtensa_opcode_encode_fn Opcode_wsr_debugcause_encode_fns[] = {
10338 static xtensa_opcode_encode_fn Opcode_xsr_debugcause_encode_fns[] = {
10342 static xtensa_opcode_encode_fn Opcode_rsr_icount_encode_fns[] = {
10346 static xtensa_opcode_encode_fn Opcode_wsr_icount_encode_fns[] = {
10350 static xtensa_opcode_encode_fn Opcode_xsr_icount_encode_fns[] = {
10354 static xtensa_opcode_encode_fn Opcode_rsr_icountlevel_encode_fns[] = {
10358 static xtensa_opcode_encode_fn Opcode_wsr_icountlevel_encode_fns[] = {
10362 static xtensa_opcode_encode_fn Opcode_xsr_icountlevel_encode_fns[] = {
10366 static xtensa_opcode_encode_fn Opcode_rsr_ddr_encode_fns[] = {
10370 static xtensa_opcode_encode_fn Opcode_wsr_ddr_encode_fns[] = {
10374 static xtensa_opcode_encode_fn Opcode_xsr_ddr_encode_fns[] = {
10378 static xtensa_opcode_encode_fn Opcode_rfdo_encode_fns[] = {
10382 static xtensa_opcode_encode_fn Opcode_rfdd_encode_fns[] = {
10386 static xtensa_opcode_encode_fn Opcode_wsr_mmid_encode_fns[] = {
10390 static xtensa_opcode_encode_fn Opcode_rsr_ccount_encode_fns[] = {
10394 static xtensa_opcode_encode_fn Opcode_wsr_ccount_encode_fns[] = {
10398 static xtensa_opcode_encode_fn Opcode_xsr_ccount_encode_fns[] = {
10402 static xtensa_opcode_encode_fn Opcode_rsr_ccompare0_encode_fns[] = {
10406 static xtensa_opcode_encode_fn Opcode_wsr_ccompare0_encode_fns[] = {
10410 static xtensa_opcode_encode_fn Opcode_xsr_ccompare0_encode_fns[] = {
10414 static xtensa_opcode_encode_fn Opcode_rsr_ccompare1_encode_fns[] = {
10418 static xtensa_opcode_encode_fn Opcode_wsr_ccompare1_encode_fns[] = {
10422 static xtensa_opcode_encode_fn Opcode_xsr_ccompare1_encode_fns[] = {
10426 static xtensa_opcode_encode_fn Opcode_rsr_ccompare2_encode_fns[] = {
10430 static xtensa_opcode_encode_fn Opcode_wsr_ccompare2_encode_fns[] = {
10434 static xtensa_opcode_encode_fn Opcode_xsr_ccompare2_encode_fns[] = {
10438 static xtensa_opcode_encode_fn Opcode_ipf_encode_fns[] = {
10442 static xtensa_opcode_encode_fn Opcode_ihi_encode_fns[] = {
10446 static xtensa_opcode_encode_fn Opcode_ipfl_encode_fns[] = {
10450 static xtensa_opcode_encode_fn Opcode_ihu_encode_fns[] = {
10454 static xtensa_opcode_encode_fn Opcode_iiu_encode_fns[] = {
10458 static xtensa_opcode_encode_fn Opcode_iii_encode_fns[] = {
10462 static xtensa_opcode_encode_fn Opcode_lict_encode_fns[] = {
10466 static xtensa_opcode_encode_fn Opcode_licw_encode_fns[] = {
10470 static xtensa_opcode_encode_fn Opcode_sict_encode_fns[] = {
10474 static xtensa_opcode_encode_fn Opcode_sicw_encode_fns[] = {
10478 static xtensa_opcode_encode_fn Opcode_dhwb_encode_fns[] = {
10482 static xtensa_opcode_encode_fn Opcode_dhwbi_encode_fns[] = {
10486 static xtensa_opcode_encode_fn Opcode_diwb_encode_fns[] = {
10490 static xtensa_opcode_encode_fn Opcode_diwbi_encode_fns[] = {
10494 static xtensa_opcode_encode_fn Opcode_dhi_encode_fns[] = {
10498 static xtensa_opcode_encode_fn Opcode_dii_encode_fns[] = {
10502 static xtensa_opcode_encode_fn Opcode_dpfr_encode_fns[] = {
10506 static xtensa_opcode_encode_fn Opcode_dpfw_encode_fns[] = {
10510 static xtensa_opcode_encode_fn Opcode_dpfro_encode_fns[] = {
10514 static xtensa_opcode_encode_fn Opcode_dpfwo_encode_fns[] = {
10518 static xtensa_opcode_encode_fn Opcode_dpfl_encode_fns[] = {
10522 static xtensa_opcode_encode_fn Opcode_dhu_encode_fns[] = {
10526 static xtensa_opcode_encode_fn Opcode_diu_encode_fns[] = {
10530 static xtensa_opcode_encode_fn Opcode_sdct_encode_fns[] = {
10534 static xtensa_opcode_encode_fn Opcode_ldct_encode_fns[] = {
10538 static xtensa_opcode_encode_fn Opcode_wsr_ptevaddr_encode_fns[] = {
10542 static xtensa_opcode_encode_fn Opcode_rsr_ptevaddr_encode_fns[] = {
10546 static xtensa_opcode_encode_fn Opcode_xsr_ptevaddr_encode_fns[] = {
10550 static xtensa_opcode_encode_fn Opcode_rsr_rasid_encode_fns[] = {
10554 static xtensa_opcode_encode_fn Opcode_wsr_rasid_encode_fns[] = {
10558 static xtensa_opcode_encode_fn Opcode_xsr_rasid_encode_fns[] = {
10562 static xtensa_opcode_encode_fn Opcode_rsr_itlbcfg_encode_fns[] = {
10566 static xtensa_opcode_encode_fn Opcode_wsr_itlbcfg_encode_fns[] = {
10570 static xtensa_opcode_encode_fn Opcode_xsr_itlbcfg_encode_fns[] = {
10574 static xtensa_opcode_encode_fn Opcode_rsr_dtlbcfg_encode_fns[] = {
10578 static xtensa_opcode_encode_fn Opcode_wsr_dtlbcfg_encode_fns[] = {
10582 static xtensa_opcode_encode_fn Opcode_xsr_dtlbcfg_encode_fns[] = {
10586 static xtensa_opcode_encode_fn Opcode_idtlb_encode_fns[] = {
10590 static xtensa_opcode_encode_fn Opcode_pdtlb_encode_fns[] = {
10594 static xtensa_opcode_encode_fn Opcode_rdtlb0_encode_fns[] = {
10598 static xtensa_opcode_encode_fn Opcode_rdtlb1_encode_fns[] = {
10602 static xtensa_opcode_encode_fn Opcode_wdtlb_encode_fns[] = {
10606 static xtensa_opcode_encode_fn Opcode_iitlb_encode_fns[] = {
10610 static xtensa_opcode_encode_fn Opcode_pitlb_encode_fns[] = {
10614 static xtensa_opcode_encode_fn Opcode_ritlb0_encode_fns[] = {
10618 static xtensa_opcode_encode_fn Opcode_ritlb1_encode_fns[] = {
10622 static xtensa_opcode_encode_fn Opcode_witlb_encode_fns[] = {
10626 static xtensa_opcode_encode_fn Opcode_ldpte_encode_fns[] = {
10630 static xtensa_opcode_encode_fn Opcode_hwwitlba_encode_fns[] = {
10634 static xtensa_opcode_encode_fn Opcode_hwwdtlba_encode_fns[] = {
10638 static xtensa_opcode_encode_fn Opcode_rsr_cpenable_encode_fns[] = {
10642 static xtensa_opcode_encode_fn Opcode_wsr_cpenable_encode_fns[] = {
10646 static xtensa_opcode_encode_fn Opcode_xsr_cpenable_encode_fns[] = {
10650 static xtensa_opcode_encode_fn Opcode_clamps_encode_fns[] = {
10654 static xtensa_opcode_encode_fn Opcode_min_encode_fns[] = {
10658 static xtensa_opcode_encode_fn Opcode_max_encode_fns[] = {
10662 static xtensa_opcode_encode_fn Opcode_minu_encode_fns[] = {
10666 static xtensa_opcode_encode_fn Opcode_maxu_encode_fns[] = {
10670 static xtensa_opcode_encode_fn Opcode_nsa_encode_fns[] = {
10674 static xtensa_opcode_encode_fn Opcode_nsau_encode_fns[] = {
10678 static xtensa_opcode_encode_fn Opcode_sext_encode_fns[] = {
10682 static xtensa_opcode_encode_fn Opcode_l32ai_encode_fns[] = {
10686 static xtensa_opcode_encode_fn Opcode_s32ri_encode_fns[] = {
10690 static xtensa_opcode_encode_fn Opcode_s32c1i_encode_fns[] = {
10694 static xtensa_opcode_encode_fn Opcode_rsr_scompare1_encode_fns[] = {
10698 static xtensa_opcode_encode_fn Opcode_wsr_scompare1_encode_fns[] = {
10702 static xtensa_opcode_encode_fn Opcode_xsr_scompare1_encode_fns[] = {
10706 static xtensa_opcode_encode_fn Opcode_quou_encode_fns[] = {
10710 static xtensa_opcode_encode_fn Opcode_quos_encode_fns[] = {
10714 static xtensa_opcode_encode_fn Opcode_remu_encode_fns[] = {
10718 static xtensa_opcode_encode_fn Opcode_rems_encode_fns[] = {
10722 static xtensa_opcode_encode_fn Opcode_mull_encode_fns[] = {
10726 static xtensa_opcode_encode_fn Opcode_rur_expstate_encode_fns[] = {
10730 static xtensa_opcode_encode_fn Opcode_wur_expstate_encode_fns[] = {
10734 static xtensa_opcode_encode_fn Opcode_read_impwire_encode_fns[] = {
10738 static xtensa_opcode_encode_fn Opcode_setb_expstate_encode_fns[] = {
10742 static xtensa_opcode_encode_fn Opcode_clrb_expstate_encode_fns[] = {
10746 static xtensa_opcode_encode_fn Opcode_wrmsk_expstate_encode_fns[] = {
10753 static xtensa_opcode_internal opcodes[] = {
12097 static int
13500 static int
13551 static int
13571 static void
13578 static void
13585 static void
13592 static void
13599 static void
13606 static void
13613 static xtensa_get_field_fn
13673 static xtensa_set_field_fn
13733 static xtensa_get_field_fn
13793 static xtensa_set_field_fn
13853 static xtensa_get_field_fn
13913 static xtensa_set_field_fn
13973 static xtensa_slot_internal slots[] = {
13991 static void
13997 static void
14003 static void
14009 static int Format_x24_slots[] = { 0 };
14011 static int Format_x16a_slots[] = { 1 };
14013 static int Format_x16b_slots[] = { 2 };
14015 static xtensa_format_internal formats[] = {
14022 static int
14034 static int length_table[16] = {
14053 static int