x86 FPU with 256-bit %ymm registers
xcr0            0x7
xfd             0x0
xstate_bv       0x7
xcomp_bv        0x0

%ymm0  [255:128] 0x1190045d 1190045c 1190045b 1190045a
%xmm0  [127:0]   0x11900459 11900458 11900457 11900456

%ymm1  [255:128] 0x11900465 11900464 11900463 11900462
%xmm1  [127:0]   0x11900461 11900460 1190045f 1190045e

%ymm2  [255:128] 0x1190046d 1190046c 1190046b 1190046a
%xmm2  [127:0]   0x11900469 11900468 11900467 11900466

%ymm3  [255:128] 0x11900475 11900474 11900473 11900472
%xmm3  [127:0]   0x11900471 11900470 1190046f 1190046e

%ymm4  [255:128] 0x1190047d 1190047c 1190047b 1190047a
%xmm4  [127:0]   0x11900479 11900478 11900477 11900476

%ymm5  [255:128] 0x11900485 11900484 11900483 11900482
%xmm5  [127:0]   0x11900481 11900480 1190047f 1190047e

%ymm6  [255:128] 0x1190048d 1190048c 1190048b 1190048a
%xmm6  [127:0]   0x11900489 11900488 11900487 11900486

%ymm7  [255:128] 0x11900495 11900494 11900493 11900492
%xmm7  [127:0]   0x11900491 11900490 1190048f 1190048e

%ymm8  [255:128] 0x1190049d 1190049c 1190049b 1190049a
%xmm8  [127:0]   0x11900499 11900498 11900497 11900496

%ymm9  [255:128] 0x119004a5 119004a4 119004a3 119004a2
%xmm9  [127:0]   0x119004a1 119004a0 1190049f 1190049e

%ymm10 [255:128] 0x119004ad 119004ac 119004ab 119004aa
%xmm10 [127:0]   0x119004a9 119004a8 119004a7 119004a6

%ymm11 [255:128] 0x119004b5 119004b4 119004b3 119004b2
%xmm11 [127:0]   0x119004b1 119004b0 119004af 119004ae

%ymm12 [255:128] 0x119004bd 119004bc 119004bb 119004ba
%xmm12 [127:0]   0x119004b9 119004b8 119004b7 119004b6

%ymm13 [255:128] 0x119004c5 119004c4 119004c3 119004c2
%xmm13 [127:0]   0x119004c1 119004c0 119004bf 119004be

%ymm14 [255:128] 0x119004cd 119004cc 119004cb 119004ca
%xmm14 [127:0]   0x119004c9 119004c8 119004c7 119004c6

%ymm15 [255:128] 0x119004d5 119004d4 119004d3 119004d2
%xmm15 [127:0]   0x119004d1 119004d0 119004cf 119004ce

387 and FP Control State
cw     0x137f (IM|DM|ZM|OM|UM|PM|SIG64|RTN|A)
sw     0x0000 (TOP=0t0) (0)
xcp sw 0x0000 (0)

fop    0x0
rip    0x0
rdp    0x0

%st0   0x0000.0000000000000000 = +0.0000000000000000e+00 empty
%st1   0x0000.0000000000000000 = +0.0000000000000000e+00 empty
%st2   0x0000.0000000000000000 = +0.0000000000000000e+00 empty
%st3   0x0000.0000000000000000 = +0.0000000000000000e+00 empty
%st4   0x0000.0000000000000000 = +0.0000000000000000e+00 empty
%st5   0x0000.0000000000000000 = +0.0000000000000000e+00 empty
%st6   0x0000.0000000000000000 = +0.0000000000000000e+00 empty
%st7   0x0000.0000000000000000 = +0.0000000000000000e+00 empty

SSE Control State
mxcsr  0x1f80 (IM|DM|ZM|OM|UM|PM|RTN)
xcp    0x0000 (RTN)