# AArch64 SME instruction descriptions
#
#  Copyright (c) 2022 Linaro, Ltd
#
# This library is free software; you can redistribute it and/or
# modify it under the terms of the GNU Lesser General Public
# License as published by the Free Software Foundation; either
# version 2.1 of the License, or (at your option) any later version.
#
# This library is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
# Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public
# License along with this library; if not, see <http://www.gnu.org/licenses/>.

#
# This file is processed by scripts/decodetree.py
#

### SME Misc

ZERO            11000000 00 001 00000000000 imm:8

### SME Move into/from Array

%mova_rs        13:2 !function=plus_12
&mova           esz rs pg zr za_imm v:bool to_vec:bool

MOVA            11000000 esz:2 00000 0 v:1 .. pg:3 zr:5 0 za_imm:4  \
                &mova to_vec=0 rs=%mova_rs
MOVA            11000000 11    00000 1 v:1 .. pg:3 zr:5 0 za_imm:4  \
                &mova to_vec=0 rs=%mova_rs esz=4

MOVA            11000000 esz:2 00001 0 v:1 .. pg:3 0 za_imm:4 zr:5  \
                &mova to_vec=1 rs=%mova_rs
MOVA            11000000 11    00001 1 v:1 .. pg:3 0 za_imm:4 zr:5  \
                &mova to_vec=1 rs=%mova_rs esz=4

### SME Memory

&ldst           esz rs pg rn rm za_imm v:bool st:bool

LDST1           1110000 0 esz:2 st:1 rm:5 v:1 .. pg:3 rn:5 0 za_imm:4  \
                &ldst rs=%mova_rs
LDST1           1110000 111     st:1 rm:5 v:1 .. pg:3 rn:5 0 za_imm:4  \
                &ldst esz=4 rs=%mova_rs

&ldstr          rv rn imm
@ldstr          ....... ... . ...... .. ... rn:5 . imm:4 \
                &ldstr rv=%mova_rs

LDR             1110000 100 0 000000 .. 000 ..... 0 ....        @ldstr
STR             1110000 100 1 000000 .. 000 ..... 0 ....        @ldstr

### SME Add Vector to Array

&adda           zad zn pm pn
@adda_32        ........ .. ..... . pm:3 pn:3 zn:5 ... zad:2    &adda
@adda_64        ........ .. ..... . pm:3 pn:3 zn:5 ..  zad:3    &adda

ADDHA_s         11000000 10 01000 0 ... ... ..... 000 ..        @adda_32
ADDVA_s         11000000 10 01000 1 ... ... ..... 000 ..        @adda_32
ADDHA_d         11000000 11 01000 0 ... ... ..... 00 ...        @adda_64
ADDVA_d         11000000 11 01000 1 ... ... ..... 00 ...        @adda_64

### SME Outer Product

&op             zad zn zm pm pn sub:bool
@op_32          ........ ... zm:5 pm:3 pn:3 zn:5 sub:1 .. zad:2 &op
@op_64          ........ ... zm:5 pm:3 pn:3 zn:5 sub:1 .  zad:3 &op

FMOPA_s         10000000 100 ..... ... ... ..... . 00 ..        @op_32
FMOPA_d         10000000 110 ..... ... ... ..... . 0 ...        @op_64

BFMOPA          10000001 100 ..... ... ... ..... . 00 ..        @op_32
FMOPA_h         10000001 101 ..... ... ... ..... . 00 ..        @op_32

SMOPA_s         1010000 0 10 0 ..... ... ... ..... . 00 ..      @op_32
SUMOPA_s        1010000 0 10 1 ..... ... ... ..... . 00 ..      @op_32
USMOPA_s        1010000 1 10 0 ..... ... ... ..... . 00 ..      @op_32
UMOPA_s         1010000 1 10 1 ..... ... ... ..... . 00 ..      @op_32

SMOPA_d         1010000 0 11 0 ..... ... ... ..... . 0 ...      @op_64
SUMOPA_d        1010000 0 11 1 ..... ... ... ..... . 0 ...      @op_64
USMOPA_d        1010000 1 11 0 ..... ... ... ..... . 0 ...      @op_64
UMOPA_d         1010000 1 11 1 ..... ... ... ..... . 0 ...      @op_64