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/dports/databases/postgresql11-docs/postgresql-11.14/src/test/isolation/expected/
H A Dtuplelock-upgrade-no-deadlock.out50 step s1_rollback: rollback;
51 step s3_update: <... completed>
52 step s3_rollback: rollback;
58
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dmemset.S39 CC = R2 <= 7(IU); define
44 CC = R2 == 0; /* AZ set if zero. */ define
58 CC = P0 == P2; define
69 CC = P2 == 0; /* Check zero count */ define
81 CC = BITTST (R0, 0); /* odd byte */ define
89 CC = R2 <= 2; /* 2 bytes */ define
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dmemset.S39 CC = R2 <= 7(IU); define
44 CC = R2 == 0; /* AZ set if zero. */ define
58 CC = P0 == P2; define
69 CC = P2 == 0; /* Check zero count */ define
81 CC = BITTST (R0, 0); /* odd byte */ define
89 CC = R2 <= 2; /* 2 bytes */ define
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dmemset.S39 CC = R2 <= 7(IU); define
44 CC = R2 == 0; /* AZ set if zero. */ define
58 CC = P0 == P2; define
69 CC = P2 == 0; /* Check zero count */ define
81 CC = BITTST (R0, 0); /* odd byte */ define
89 CC = R2 <= 2; /* 2 bytes */ define
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dmemset.S39 CC = R2 <= 7(IU); define
44 CC = R2 == 0; /* AZ set if zero. */ define
58 CC = P0 == P2; define
69 CC = P2 == 0; /* Check zero count */ define
81 CC = BITTST (R0, 0); /* odd byte */ define
89 CC = R2 <= 2; /* 2 bytes */ define
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dmemset.S39 CC = R2 <= 7(IU); define
44 CC = R2 == 0; /* AZ set if zero. */ define
58 CC = P0 == P2; define
69 CC = P2 == 0; /* Check zero count */ define
81 CC = BITTST (R0, 0); /* odd byte */ define
89 CC = R2 <= 2; /* 2 bytes */ define
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dmemset.S39 CC = R2 <= 7(IU); define
44 CC = R2 == 0; /* AZ set if zero. */ define
58 CC = P0 == P2; define
69 CC = P2 == 0; /* Check zero count */ define
81 CC = BITTST (R0, 0); /* odd byte */ define
89 CC = R2 <= 2; /* 2 bytes */ define
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/lib/
H A Dmemset.S26 CC = R2 <= 7(IU); define
31 CC = R2 == 0; /* AZ set if zero. */ define
45 CC = P0 == P2; define
56 CC = P2 == 0; /* Check zero count */ define
68 CC = BITTST (R0, 0); /* odd byte */ define
76 CC = R2 <= 2; /* 2 bytes */ define
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dmemset.S39 CC = R2 <= 7(IU); define
44 CC = R2 == 0; /* AZ set if zero. */ define
58 CC = P0 == P2; define
69 CC = P2 == 0; /* Check zero count */ define
81 CC = BITTST (R0, 0); /* odd byte */ define
89 CC = R2 <= 2; /* 2 bytes */ define
/dports/devel/gdb761/gdb-7.6.1/sim/testsuite/sim/bfin/
H A Dc_cc_regmvlogi_mvbrsft.s25 CC = R0 < R1; // ccflag define
27 CC = ! BITTST( R0 , 4 ); // cc = 0 define
29 CC = BITTST ( R1 , 4 ); // cc = 0 define
31 CC = ! CC; define
38 CC = R0 < R1; // ccflag define
67 CC = ! BITTST( R0 , 4 ); // cc = 0 define
69 CC = BITTST ( R1 , 4 ); // cc = 0 define
71 CC = BITTST ( R0 , 4 ); // cc = 1 define
H A Dcycles.s15 CC = R2 <= 3; define
19 CC = R3 == 1; define
31 CC = R2 == R3; define
36 CC = R2 == R1; define
H A Dunlink.S36 CC = R0 == R1; define
41 CC = R0 == R1; define
46 CC = R0 == R1; define
56 CC = R0 == 0; define
H A Dhwloop-bits.S10 CC = R0 == \lc; define
14 CC = R0 == \lt; define
18 CC = R0 == \lb; define
22 CC = R0 == \lc; define
26 CC = R0 == \lt; define
30 CC = R0 == \lb; define
/dports/devel/cscout/cscout-bd7dfac/example/awk/
H A Dmakefile29 CC = gcc -Wall -g -Wwrite-strings macro
30 CC = gcc -Wall -g macro
31 CC = /opt/SUNWspro/bin/cc macro
32 CC = /opt/pure/purify/purify cc macro
33 CC = cc macro
/dports/devel/swig/swig-4.0.2/Examples/test-suite/
H A Dtemplate_default_class_parms_typedef.i32 …Bar(bool, bool, typename Bar<CC, DD, EE>::C c, typename Bar<CC, DD, EE>::D d, typename Bar<CC, DD,… in Bar()
33 …typename Bar<CC, DD, EE>::C method_2(typename Bar<CC, DD, EE>::C c, typename Bar<CC, DD, EE>::D d,… in method_2()
36 …Bar(bool, bool, bool, typename Space::Bar<CC, DD, EE>::C c, typename Space::Bar<CC, DD, EE>::D d, … in Bar()
37 …typename Space::Bar<CC, DD, EE>::C method_3(typename Space::Bar<CC, DD, EE>::C c, typename Space::… in method_3()
/dports/biology/sra-tools/sra-tools-2.11.0/ncbi-vdb/interfaces/kdb/
H A Drowset-impl.h88 void ( CC * destroy_data ) ( KROWSET_DATA * self, ctx_t ctx ); member
90 …void ( CC * add_row_id_range ) ( struct KROWSET * self, ctx_t ctx, int64_t start_row_id, uint64_t … member
92 bool ( CC * has_row_id ) ( const struct KROWSET * self, ctx_t ctx, int64_t row_id ); member
93 struct KROWSET_IT * ( CC * get_iterator ) ( const struct KROWSET * self, ctx_t ctx ); member
124 bool ( CC * next ) ( struct KROWSET_IT * self, ctx_t ctx ); member
125 bool ( CC * is_valid ) ( const struct KROWSET_IT * self ); member
/dports/biology/ncbi-vdb/ncbi-vdb-2.11.0/interfaces/kdb/
H A Drowset-impl.h88 void ( CC * destroy_data ) ( KROWSET_DATA * self, ctx_t ctx ); member
90 …void ( CC * add_row_id_range ) ( struct KROWSET * self, ctx_t ctx, int64_t start_row_id, uint64_t … member
92 bool ( CC * has_row_id ) ( const struct KROWSET * self, ctx_t ctx, int64_t row_id ); member
93 struct KROWSET_IT * ( CC * get_iterator ) ( const struct KROWSET * self, ctx_t ctx ); member
124 bool ( CC * next ) ( struct KROWSET_IT * self, ctx_t ctx ); member
125 bool ( CC * is_valid ) ( const struct KROWSET_IT * self ); member
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUPALMetadata.cpp95 static unsigned getRsrc1Reg(CallingConv::ID CC) { in getRsrc1Reg()
117 static unsigned getScratchSizeKey(CallingConv::ID CC) { in getScratchSizeKey()
138 void AMDGPUPALMetadata::setRsrc1(CallingConv::ID CC, unsigned Val) { in setRsrc1()
144 void AMDGPUPALMetadata::setRsrc2(CallingConv::ID CC, unsigned Val) { in setRsrc2()
188 void AMDGPUPALMetadata::setEntryPoint(unsigned CC, StringRef Name) { in setEntryPoint()
209 getHwStage(CC)[".vgpr_count"] = MsgPackDoc.getNode(Val); in setNumUsedVgprs() local
225 getHwStage(CC)[".sgpr_count"] = MsgPackDoc.getNode(Val); in setNumUsedSgprs() local
236 getHwStage(CC)[".scratch_memory_size"] = MsgPackDoc.getNode(Val); in setScratchSize() local
248 void AMDGPUPALMetadata::setWave32(unsigned CC) { in setWave32()
754 static const char *getStageName(CallingConv::ID CC) { in getStageName()
[all …]
/dports/emulators/libretro-vice/vice-libretro-5725415/
H A DMakefile111 CC = $(DEVKITARM)/bin/arm-none-eabi-gcc$(EXE_EXT) macro
161 CC = clang -arch arm64 -isysroot $(IOSSDK) macro
205 CC = qcc -Vgcc_ntoarmv7le macro
215 CC = arm-linux-androideabi-gcc macro
255 CC = psp-gcc$(EXE_EXT) macro
275 CC = arm-vita-eabi-gcc$(EXE_EXT) macro
293 CC = $(DEVKITPPC)/bin/powerpc-eabi-gcc$(EXE_EXT) macro
302 CC = $(DEVKITPPC)/bin/powerpc-eabi-gcc$(EXE_EXT) macro
323 CC = $(PS3DEV)/ppu/bin/ppu-gcc$(EXE_EXT) macro
334 CC = /opt/gcw0-toolchain/usr/bin/mipsel-linux-gcc macro
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUPALMetadata.cpp95 static unsigned getRsrc1Reg(CallingConv::ID CC) { in getRsrc1Reg()
117 static unsigned getScratchSizeKey(CallingConv::ID CC) { in getScratchSizeKey()
138 void AMDGPUPALMetadata::setRsrc1(CallingConv::ID CC, unsigned Val) { in setRsrc1()
144 void AMDGPUPALMetadata::setRsrc2(CallingConv::ID CC, unsigned Val) { in setRsrc2()
188 void AMDGPUPALMetadata::setEntryPoint(unsigned CC, StringRef Name) { in setEntryPoint()
209 getHwStage(CC)[".vgpr_count"] = MsgPackDoc.getNode(Val); in setNumUsedVgprs() local
225 getHwStage(CC)[".sgpr_count"] = MsgPackDoc.getNode(Val); in setNumUsedSgprs() local
236 getHwStage(CC)[".scratch_memory_size"] = MsgPackDoc.getNode(Val); in setScratchSize() local
248 void AMDGPUPALMetadata::setWave32(unsigned CC) { in setWave32()
754 static const char *getStageName(CallingConv::ID CC) { in getStageName()
[all …]
/dports/cad/yosys/yosys-yosys-0.12/libs/subcircuit/
H A DMakefile7 CC = clang macro
17 CC = gcc macro
23 CC = gcc macro
29 CC = gcc macro
/dports/devel/boost-docs/boost_1_72_0/libs/fusion/test/sequence/
H A Dcopy.hpp39 struct CC { CC() {} CC(const BB&) {} }; in CC() argument
/dports/devel/boost-python-libs/boost_1_72_0/libs/fusion/test/sequence/
H A Dcopy.hpp39 struct CC { CC() {} CC(const BB&) {} }; in CC() function
/dports/devel/boost-libs/boost_1_72_0/libs/fusion/test/sequence/
H A Dcopy.hpp39 struct CC { CC() {} CC(const BB&) {} }; in CC() argument
/dports/devel/hyperscan/boost_1_75_0/libs/fusion/test/sequence/
H A Dcopy.hpp39 struct CC { CC() {} CC(const BB&) {} }; in CC() argument

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