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Searched defs:sshl (Results 1 – 25 of 31) sorted by relevance

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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/MC/AArch64/
H A Dneon-diagnostics.s976 sshl d0, d1, s2 define
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/MC/AArch64/
H A Dneon-diagnostics.s976 sshl d0, d1, s2 define
/dports/devel/llvm10/llvm-10.0.1.src/test/MC/AArch64/
H A Dneon-diagnostics.s976 sshl d0, d1, s2 define
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/MC/AArch64/
H A Dneon-diagnostics.s976 sshl d0, d1, s2 define
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/MC/AArch64/
H A Dneon-diagnostics.s976 sshl d0, d1, s2 define
/dports/devel/llvm11/llvm-11.0.1.src/test/MC/AArch64/
H A Dneon-diagnostics.s976 sshl d0, d1, s2 define
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/MC/AArch64/
H A Dneon-diagnostics.s976 sshl d0, d1, s2 define
/dports/devel/llvm90/llvm-9.0.1.src/test/MC/AArch64/
H A Dneon-diagnostics.s976 sshl d0, d1, s2 define
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/MC/AArch64/
H A Dneon-diagnostics.s976 sshl d0, d1, s2 define
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/MC/AArch64/
H A Dneon-diagnostics.s976 sshl d0, d1, s2 define
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/MC/AArch64/
H A Dneon-diagnostics.s976 sshl d0, d1, s2 define
/dports/devel/llvm80/llvm-8.0.1.src/test/MC/AArch64/
H A Dneon-diagnostics.s976 sshl d0, d1, s2 define
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/MC/AArch64/
H A Dneon-diagnostics.s976 sshl d0, d1, s2 define
/dports/devel/llvm70/llvm-7.0.1.src/test/MC/AArch64/
H A Dneon-diagnostics.s976 sshl d0, d1, s2 define
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/MC/AArch64/
H A Dneon-diagnostics.s976 sshl d0, d1, s2 define
/dports/cad/yosys/yosys-yosys-0.12/backends/firrtl/
H A Dtest.v7 …, mod, mux, And, Or, Xor, eq, neq, gt, lt, geq, leq, eqx, shr, sshr, shl, sshl, Land, Lor, Lnot, N… port
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/tools/llvm-mca/AArch64/Cortex/
H A DA55-neon-instructions.s719 sshl d31, d31, d31 label
720 sshl v0.2d, v0.2d, v0.2d label
721 sshl v0.2s, v0.2s, v0.2s label
722 sshl v0.4h, v0.4h, v0.4h label
723 sshl v0.8b, v0.8b, v0.8b label
/dports/www/trafficserver/trafficserver-9.1.1/doc/admin-guide/logging/
H A Dformatting.en.rst429 .. _sshl: target
/dports/misc/mxnet/incubator-mxnet-1.9.0/3rdparty/mkldnn/src/cpu/aarch64/xbyak_aarch64/src/
H A Dxbyak_aarch64_mnemonic.h1441 void CodeGenerator::sshl(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(0, 8, vd,… in sshl() function
2361 void CodeGenerator::sshl(const VReg8B &vd, const VReg8B &vn, const VReg8B &vm) { AdvSimd3Same(0, 8,… function
2362 void CodeGenerator::sshl(const VReg4H &vd, const VReg4H &vn, const VReg4H &vm) { AdvSimd3Same(0, 8,… function
2363 void CodeGenerator::sshl(const VReg2S &vd, const VReg2S &vn, const VReg2S &vm) { AdvSimd3Same(0, 8,… function
2364 void CodeGenerator::sshl(const VReg16B &vd, const VReg16B &vn, const VReg16B &vm) { AdvSimd3Same(0,… function
2365 void CodeGenerator::sshl(const VReg8H &vd, const VReg8H &vn, const VReg8H &vm) { AdvSimd3Same(0, 8,… function
2366 void CodeGenerator::sshl(const VReg4S &vd, const VReg4S &vn, const VReg4S &vm) { AdvSimd3Same(0, 8,… function
2367 void CodeGenerator::sshl(const VReg2D &vd, const VReg2D &vn, const VReg2D &vm) { AdvSimd3Same(0, 8,… function
/dports/math/onednn/oneDNN-2.5.1/src/cpu/aarch64/xbyak_aarch64/src/
H A Dxbyak_aarch64_mnemonic.h1441 void CodeGenerator::sshl(const DReg &vd, const DReg &vn, const DReg &vm) { AdvSimdSc3Same(0, 8, vd,… in sshl() function
2361 void CodeGenerator::sshl(const VReg8B &vd, const VReg8B &vn, const VReg8B &vm) { AdvSimd3Same(0, 8,… function
2362 void CodeGenerator::sshl(const VReg4H &vd, const VReg4H &vn, const VReg4H &vm) { AdvSimd3Same(0, 8,… function
2363 void CodeGenerator::sshl(const VReg2S &vd, const VReg2S &vn, const VReg2S &vm) { AdvSimd3Same(0, 8,… function
2364 void CodeGenerator::sshl(const VReg16B &vd, const VReg16B &vn, const VReg16B &vm) { AdvSimd3Same(0,… function
2365 void CodeGenerator::sshl(const VReg8H &vd, const VReg8H &vn, const VReg8H &vm) { AdvSimd3Same(0, 8,… function
2366 void CodeGenerator::sshl(const VReg4S &vd, const VReg4S &vn, const VReg4S &vm) { AdvSimd3Same(0, 8,… function
2367 void CodeGenerator::sshl(const VReg2D &vd, const VReg2D &vn, const VReg2D &vm) { AdvSimd3Same(0, 8,… function
/dports/lang/v8/v8-9.6.180.12/src/execution/arm64/
H A Dsimulator-logic-arm64.cc1544 LogicVRegister Simulator::sshl(VectorFormat vform, LogicVRegister dst, in sshl() function in v8::internal::Simulator
/dports/www/firefox-esr/firefox-91.8.0/js/src/jit/arm64/vixl/
H A DLogic-vixl.cpp1628 LogicVRegister Simulator::sshl(VectorFormat vform, in sshl() function in vixl::Simulator
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/execution/arm64/
H A Dsimulator-logic-arm64.cc1544 LogicVRegister Simulator::sshl(VectorFormat vform, LogicVRegister dst, in sshl() function in v8::internal::Simulator
/dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/execution/arm64/
H A Dsimulator-logic-arm64.cc1544 LogicVRegister Simulator::sshl(VectorFormat vform, LogicVRegister dst, in sshl() function in v8::internal::Simulator
/dports/www/firefox/firefox-99.0/js/src/jit/arm64/vixl/
H A DLogic-vixl.cpp1628 LogicVRegister Simulator::sshl(VectorFormat vform, in sshl() function in vixl::Simulator

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