1 //***************************************************************************** 2 // 3 // aes.h 4 // 5 // Defines and Macros for the AES module. 6 // 7 // Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 8 // 9 // 10 // Redistribution and use in source and binary forms, with or without 11 // modification, are permitted provided that the following conditions 12 // are met: 13 // 14 // Redistributions of source code must retain the above copyright 15 // notice, this list of conditions and the following disclaimer. 16 // 17 // Redistributions in binary form must reproduce the above copyright 18 // notice, this list of conditions and the following disclaimer in the 19 // documentation and/or other materials provided with the 20 // distribution. 21 // 22 // Neither the name of Texas Instruments Incorporated nor the names of 23 // its contributors may be used to endorse or promote products derived 24 // from this software without specific prior written permission. 25 // 26 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 29 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 30 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 31 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 32 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 33 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 34 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 35 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 36 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 37 // 38 //***************************************************************************** 39 40 #ifndef __DRIVERLIB_AES_H__ 41 #define __DRIVERLIB_AES_H__ 42 43 //***************************************************************************** 44 // 45 // If building with a C++ compiler, make all of the definitions in this header 46 // have a C binding. 47 // 48 //***************************************************************************** 49 #ifdef __cplusplus 50 extern "C" 51 { 52 #endif 53 54 //***************************************************************************** 55 // 56 // The following defines are used to specify the operation direction in the 57 // ui32Config argument in the AESConfig function. Only one is permitted. 58 // 59 //***************************************************************************** 60 #define AES_CFG_DIR_ENCRYPT 0x00000004 61 #define AES_CFG_DIR_DECRYPT 0x00000000 62 63 //***************************************************************************** 64 // 65 // The following defines are used to specify the key size in the ui32Config 66 // argument in the AESConfig function. Only one is permitted. 67 // 68 //***************************************************************************** 69 #define AES_CFG_KEY_SIZE_128BIT 0x00000008 70 #define AES_CFG_KEY_SIZE_192BIT 0x00000010 71 #define AES_CFG_KEY_SIZE_256BIT 0x00000018 72 73 //***************************************************************************** 74 // 75 // The following defines are used to specify the mode of operation in the 76 // ui32Config argument in the AESConfig function. Only one is permitted. 77 // 78 //***************************************************************************** 79 #define AES_CFG_MODE_M 0x2007fe60 80 #define AES_CFG_MODE_ECB 0x00000000 81 #define AES_CFG_MODE_CBC 0x00000020 82 #define AES_CFG_MODE_CTR 0x00000040 83 #define AES_CFG_MODE_ICM 0x00000200 84 #define AES_CFG_MODE_CFB 0x00000400 85 #define AES_CFG_MODE_XTS_TWEAKJL \ 86 0x00000800 87 #define AES_CFG_MODE_XTS_K2IJL \ 88 0x00001000 89 #define AES_CFG_MODE_XTS_K2ILJ0 \ 90 0x00001800 91 #define AES_CFG_MODE_F8 0x00002000 92 #define AES_CFG_MODE_F9 0x20004000 93 #define AES_CFG_MODE_CBCMAC 0x20008000 94 #define AES_CFG_MODE_GCM_HLY0ZERO \ 95 0x20010040 96 #define AES_CFG_MODE_GCM_HLY0CALC \ 97 0x20020040 98 #define AES_CFG_MODE_GCM_HY0CALC \ 99 0x20030040 100 #define AES_CFG_MODE_CCM 0x20040040 101 102 //***************************************************************************** 103 // 104 // The following defines are used to specify the counter width in the 105 // ui32Config argument in the AESConfig function. It is only required to 106 // be defined when using CTR, CCM, or GCM modes. Only one length is permitted. 107 // 108 //***************************************************************************** 109 #define AES_CFG_CTR_WIDTH_32 0x00000000 110 #define AES_CFG_CTR_WIDTH_64 0x00000080 111 #define AES_CFG_CTR_WIDTH_96 0x00000100 112 #define AES_CFG_CTR_WIDTH_128 0x00000180 113 114 //***************************************************************************** 115 // 116 // The following defines are used to define the width of the length field for 117 // CCM operation through the ui32Config argument in the AESConfig function. 118 // This value is also known as L. Only one is permitted. 119 // 120 //***************************************************************************** 121 #define AES_CFG_CCM_L_2 0x00080000 122 #define AES_CFG_CCM_L_4 0x00180000 123 #define AES_CFG_CCM_L_8 0x00380000 124 125 //***************************************************************************** 126 // 127 // The following defines are used to define the length of the authentication 128 // field for CCM operations through the ui32Config argument in the AESConfig 129 // function. This value is also known as M. Only one is permitted. 130 // 131 //***************************************************************************** 132 #define AES_CFG_CCM_M_4 0x00400000 133 #define AES_CFG_CCM_M_6 0x00800000 134 #define AES_CFG_CCM_M_8 0x00c00000 135 #define AES_CFG_CCM_M_10 0x01000000 136 #define AES_CFG_CCM_M_12 0x01400000 137 #define AES_CFG_CCM_M_14 0x01800000 138 #define AES_CFG_CCM_M_16 0x01c00000 139 140 //***************************************************************************** 141 // 142 // Interrupt flags for use with the AESIntEnable, AESIntDisable, and 143 // AESIntStatus functions. 144 // 145 //***************************************************************************** 146 #define AES_INT_CONTEXT_IN 0x00000001 147 #define AES_INT_CONTEXT_OUT 0x00000008 148 #define AES_INT_DATA_IN 0x00000002 149 #define AES_INT_DATA_OUT 0x00000004 150 #define AES_INT_DMA_CONTEXT_IN 0x00010000 151 #define AES_INT_DMA_CONTEXT_OUT 0x00020000 152 #define AES_INT_DMA_DATA_IN 0x00040000 153 #define AES_INT_DMA_DATA_OUT 0x00080000 154 155 //***************************************************************************** 156 // 157 // Defines used when enabling and disabling DMA requests in the 158 // AESEnableDMA and AESDisableDMA functions. 159 // 160 //***************************************************************************** 161 #define AES_DMA_DATA_IN 0x00000040 162 #define AES_DMA_DATA_OUT 0x00000020 163 #define AES_DMA_CONTEXT_IN 0x00000080 164 #define AES_DMA_CONTEXT_OUT 0x00000100 165 166 //***************************************************************************** 167 // 168 // Function prototypes. 169 // 170 //***************************************************************************** 171 extern void AESConfigSet(uint32_t ui32Base, uint32_t ui32Config); 172 extern void AESKey1Set(uint32_t ui32Base, uint8_t *pui8Key, 173 uint32_t ui32Keysize); 174 extern void AESKey2Set(uint32_t ui32Base, uint8_t *pui8Key, 175 uint32_t ui32Keysize); 176 extern void AESKey3Set(uint32_t ui32Base, uint8_t *pui8Key); 177 extern void AESIVSet(uint32_t ui32Base, uint8_t *pui8IVdata); 178 extern void AESIVGet(uint32_t ui32Base, uint8_t *pui8IVdata); 179 extern void AESTagRead(uint32_t ui32Base, uint8_t *pui8TagData); 180 extern void AESDataLengthSet(uint32_t ui32Base, uint64_t ui64Length); 181 extern void AESAuthDataLengthSet(uint32_t ui32Base, uint32_t ui32Length); 182 extern bool AESDataReadNonBlocking(uint32_t ui32Base, uint8_t *pui8Dest, 183 uint8_t ui8Length); 184 extern void AESDataRead(uint32_t ui32Base, uint8_t *pui8Dest, 185 uint8_t ui8Length); 186 extern bool AESDataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src, 187 uint8_t ui8Length); 188 extern void AESDataWrite(uint32_t ui32Base, uint8_t *pui8Src, 189 uint8_t ui8Length); 190 extern bool AESDataProcess(uint32_t ui32Base, uint8_t *pui8Src, 191 uint8_t *pui8Dest, 192 uint32_t ui32Length); 193 extern bool AESDataMAC(uint32_t ui32Base, uint8_t *pui8Src, 194 uint32_t ui32Length, 195 uint8_t *pui8Tag); 196 extern bool AESDataProcessAE(uint32_t ui32Base, uint8_t *pui8Src, 197 uint8_t *pui8Dest, uint32_t ui32Length, 198 uint8_t *pui8AuthSrc, uint32_t ui32AuthLength, 199 uint8_t *pui8Tag); 200 extern uint32_t AESIntStatus(uint32_t ui32Base, bool bMasked); 201 extern void AESIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags); 202 extern void AESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags); 203 extern void AESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags); 204 extern void AESIntRegister(uint32_t ui32Base, void(*pfnHandler)(void)); 205 extern void AESIntUnregister(uint32_t ui32Base); 206 extern void AESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags); 207 extern void AESDMADisable(uint32_t ui32Base, uint32_t ui32Flags); 208 209 //***************************************************************************** 210 // 211 // Mark the end of the C bindings section for C++ compilers. 212 // 213 //***************************************************************************** 214 #ifdef __cplusplus 215 } 216 #endif 217 218 #endif // __DRIVERLIB_AES_H__ 219