1 /* $OpenBSD: if_otusreg.h,v 1.12 2020/11/30 16:09:33 krw Exp $ */ 2 3 /*- 4 * Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr> 5 * Copyright (c) 2007-2008 Atheros Communications, Inc. 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* USB Endpoints addresses. */ 21 #define AR_EPT_BULK_TX_NO (UE_DIR_OUT | 1) 22 #define AR_EPT_BULK_RX_NO (UE_DIR_IN | 2) 23 #define AR_EPT_INTR_RX_NO (UE_DIR_IN | 3) 24 #define AR_EPT_INTR_TX_NO (UE_DIR_OUT | 4) 25 26 /* USB Requests. */ 27 #define AR_FW_DOWNLOAD 0x30 28 #define AR_FW_DOWNLOAD_COMPLETE 0x31 29 30 /* Maximum number of writes that can fit in a single FW command is 7. */ 31 #define AR_MAX_WRITE_IDX 6 /* 56 bytes */ 32 33 #define AR_FW_INIT_ADDR 0x102800 34 #define AR_FW_MAIN_ADDR 0x200000 35 #define AR_USB_MODE_CTRL 0x1e1108 36 37 /* 38 * AR9170 MAC registers. 39 */ 40 #define AR_MAC_REG_BASE 0x1c3000 41 #define AR_MAC_REG_MAC_ADDR_L (AR_MAC_REG_BASE + 0x610) 42 #define AR_MAC_REG_MAC_ADDR_H (AR_MAC_REG_BASE + 0x614) 43 #define AR_MAC_REG_BSSID_L (AR_MAC_REG_BASE + 0x618) 44 #define AR_MAC_REG_BSSID_H (AR_MAC_REG_BASE + 0x61c) 45 #define AR_MAC_REG_GROUP_HASH_TBL_L (AR_MAC_REG_BASE + 0x624) 46 #define AR_MAC_REG_GROUP_HASH_TBL_H (AR_MAC_REG_BASE + 0x628) 47 #define AR_MAC_REG_BASIC_RATE (AR_MAC_REG_BASE + 0x630) 48 #define AR_MAC_REG_MANDATORY_RATE (AR_MAC_REG_BASE + 0x634) 49 #define AR_MAC_REG_RTS_CTS_RATE (AR_MAC_REG_BASE + 0x638) 50 #define AR_MAC_REG_BACKOFF_PROTECT (AR_MAC_REG_BASE + 0x63c) 51 #define AR_MAC_REG_RX_THRESHOLD (AR_MAC_REG_BASE + 0x640) 52 #define AR_MAC_REG_RX_PE_DELAY (AR_MAC_REG_BASE + 0x64c) 53 #define AR_MAC_REG_DYNAMIC_SIFS_ACK (AR_MAC_REG_BASE + 0x658) 54 #define AR_MAC_REG_SNIFFER (AR_MAC_REG_BASE + 0x674) 55 #define AR_MAC_REG_ACK_EXTENSION (AR_MAC_REG_BASE + 0x690) 56 #define AR_MAC_REG_EIFS_AND_SIFS (AR_MAC_REG_BASE + 0x698) 57 #define AR_MAC_REG_BUSY (AR_MAC_REG_BASE + 0x6e8) 58 #define AR_MAC_REG_BUSY_EXT (AR_MAC_REG_BASE + 0x6ec) 59 #define AR_MAC_REG_SLOT_TIME (AR_MAC_REG_BASE + 0x6f0) 60 #define AR_MAC_REG_AC0_CW (AR_MAC_REG_BASE + 0xb00) 61 #define AR_MAC_REG_AC1_CW (AR_MAC_REG_BASE + 0xb04) 62 #define AR_MAC_REG_AC2_CW (AR_MAC_REG_BASE + 0xb08) 63 #define AR_MAC_REG_AC3_CW (AR_MAC_REG_BASE + 0xb0c) 64 #define AR_MAC_REG_AC4_CW (AR_MAC_REG_BASE + 0xb10) 65 #define AR_MAC_REG_AC1_AC0_AIFS (AR_MAC_REG_BASE + 0xb14) 66 #define AR_MAC_REG_AC3_AC2_AIFS (AR_MAC_REG_BASE + 0xb18) 67 #define AR_MAC_REG_RETRY_MAX (AR_MAC_REG_BASE + 0xb28) 68 #define AR_MAC_REG_TXOP_NOT_ENOUGH_INDICATION \ 69 (AR_MAC_REG_BASE + 0xb30) 70 #define AR_MAC_REG_AC1_AC0_TXOP (AR_MAC_REG_BASE + 0xb44) 71 #define AR_MAC_REG_AC3_AC2_TXOP (AR_MAC_REG_BASE + 0xb48) 72 #define AR_MAC_REG_OFDM_PHY_ERRORS (AR_MAC_REG_BASE + 0xcb4) 73 #define AR_MAC_REG_CCK_PHY_ERRORS (AR_MAC_REG_BASE + 0xcb8) 74 #define AR_MAC_REG_BCN_HT1 (AR_MAC_REG_BASE + 0xda0) 75 #define AR_MAC_REG_DMA_TRIGGER (AR_MAC_REG_BASE + 0xd30) 76 77 /* Possible values for register AR_MAC_REG_DMA_TRIGGER. */ 78 #define AR_DMA_TRIGGER_TXQ0 0x001 79 #define AR_DMA_TRIGGER_TXQ1 0x002 80 #define AR_DMA_TRIGGER_TXQ2 0x004 81 #define AR_DMA_TRIGGER_TXQ3 0x008 82 #define AR_DMA_TRIGGER_TXQ4 0x010 83 #define AR_DMA_TRIGGER_RXQ 0x100 84 85 /* Possible values for register AR_USB_MODE_CTRL. */ 86 #define AR_USB_DS_ENA (1 << 0) 87 #define AR_USB_US_ENA (1 << 1) 88 #define AR_USB_US_PACKET_MODE (1 << 3) 89 #define AR_USB_RX_STREAM_4K (0 << 4) 90 #define AR_USB_RX_STREAM_8K (1 << 4) 91 #define AR_USB_RX_STREAM_16K (2 << 4) 92 #define AR_USB_RX_STREAM_32K (3 << 4) 93 #define AR_USB_TX_STREAM_MODE (1 << 6) 94 95 #define AR_LED0_ON (1 << 0) 96 #define AR_LED1_ON (1 << 1) 97 98 /* 99 * PHY registers. 100 */ 101 #define AR_PHY_BASE 0x1c5800 102 #define AR_PHY(reg) (AR_PHY_BASE + (reg) * 4) 103 #define AR_PHY_TURBO (AR_PHY_BASE + 0x0004) 104 #define AR_PHY_RF_CTL3 (AR_PHY_BASE + 0x0028) 105 #define AR_PHY_RF_CTL4 (AR_PHY_BASE + 0x0034) 106 #define AR_PHY_SETTLING (AR_PHY_BASE + 0x0044) 107 #define AR_PHY_RXGAIN (AR_PHY_BASE + 0x0048) 108 #define AR_PHY_DESIRED_SZ (AR_PHY_BASE + 0x0050) 109 #define AR_PHY_FIND_SIG (AR_PHY_BASE + 0x0058) 110 #define AR_PHY_AGC_CTL1 (AR_PHY_BASE + 0x005c) 111 #define AR_PHY_SFCORR (AR_PHY_BASE + 0x0068) 112 #define AR_PHY_SFCORR_LOW (AR_PHY_BASE + 0x006c) 113 #define AR_PHY_TIMING_CTRL4 (AR_PHY_BASE + 0x0120) 114 #define AR_PHY_TIMING5 (AR_PHY_BASE + 0x0124) 115 #define AR_PHY_POWER_TX_RATE1 (AR_PHY_BASE + 0x0134) 116 #define AR_PHY_POWER_TX_RATE2 (AR_PHY_BASE + 0x0138) 117 #define AR_PHY_POWER_TX_RATE_MAX (AR_PHY_BASE + 0x013c) 118 #define AR_PHY_SWITCH_CHAIN_0 (AR_PHY_BASE + 0x0160) 119 #define AR_PHY_SWITCH_COM (AR_PHY_BASE + 0x0164) 120 #define AR_PHY_HEAVY_CLIP_ENABLE (AR_PHY_BASE + 0x01e0) 121 #define AR_PHY_CCK_DETECT (AR_PHY_BASE + 0x0a08) 122 #define AR_PHY_GAIN_2GHZ (AR_PHY_BASE + 0x0a0c) 123 #define AR_PHY_POWER_TX_RATE3 (AR_PHY_BASE + 0x0a34) 124 #define AR_PHY_POWER_TX_RATE4 (AR_PHY_BASE + 0x0a38) 125 #define AR_PHY_TPCRG1 (AR_PHY_BASE + 0x0a58) 126 #define AR_PHY_POWER_TX_RATE5 (AR_PHY_BASE + 0x0b8c) 127 #define AR_PHY_POWER_TX_RATE6 (AR_PHY_BASE + 0x0b90) 128 #define AR_PHY_POWER_TX_RATE7 (AR_PHY_BASE + 0x0bcc) 129 #define AR_PHY_POWER_TX_RATE8 (AR_PHY_BASE + 0x0bd0) 130 #define AR_PHY_POWER_TX_RATE9 (AR_PHY_BASE + 0x0bd4) 131 #define AR_PHY_CCA (AR_PHY_BASE + 0x3064) 132 133 #define AR_SEEPROM_HW_TYPE_OFFSET 0x1374 134 #define AR_EEPROM_OFFSET 0x1600 135 136 #define AR_BANK4_CHUP (1 << 0) 137 #define AR_BANK4_BMODE_LF_SYNTH_FREQ (1 << 1) 138 #define AR_BANK4_AMODE_REFSEL(x) ((x) << 2) 139 #define AR_BANK4_ADDR(x) ((x) << 5) 140 141 /* Tx descriptor. */ 142 struct ar_tx_head { 143 uint16_t len; 144 uint16_t macctl; 145 #define AR_TX_MAC_RTS (1 << 0) 146 #define AR_TX_MAC_CTS (1 << 1) 147 #define AR_TX_MAC_BACKOFF (1 << 3) 148 #define AR_TX_MAC_NOACK (1 << 2) 149 #define AR_TX_MAC_HW_DUR (1 << 9) 150 #define AR_TX_MAC_QID(qid) ((qid) << 10) 151 #define AR_TX_MAC_RATE_PROBING (1 << 15) 152 153 uint32_t phyctl; 154 /* Modulation type. */ 155 #define AR_TX_PHY_MT_CCK 0 156 #define AR_TX_PHY_MT_OFDM 1 157 #define AR_TX_PHY_MT_HT 2 158 #define AR_TX_PHY_GF (1 << 2) 159 #define AR_TX_PHY_BW_SHIFT 3 160 #define AR_TX_PHY_TPC_SHIFT 9 161 #define AR_TX_PHY_ANTMSK(msk) ((msk) << 15) 162 #define AR_TX_PHY_MCS(mcs) ((mcs) << 18) 163 #define AR_TX_PHY_SHGI (1U << 31) 164 } __packed; 165 166 /* USB Rx stream mode header. */ 167 struct ar_rx_head { 168 uint16_t len; 169 uint16_t tag; 170 #define AR_RX_HEAD_TAG 0x4e00 171 } __packed; 172 173 /* Rx descriptor. */ 174 struct ar_rx_tail { 175 uint8_t rssi_ant[3]; 176 uint8_t rssi_ant_ext[3]; 177 uint8_t rssi; /* Combined RSSI. */ 178 uint8_t evm[2][6]; /* Error Vector Magnitude. */ 179 uint8_t phy_err; 180 uint8_t sa_idx; 181 uint8_t da_idx; 182 uint8_t error; 183 #define AR_RX_ERROR_TIMEOUT (1 << 0) 184 #define AR_RX_ERROR_OVERRUN (1 << 1) 185 #define AR_RX_ERROR_DECRYPT (1 << 2) 186 #define AR_RX_ERROR_FCS (1 << 3) 187 #define AR_RX_ERROR_BAD_RA (1 << 4) 188 #define AR_RX_ERROR_PLCP (1 << 5) 189 #define AR_RX_ERROR_MMIC (1 << 6) 190 191 uint8_t status; 192 /* Modulation type (same as AR_TX_PHY_MT). */ 193 #define AR_RX_STATUS_MT_MASK 0x3 194 #define AR_RX_STATUS_MT_CCK 0 195 #define AR_RX_STATUS_MT_OFDM 1 196 #define AR_RX_STATUS_MT_HT 2 197 #define AR_RX_STATUS_SHPREAMBLE (1 << 3) 198 } __packed; 199 200 #define AR_PLCP_HDR_LEN 12 201 /* Magic PLCP header for firmware notifications through Rx bulk pipe. */ 202 static uint8_t AR_PLCP_HDR_INTR[] = { 203 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 204 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 205 }; 206 207 /* Firmware command/reply header. */ 208 struct ar_cmd_hdr { 209 uint8_t len; 210 uint8_t code; 211 #define AR_CMD_RREG 0x00 212 #define AR_CMD_WREG 0x01 213 #define AR_CMD_RMEM 0x02 214 #define AR_CMD_WMEM 0x03 215 #define AR_CMD_BITAND 0x04 216 #define AR_CMD_BITOR 0x05 217 #define AR_CMD_EKEY 0x28 218 #define AR_CMD_DKEY 0x29 219 #define AR_CMD_FREQUENCY 0x30 220 #define AR_CMD_RF_INIT 0x31 221 #define AR_CMD_SYNTH 0x32 222 #define AR_CMD_FREQ_STRAT 0x33 223 #define AR_CMD_ECHO 0x80 224 #define AR_CMD_TALLY 0x81 225 #define AR_CMD_TALLY_APD 0x82 226 #define AR_CMD_CONFIG 0x83 227 #define AR_CMD_RESET 0x90 228 #define AR_CMD_DKRESET 0x91 229 #define AR_CMD_DKTX_STATUS 0x92 230 #define AR_CMD_FDC 0xa0 231 #define AR_CMD_WREEPROM 0xb0 232 #define AR_CMD_WFLASH AR_CMD_WREEPROM 233 #define AR_CMD_FLASH_ERASE 0xb1 234 #define AR_CMD_FLASH_PROG 0xb2 235 #define AR_CMD_FLASH_CHKSUM 0xb3 236 #define AR_CMD_FLASH_READ 0xb4 237 #define AR_CMD_FW_DL_INIT 0xb5 238 #define AR_CMD_MEM_WREEPROM 0xbb 239 /* Those have the 2 MSB set to 1. */ 240 #define AR_EVT_BEACON 0x00 241 #define AR_EVT_TX_COMP 0x01 242 #define AR_EVT_TBTT 0x02 243 #define AR_EVT_ATIM 0x03 244 245 uint16_t token; /* Driver private data. */ 246 } __packed; 247 248 /* Structure for command AR_CMD_RF_INIT/AR_CMD_FREQUENCY. */ 249 struct ar_cmd_frequency { 250 uint32_t freq; 251 uint32_t dynht2040; 252 uint32_t htena; 253 uint32_t dsc_exp; 254 uint32_t dsc_man; 255 uint32_t dsc_shgi_exp; 256 uint32_t dsc_shgi_man; 257 uint32_t check_loop_count; 258 } __packed; 259 260 /* Firmware reply for command AR_CMD_FREQUENCY. */ 261 struct ar_rsp_frequency { 262 uint32_t status; 263 #define AR_CAL_ERR_AGC (1 << 0) /* AGC cal unfinished. */ 264 #define AR_CAL_ERR_NF (1 << 1) /* Noise cal unfinished. */ 265 #define AR_CAL_ERR_NF_VAL (1 << 2) /* NF value unexpected. */ 266 267 uint32_t nf[3]; /* Noisefloor. */ 268 uint32_t nf_ext[3]; /* Noisefloor ext. */ 269 } __packed; 270 271 /* Structure for command AR_CMD_EKEY. */ 272 struct ar_cmd_ekey { 273 uint16_t uid; /* user ID */ 274 uint16_t kix; 275 uint16_t cipher; 276 #define AR_CIPHER_NONE 0 277 #define AR_CIPHER_WEP64 1 278 #define AR_CIPHER_TKIP 2 279 #define AR_CIPHER_AES 4 280 #define AR_CIPHER_WEP128 5 281 #define AR_CIPHER_WEP256 6 282 #define AR_CIPHER_CENC 7 283 284 uint8_t macaddr[IEEE80211_ADDR_LEN]; 285 uint8_t key[16]; 286 } __packed; 287 288 /* Structure for event AR_EVT_TX_COMP. */ 289 struct ar_evt_tx_comp { 290 uint8_t macaddr[IEEE80211_ADDR_LEN]; 291 uint32_t phy; 292 uint16_t status; 293 #define AR_TX_STATUS_COMP 0 294 #define AR_TX_STATUS_RETRY_COMP 1 295 #define AR_TX_STATUS_FAILED 2 296 } __packed; 297 298 /* List of supported channels. */ 299 static const uint8_t ar_chans[] = { 300 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 301 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 302 128, 132, 136, 140, 149, 153, 157, 161, 165, 34, 38, 42, 46 303 }; 304 305 /* 306 * This data is automatically generated from the "otus.ini" file. 307 * It is stored in a different way though, to reduce kernel's .rodata 308 * section overhead (5.1KB instead of 8.5KB). 309 */ 310 311 /* NB: apply AR_PHY(). */ 312 static const uint16_t ar5416_phy_regs[] = { 313 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, 0x008, 314 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, 0x010, 0x011, 315 0x012, 0x013, 0x014, 0x015, 0x016, 0x017, 0x018, 0x01a, 0x01b, 316 0x040, 0x041, 0x042, 0x043, 0x045, 0x046, 0x047, 0x048, 0x049, 317 0x04a, 0x04b, 0x04d, 0x04e, 0x04f, 0x051, 0x052, 0x053, 0x055, 318 0x056, 0x058, 0x059, 0x05c, 0x05d, 0x05e, 0x05f, 0x060, 0x061, 319 0x062, 0x063, 0x064, 0x065, 0x066, 0x067, 0x068, 0x069, 0x06a, 320 0x06b, 0x06c, 0x06d, 0x070, 0x071, 0x072, 0x073, 0x074, 0x075, 321 0x076, 0x077, 0x078, 0x079, 0x07a, 0x07b, 0x07c, 0x07f, 0x080, 322 0x081, 0x082, 0x083, 0x084, 0x085, 0x086, 0x087, 0x088, 0x089, 323 0x08a, 0x08b, 0x08c, 0x08d, 0x08e, 0x08f, 0x090, 0x091, 0x092, 324 0x093, 0x094, 0x095, 0x096, 0x097, 0x098, 0x099, 0x09a, 0x09b, 325 0x09c, 0x09d, 0x09e, 0x09f, 0x0a0, 0x0a1, 0x0a2, 0x0a3, 0x0a4, 326 0x0a5, 0x0a6, 0x0a7, 0x0a8, 0x0a9, 0x0aa, 0x0ab, 0x0ac, 0x0ad, 327 0x0ae, 0x0af, 0x0b0, 0x0b1, 0x0b2, 0x0b3, 0x0b4, 0x0b5, 0x0b6, 328 0x0b7, 0x0b8, 0x0b9, 0x0ba, 0x0bb, 0x0bc, 0x0bd, 0x0be, 0x0bf, 329 0x0c0, 0x0c1, 0x0c2, 0x0c3, 0x0c4, 0x0c5, 0x0c6, 0x0c7, 0x0c8, 330 0x0c9, 0x0ca, 0x0cb, 0x0cc, 0x0cd, 0x0ce, 0x0cf, 0x0d0, 0x0d1, 331 0x0d2, 0x0d3, 0x0d4, 0x0d5, 0x0d6, 0x0d7, 0x0d8, 0x0d9, 0x0da, 332 0x0db, 0x0dc, 0x0dd, 0x0de, 0x0df, 0x0e0, 0x0e1, 0x0e2, 0x0e3, 333 0x0e4, 0x0e5, 0x0e6, 0x0e7, 0x0e8, 0x0e9, 0x0ea, 0x0eb, 0x0ec, 334 0x0ed, 0x0ee, 0x0ef, 0x0f0, 0x0f1, 0x0f2, 0x0f3, 0x0f4, 0x0f5, 335 0x0f6, 0x0f7, 0x0f8, 0x0f9, 0x0fa, 0x0fb, 0x0fc, 0x0fd, 0x0fe, 336 0x0ff, 0x100, 0x103, 0x104, 0x105, 0x106, 0x107, 0x108, 0x109, 337 0x10a, 0x10b, 0x10c, 0x10d, 0x10e, 0x10f, 0x13c, 0x13d, 0x13e, 338 0x13f, 0x280, 0x281, 0x282, 0x283, 0x284, 0x285, 0x286, 0x287, 339 0x288, 0x289, 0x28a, 0x28b, 0x28c, 0x28d, 0x28e, 0x28f, 0x290, 340 0x291, 0x292, 0x293, 0x294, 0x295, 0x296, 0x297, 0x298, 0x299, 341 0x29a, 0x29b, 0x29d, 0x29e, 0x29f, 0x2c0, 0x2c1, 0x2c2, 0x2c3, 342 0x2c4, 0x2c5, 0x2c6, 0x2c7, 0x2c8, 0x2c9, 0x2ca, 0x2cb, 0x2cc, 343 0x2cd, 0x2ce, 0x2cf, 0x2d0, 0x2d1, 0x2d2, 0x2d3, 0x2d4, 0x2d5, 344 0x2d6, 0x2e2, 0x2e3, 0x2e4, 0x2e5, 0x2e6, 0x2e7, 0x2e8, 0x2e9, 345 0x2ea, 0x2eb, 0x2ec, 0x2ed, 0x2ee, 0x2ef, 0x2f0, 0x2f1, 0x2f2, 346 0x2f3, 0x2f4, 0x2f5, 0x2f6, 0x2f7, 0x2f8, 0x412, 0x448, 0x458, 347 0x683, 0x69b, 0x812, 0x848, 0x858, 0xa83, 0xa9b, 0xc19, 0xc57, 348 0xc5a, 0xc6f, 0xe9c, 0xed7, 0xed8, 0xed9, 0xeda, 0xedb, 0xedc, 349 0xedd, 0xede, 0xedf, 0xee0, 0xee1 350 }; 351 352 static const uint32_t ar5416_phy_vals_5ghz_20mhz[] = { 353 0x00000007, 0x00000300, 0x00000000, 0xad848e19, 0x7d14e000, 354 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 355 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 356 0x00200400, 0x206a002e, 0x1372161e, 0x001a6a65, 0x1284233c, 357 0x6c48b4e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd10, 358 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 359 0x00000000, 0x000007d0, 0x00000118, 0x10000fff, 0x0510081c, 360 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 361 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 362 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 363 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 364 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 365 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 366 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 367 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 368 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 369 0x00000000, 0x00000040, 0x00000080, 0x000001a1, 0x000001e1, 370 0x00000021, 0x00000061, 0x00000168, 0x000001a8, 0x000001e8, 371 0x00000028, 0x00000068, 0x00000189, 0x000001c9, 0x00000009, 372 0x00000049, 0x00000089, 0x00000170, 0x000001b0, 0x000001f0, 373 0x00000030, 0x00000070, 0x00000191, 0x000001d1, 0x00000011, 374 0x00000051, 0x00000091, 0x000001b8, 0x000001f8, 0x00000038, 375 0x00000078, 0x00000199, 0x000001d9, 0x00000019, 0x00000059, 376 0x00000099, 0x000000d9, 0x000000f9, 0x000000f9, 0x000000f9, 377 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 378 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 379 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 380 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 381 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 382 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 383 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 384 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 385 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 386 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 387 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 388 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 389 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 390 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 391 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 392 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 393 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 394 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 395 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 396 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 397 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 398 0x00000000, 0x00000008, 0x00000440, 0xd6be4788, 0x012e8160, 399 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 400 0x00000400, 0x000009b5, 0x00000000, 0x00000108, 0x3f3f3f3f, 401 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 402 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 403 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a9caa, 404 0x1ce739ce, 0x051701ce, 0x18010000, 0x30032602, 0x48073e06, 405 0x560b4c0a, 0x641a600f, 0x7a4f6e1b, 0x8c5b7e5a, 0x9d0f96cf, 406 0xb51fa69f, 0xcb3fbd07, 0x0000d7bf, 0x00000000, 0x00000000, 407 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 408 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 409 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 410 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 411 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 412 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 413 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a65, 0x0510001c, 414 0x00009b40, 0x012e8160, 0x09249126, 0x00180a65, 0x0510001c, 415 0x00009b40, 0x012e8160, 0x09249126, 0x0001c600, 0x004b6a8e, 416 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 417 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 418 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 419 }; 420 421 #ifdef notyet 422 static const uint32_t ar5416_phy_vals_5ghz_40mhz[] = { 423 0x00000007, 0x000003c4, 0x00000000, 0xad848e19, 0x7d14e000, 424 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 425 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 426 0x00200400, 0x206a002e, 0x13721c1e, 0x001a6a65, 0x1284233c, 427 0x6c48b4e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd10, 428 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 429 0x00000000, 0x000007d0, 0x00000230, 0x10000fff, 0x0510081c, 430 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 431 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 432 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 433 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 434 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 435 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 436 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 437 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 438 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 439 0x00000000, 0x00000040, 0x00000080, 0x000001a1, 0x000001e1, 440 0x00000021, 0x00000061, 0x00000168, 0x000001a8, 0x000001e8, 441 0x00000028, 0x00000068, 0x00000189, 0x000001c9, 0x00000009, 442 0x00000049, 0x00000089, 0x00000170, 0x000001b0, 0x000001f0, 443 0x00000030, 0x00000070, 0x00000191, 0x000001d1, 0x00000011, 444 0x00000051, 0x00000091, 0x000001b8, 0x000001f8, 0x00000038, 445 0x00000078, 0x00000199, 0x000001d9, 0x00000019, 0x00000059, 446 0x00000099, 0x000000d9, 0x000000f9, 0x000000f9, 0x000000f9, 447 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 448 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 449 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 450 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 451 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 452 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 453 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 454 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 455 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 456 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 457 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 458 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 459 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 460 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 461 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 462 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 463 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 464 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 465 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 466 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 467 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 468 0x00000000, 0x00000008, 0x00000440, 0xd6be4788, 0x012e8160, 469 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 470 0x00000400, 0x000009b5, 0x00000000, 0x00000210, 0x3f3f3f3f, 471 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 472 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 473 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a9caa, 474 0x1ce739ce, 0x051701ce, 0x18010000, 0x30032602, 0x48073e06, 475 0x560b4c0a, 0x641a600f, 0x7a4f6e1b, 0x8c5b7e5a, 0x9d0f96cf, 476 0xb51fa69f, 0xcb3fbcbf, 0x0000d7bf, 0x00000000, 0x00000000, 477 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 478 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 479 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 480 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 481 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 482 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 483 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a65, 0x0510001c, 484 0x00009b40, 0x012e8160, 0x09249126, 0x00180a65, 0x0510001c, 485 0x00009b40, 0x012e8160, 0x09249126, 0x0001c600, 0x004b6a8e, 486 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 487 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 488 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 489 }; 490 #endif 491 492 #ifdef notyet 493 static const uint32_t ar5416_phy_vals_2ghz_40mhz[] = { 494 0x00000007, 0x000003c4, 0x00000000, 0xad848e19, 0x7d14e000, 495 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 496 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 497 0x00200400, 0x206a002e, 0x13721c24, 0x00197a68, 0x1284233c, 498 0x6c48b0e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd20, 499 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 500 0x00000000, 0x00000898, 0x00000268, 0x10000fff, 0x0510001c, 501 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 502 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 503 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 504 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 505 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 506 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 507 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 508 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 509 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 510 0x00000000, 0x00000040, 0x00000080, 0x00000141, 0x00000181, 511 0x000001c1, 0x00000001, 0x00000041, 0x000001a8, 0x000001e8, 512 0x00000028, 0x00000068, 0x000000a8, 0x00000169, 0x000001a9, 513 0x000001e9, 0x00000029, 0x00000069, 0x00000190, 0x000001d0, 514 0x00000010, 0x00000050, 0x00000090, 0x00000151, 0x00000191, 515 0x000001d1, 0x00000011, 0x00000051, 0x00000198, 0x000001d8, 516 0x00000018, 0x00000058, 0x00000098, 0x00000159, 0x00000199, 517 0x000001d9, 0x00000019, 0x00000059, 0x00000099, 0x000000d9, 518 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 519 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 520 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 521 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 522 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 523 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 524 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 525 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 526 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 527 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 528 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 529 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 530 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 531 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 532 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 533 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 534 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 535 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 536 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 537 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 538 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 539 0x00000000, 0x0000000e, 0x00000440, 0xd03e4788, 0x012a8160, 540 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 541 0x00000400, 0x000009b5, 0x00000000, 0x00000210, 0x3f3f3f3f, 542 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 543 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 544 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a7caa, 545 0x1ce739ce, 0x051701ce, 0x18010000, 0x2e032402, 0x4a0a3c06, 546 0x621a540b, 0x764f6c1b, 0x845b7a5a, 0x950f8ccf, 0xa5cf9b4f, 547 0xbddfaf1f, 0xd1ffc93f, 0x00000000, 0x00000000, 0x00000000, 548 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 549 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 550 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 551 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 552 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 553 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 554 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a68, 0x0510001c, 555 0x00009b40, 0x012a8160, 0x09249126, 0x00180a68, 0x0510001c, 556 0x00009b40, 0x012a8160, 0x09249126, 0x0001c600, 0x004b6a8e, 557 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 558 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 559 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 560 }; 561 #endif 562 563 static const uint32_t ar5416_phy_vals_2ghz_20mhz[] = { 564 0x00000007, 0x00000300, 0x00000000, 0xad848e19, 0x7d14e000, 565 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 566 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 567 0x00200400, 0x206a002e, 0x137216a4, 0x00197a68, 0x1284233c, 568 0x6c48b0e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd20, 569 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 570 0x00000000, 0x00000898, 0x00000134, 0x10000fff, 0x0510001c, 571 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 572 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 573 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 574 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 575 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 576 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 577 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 578 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 579 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 580 0x00000000, 0x00000040, 0x00000080, 0x00000141, 0x00000181, 581 0x000001c1, 0x00000001, 0x00000041, 0x000001a8, 0x000001e8, 582 0x00000028, 0x00000068, 0x000000a8, 0x00000169, 0x000001a9, 583 0x000001e9, 0x00000029, 0x00000069, 0x00000190, 0x000001d0, 584 0x00000010, 0x00000050, 0x00000090, 0x00000151, 0x00000191, 585 0x000001d1, 0x00000011, 0x00000051, 0x00000198, 0x000001d8, 586 0x00000018, 0x00000058, 0x00000098, 0x00000159, 0x00000199, 587 0x000001d9, 0x00000019, 0x00000059, 0x00000099, 0x000000d9, 588 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 589 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 590 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 591 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 592 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 593 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 594 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 595 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 596 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 597 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 598 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 599 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 600 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 601 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 602 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 603 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 604 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 605 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 606 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 607 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 608 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 609 0x00000000, 0x0000000e, 0x00000440, 0xd03e4788, 0x012a8160, 610 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 611 0x00000400, 0x000009b5, 0x00000000, 0x00000108, 0x3f3f3f3f, 612 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 613 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 614 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a7caa, 615 0x1ce739ce, 0x051701ce, 0x18010000, 0x2e032402, 0x4a0a3c06, 616 0x621a540b, 0x764f6c1b, 0x845b7a5a, 0x950f8ccf, 0xa5cf9b4f, 617 0xbddfaf1f, 0xd1ffc93f, 0x00000000, 0x00000000, 0x00000000, 618 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 619 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 620 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 621 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 622 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 623 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 624 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a68, 0x0510001c, 625 0x00009b40, 0x012a8160, 0x09249126, 0x00180a68, 0x0510001c, 626 0x00009b40, 0x012a8160, 0x09249126, 0x0001c600, 0x004b6a8e, 627 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 628 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 629 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 630 }; 631 632 /* NB: apply AR_PHY(). */ 633 static const uint8_t ar5416_banks_regs[] = { 634 0x2c, 0x38, 0x2c, 0x3b, 0x2c, 0x38, 0x3c, 0x2c, 0x3a, 0x2c, 0x39, 635 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 636 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 637 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 638 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 639 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x38, 0x2c, 0x2c, 640 0x2c, 0x3c 641 }; 642 643 static const uint32_t ar5416_banks_vals_5ghz[] = { 644 0x1e5795e5, 0x02008020, 0x02108421, 0x00000008, 0x0e73ff17, 645 0x00000420, 0x01400018, 0x000001a1, 0x00000001, 0x00000013, 646 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 647 0x00000000, 0x00004000, 0x00006c00, 0x00002c00, 0x00004800, 648 0x00004000, 0x00006000, 0x00001000, 0x00004000, 0x00007c00, 649 0x00007c00, 0x00007c00, 0x00007c00, 0x00007c00, 0x00087c00, 650 0x00007c00, 0x00005400, 0x00000c00, 0x00001800, 0x00007c00, 651 0x00006c00, 0x00006c00, 0x00007c00, 0x00002c00, 0x00003c00, 652 0x00003800, 0x00001c00, 0x00000800, 0x00000408, 0x00004c15, 653 0x00004188, 0x0000201e, 0x00010408, 0x00000801, 0x00000c08, 654 0x0000181e, 0x00001016, 0x00002800, 0x00004010, 0x0000081c, 655 0x00000115, 0x00000015, 0x00000066, 0x0000001c, 0x00000000, 656 0x00000004, 0x00000015, 0x0000001f, 0x00000000, 0x000000a0, 657 0x00000000, 0x00000040, 0x0000001c 658 }; 659 660 static const uint32_t ar5416_banks_vals_2ghz[] = { 661 0x1e5795e5, 0x02008020, 0x02108421, 0x00000008, 0x0e73ff17, 662 0x00000420, 0x01c00018, 0x000001a1, 0x00000001, 0x00000013, 663 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 664 0x00000000, 0x00004000, 0x00006c00, 0x00002c00, 0x00004800, 665 0x00004000, 0x00006000, 0x00001000, 0x00004000, 0x00007c00, 666 0x00007c00, 0x00007c00, 0x00007c00, 0x00007c00, 0x00087c00, 667 0x00007c00, 0x00005400, 0x00000c00, 0x00001800, 0x00007c00, 668 0x00006c00, 0x00006c00, 0x00007c00, 0x00002c00, 0x00003c00, 669 0x00003800, 0x00001c00, 0x00000800, 0x00000408, 0x00004c15, 670 0x00004188, 0x0000201e, 0x00010408, 0x00000801, 0x00000c08, 671 0x0000181e, 0x00001016, 0x00002800, 0x00004010, 0x0000081c, 672 0x00000115, 0x00000015, 0x00000066, 0x0000001c, 0x00000000, 673 0x00000004, 0x00000015, 0x0000001f, 0x00000400, 0x000000a0, 674 0x00000000, 0x00000040, 0x0000001c 675 }; 676 677 /* 678 * EEPROM. 679 */ 680 /* Possible flags for opCapFlags. */ 681 #define AR5416_OPFLAGS_11A 0x01 682 #define AR5416_OPFLAGS_11G 0x02 683 #define AR5416_OPFLAGS_5G_HT40 0x04 684 #define AR5416_OPFLAGS_2G_HT40 0x08 685 #define AR5416_OPFLAGS_5G_HT20 0x10 686 #define AR5416_OPFLAGS_2G_HT20 0x20 687 688 #define AR5416_NUM_5G_CAL_PIERS 8 689 #define AR5416_NUM_2G_CAL_PIERS 4 690 #define AR5416_NUM_5G_20_TARGET_POWERS 8 691 #define AR5416_NUM_5G_40_TARGET_POWERS 8 692 #define AR5416_NUM_2G_CCK_TARGET_POWERS 3 693 #define AR5416_NUM_2G_20_TARGET_POWERS 4 694 #define AR5416_NUM_2G_40_TARGET_POWERS 4 695 #define AR5416_NUM_CTLS 24 696 #define AR5416_NUM_BAND_EDGES 8 697 #define AR5416_NUM_PD_GAINS 4 698 #define AR5416_PD_GAIN_ICEPTS 5 699 #define AR5416_EEPROM_MODAL_SPURS 5 700 #define AR5416_MAX_CHAINS 2 701 702 struct BaseEepHeader { 703 uint16_t length; 704 uint16_t checksum; 705 uint16_t version; 706 uint8_t opCapFlags; 707 uint8_t eepMisc; 708 uint16_t regDmn[2]; 709 uint8_t macAddr[6]; 710 uint8_t rxMask; 711 uint8_t txMask; 712 uint16_t rfSilent; 713 uint16_t blueToothOptions; 714 uint16_t deviceCap; 715 uint32_t binBuildNumber; 716 uint8_t deviceType; 717 uint8_t futureBase[33]; 718 } __packed; 719 720 struct spurChanStruct { 721 uint16_t spurChan; 722 uint8_t spurRangeLow; 723 uint8_t spurRangeHigh; 724 } __packed; 725 726 struct ModalEepHeader { 727 uint32_t antCtrlChain[AR5416_MAX_CHAINS]; 728 uint32_t antCtrlCommon; 729 int8_t antennaGainCh[AR5416_MAX_CHAINS]; 730 uint8_t switchSettling; 731 uint8_t txRxAttenCh[AR5416_MAX_CHAINS]; 732 uint8_t rxTxMarginCh[AR5416_MAX_CHAINS]; 733 uint8_t adcDesiredSize; 734 int8_t pgaDesiredSize; 735 uint8_t xlnaGainCh[AR5416_MAX_CHAINS]; 736 uint8_t txEndToXpaOff; 737 uint8_t txEndToRxOn; 738 uint8_t txFrameToXpaOn; 739 uint8_t thresh62; 740 uint8_t noiseFloorThreshCh[AR5416_MAX_CHAINS]; 741 uint8_t xpdGain; 742 uint8_t xpd; 743 int8_t iqCalICh[AR5416_MAX_CHAINS]; 744 int8_t iqCalQCh[AR5416_MAX_CHAINS]; 745 uint8_t pdGainOverlap; 746 uint8_t ob; 747 uint8_t db; 748 uint8_t xpaBiasLvl; 749 uint8_t pwrDecreaseFor2Chain; 750 uint8_t pwrDecreaseFor3Chain; 751 uint8_t txFrameToDataStart; 752 uint8_t txFrameToPaOn; 753 uint8_t ht40PowerIncForPdadc; 754 uint8_t bswAtten[AR5416_MAX_CHAINS]; 755 uint8_t bswMargin[AR5416_MAX_CHAINS]; 756 uint8_t swSettleHt40; 757 uint8_t futureModal[22]; 758 struct spurChanStruct spurChans[AR5416_EEPROM_MODAL_SPURS]; 759 } __packed; 760 761 struct calDataPerFreq { 762 uint8_t pwrPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]; 763 uint8_t vpdPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]; 764 } __packed; 765 766 struct CalTargetPowerLegacy { 767 uint8_t bChannel; 768 uint8_t tPow2x[4]; 769 } __packed; 770 771 struct CalTargetPowerHt { 772 uint8_t bChannel; 773 uint8_t tPow2x[8]; 774 } __packed; 775 776 struct CalCtlEdges { 777 uint8_t bChannel; 778 uint8_t tPowerFlag; 779 } __packed; 780 781 struct CalCtlData { 782 struct CalCtlEdges ctlEdges[AR5416_MAX_CHAINS][AR5416_NUM_BAND_EDGES]; 783 } __packed; 784 785 struct ar5416eeprom { 786 struct BaseEepHeader baseEepHeader; 787 uint8_t custData[64]; 788 struct ModalEepHeader modalHeader[2]; 789 uint8_t calFreqPier5G[AR5416_NUM_5G_CAL_PIERS]; 790 uint8_t calFreqPier2G[AR5416_NUM_2G_CAL_PIERS]; 791 struct calDataPerFreq calPierData5G[AR5416_MAX_CHAINS] 792 [AR5416_NUM_5G_CAL_PIERS]; 793 struct calDataPerFreq calPierData2G[AR5416_MAX_CHAINS] 794 [AR5416_NUM_2G_CAL_PIERS]; 795 struct CalTargetPowerLegacy calTPow5G[AR5416_NUM_5G_20_TARGET_POWERS]; 796 struct CalTargetPowerHt calTPow5GHT20[AR5416_NUM_5G_20_TARGET_POWERS]; 797 struct CalTargetPowerHt calTPow5GHT40[AR5416_NUM_5G_40_TARGET_POWERS]; 798 struct CalTargetPowerLegacy calTPowCck[AR5416_NUM_2G_CCK_TARGET_POWERS]; 799 struct CalTargetPowerLegacy calTPow2G[AR5416_NUM_2G_20_TARGET_POWERS]; 800 struct CalTargetPowerHt calTPow2GHT20[AR5416_NUM_2G_20_TARGET_POWERS]; 801 struct CalTargetPowerHt calTPow2GHT40[AR5416_NUM_2G_40_TARGET_POWERS]; 802 uint8_t ctlIndex[AR5416_NUM_CTLS]; 803 struct CalCtlData ctlData[AR5416_NUM_CTLS]; 804 uint8_t padding; 805 } __packed; 806 807 808 #define OTUS_TX_DATA_LIST_COUNT 8 809 #define OTUS_RX_DATA_LIST_COUNT 1 810 811 #define OTUS_CMD_TIMEOUT 1000 812 #define OTUS_TX_TIMEOUT 1000 813 814 #define OTUS_UID(aid) (IEEE80211_AID(aid) + 4) 815 816 #define OTUS_MAX_TXCMDSZ 64 817 #define OTUS_RXBUFSZ (8 * 1024) 818 #define OTUS_TXBUFSZ (4 * 1024) 819 820 /* Default EDCA parameters for when QoS is disabled. */ 821 static const struct ieee80211_edca_ac_params otus_edca_def[EDCA_NUM_AC] = { 822 { 4, 10, 3, 0 }, 823 { 4, 10, 7, 0 }, 824 { 3, 4, 2, 94 }, 825 { 2, 3, 2, 47 } 826 }; 827 828 #define OTUS_RIDX_CCK1 0 829 #define OTUS_RIDX_OFDM6 4 830 #define OTUS_RIDX_OFDM24 8 831 #define OTUS_RIDX_MAX 11 832 static const struct otus_rate { 833 uint8_t rate; 834 uint8_t mcs; 835 } otus_rates[] = { 836 { 2, 0x0 }, 837 { 4, 0x1 }, 838 { 11, 0x2 }, 839 { 22, 0x3 }, 840 { 12, 0xb }, 841 { 18, 0xf }, 842 { 24, 0xa }, 843 { 36, 0xe }, 844 { 48, 0x9 }, 845 { 72, 0xd }, 846 { 96, 0x8 }, 847 { 108, 0xc } 848 }; 849 850 struct otus_rx_radiotap_header { 851 struct ieee80211_radiotap_header wr_ihdr; 852 uint8_t wr_flags; 853 uint8_t wr_rate; 854 uint16_t wr_chan_freq; 855 uint16_t wr_chan_flags; 856 uint8_t wr_antsignal; 857 } __packed; 858 859 #define OTUS_RX_RADIOTAP_PRESENT \ 860 (1 << IEEE80211_RADIOTAP_FLAGS | \ 861 1 << IEEE80211_RADIOTAP_RATE | \ 862 1 << IEEE80211_RADIOTAP_CHANNEL | \ 863 1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL) 864 865 struct otus_tx_radiotap_header { 866 struct ieee80211_radiotap_header wt_ihdr; 867 uint8_t wt_flags; 868 uint8_t wt_rate; 869 uint16_t wt_chan_freq; 870 uint16_t wt_chan_flags; 871 } __packed; 872 873 #define OTUS_TX_RADIOTAP_PRESENT \ 874 (1 << IEEE80211_RADIOTAP_FLAGS | \ 875 1 << IEEE80211_RADIOTAP_RATE | \ 876 1 << IEEE80211_RADIOTAP_CHANNEL) 877 878 struct otus_softc; 879 880 struct otus_tx_cmd { 881 struct usbd_xfer *xfer; 882 uint8_t *buf; 883 void *odata; 884 uint16_t token; 885 uint8_t done; 886 }; 887 888 struct otus_rx_data { 889 struct otus_softc *sc; 890 struct usbd_xfer *xfer; 891 uint8_t *buf; 892 }; 893 894 struct otus_tx_data { 895 struct otus_softc *sc; 896 struct usbd_xfer *xfer; 897 uint8_t *buf; 898 }; 899 900 struct otus_host_cmd { 901 void (*cb)(struct otus_softc *, void *); 902 uint8_t data[256]; 903 }; 904 905 #define OTUS_HOST_CMD_RING_COUNT 32 906 struct otus_host_cmd_ring { 907 struct otus_host_cmd cmd[OTUS_HOST_CMD_RING_COUNT]; 908 int cur; 909 int next; 910 int queued; 911 }; 912 913 struct otus_node { 914 struct ieee80211_node ni; 915 struct ieee80211_amrr_node amn; 916 uint8_t ridx[IEEE80211_RATE_MAXSIZE]; 917 }; 918 919 struct otus_cmd_newstate { 920 enum ieee80211_state state; 921 int arg; 922 }; 923 924 struct otus_cmd_key { 925 struct ieee80211_key key; 926 struct ieee80211_node *ni; 927 }; 928 929 struct otus_softc { 930 struct device sc_dev; 931 struct ieee80211com sc_ic; 932 int (*sc_newstate)(struct ieee80211com *, 933 enum ieee80211_state, int); 934 void (*sc_led_newstate)(struct otus_softc *); 935 936 struct usbd_device *sc_udev; 937 struct usbd_interface *sc_iface; 938 939 struct ar5416eeprom eeprom; 940 uint8_t capflags; 941 uint8_t rxmask; 942 uint8_t txmask; 943 944 struct usbd_pipe *data_tx_pipe; 945 struct usbd_pipe *data_rx_pipe; 946 struct usbd_pipe *cmd_tx_pipe; 947 struct usbd_pipe *cmd_rx_pipe; 948 uint8_t *ibuf; 949 size_t ibuflen; 950 951 int sc_if_flags; 952 int sc_tx_timer; 953 int fixed_ridx; 954 int bb_reset; 955 956 struct ieee80211_channel *sc_curchan; 957 958 struct usb_task sc_task; 959 struct timeout scan_to; 960 struct timeout calib_to; 961 struct ieee80211_amrr amrr; 962 963 int write_idx; 964 int tx_cur; 965 int tx_queued; 966 uint32_t led_state; 967 968 const uint32_t *phy_vals; 969 970 struct { 971 uint32_t reg; 972 uint32_t val; 973 } __packed write_buf[AR_MAX_WRITE_IDX + 1]; 974 975 struct otus_host_cmd_ring cmdq; 976 struct otus_tx_cmd tx_cmd; 977 struct otus_tx_data tx_data[OTUS_TX_DATA_LIST_COUNT]; 978 struct otus_rx_data rx_data[OTUS_RX_DATA_LIST_COUNT]; 979 980 #if NBPFILTER > 0 981 caddr_t sc_drvbpf; 982 983 union { 984 struct otus_rx_radiotap_header th; 985 uint8_t pad[64]; 986 } sc_rxtapu; 987 #define sc_rxtap sc_rxtapu.th 988 int sc_rxtap_len; 989 990 union { 991 struct otus_tx_radiotap_header th; 992 uint8_t pad[64]; 993 } sc_txtapu; 994 #define sc_txtap sc_txtapu.th 995 int sc_txtap_len; 996 #endif 997 int sc_key_tasks; 998 }; 999