1 /*
2  *	HT Editor
3  *	avropc.cc
4  *
5  *	Copyright (C) 2003 Sebastian Biallas (sb@biallas.net)
6  *
7  *	This program is free software; you can redistribute it and/or modify
8  *	it under the terms of the GNU General Public License version 2 as
9  *	published by the Free Software Foundation.
10  *
11  *	This program is distributed in the hope that it will be useful,
12  *	but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *	GNU General Public License for more details.
15  *
16  *	You should have received a copy of the GNU General Public License
17  *	along with this program; if not, write to the Free Software
18  *	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19  */
20 
21 #ifndef __AVR_OPC_H__
22 #define __AVR_OPC_H__
23 
24 #include "io/types.h"
25 
26 struct avr_opcode
27 {
28 	/* The opcode name.  */
29 	const char *name;
30 
31 	uint32 mask;
32 
33 	uint32 opcode;
34 
35 	/* An array of operand codes.  Each code is an index into the
36 	   operand table.  They appear in the order which the operands must
37 	   appear in assembly code, and are terminated by a zero.  */
38 	byte operands[8];
39 };
40 
41 /* The table itself is sorted by major opcode number, and is otherwise
42    in the order in which the disassembler should consider
43    instructions.  */
44 extern const struct avr_opcode avr_opcodes[];
45 extern const int avr_num_opcodes;
46 
47 /* Values defined for the flags field of a struct powerpc_opcode.  */
48 
49 
50 /* A macro to extract the major opcode from an instruction.  */
51 //#define PPC_OP(i) (((i) >> 26) & 0x3f)
52 
53 /* The operands table is an array of struct powerpc_operand.  */
54 
55 struct avr_operand
56 {
57 	/* The number of bits in the operand.  */
58 	byte bits;
59 
60 	/* How far the operand is left shifted in the instruction.  */
61 	byte shift;
62 
63 	byte add;
64 
65 	byte scale;
66 
67 	/* Extraction function.  This is used by the disassembler.  To
68 	   extract this operand type from an instruction, check this field.
69 
70 	If it is NULL, compute
71 	    op = ((i) >> o->shift) & ((1 << o->bits) - 1);
72 	 if ((o->flags & PPC_OPERAND_SIGNED) != 0
73 		&& (op & (1 << (o->bits - 1))) != 0)
74 	   op -= 1 << o->bits;
75 	(i is the instruction, o is a pointer to this structure, and op
76 	is the result; this assumes twos complement arithmetic).
77 
78 	If this field is not NULL, then simply call it with the
79 	instruction value.  It will return the value of the operand.  If
80 	the INVALID argument is not NULL, *INVALID will be set to
81 	non-zero if this operand type can not actually be extracted from
82 	this operand (i.e., the instruction does not match).  If the
83 	operand is valid, *INVALID will not be changed.  */
84 
85 	uint32 (*extract)(uint32 instruction, bool *invalid);
86 
87 	/* One bit syntax flags.  */
88 	uint32 flags;
89 };
90 
91 /* Elements in the table are retrieved by indexing with values from
92    the operands field of the powerpc_opcodes table.  */
93 
94 extern const struct avr_operand avr_operands[];
95 
96 
97 #define AVR_OPERAND_X   1
98 #define AVR_OPERAND_XP  2
99 #define AVR_OPERAND_XM  3
100 #define AVR_OPERAND_Y   4
101 #define AVR_OPERAND_YP  5
102 #define AVR_OPERAND_YM  6
103 #define AVR_OPERAND_Yq  7
104 #define AVR_OPERAND_Z   8
105 #define AVR_OPERAND_ZP  9
106 #define AVR_OPERAND_ZM  10
107 #define AVR_OPERAND_Zq  11
108 #define AVR_OPERAND_XYZ_MASK 0xf
109 #define AVR_OPERAND_GPR   16
110 #define AVR_OPERAND_GPR_2 32
111 #define AVR_OPERAND_IMM   64
112 #define AVR_OPERAND_FAKE   128
113 #define AVR_OPERAND_SIGNED 256
114 #define AVR_OPERAND_ABS   512
115 #define AVR_OPERAND_REL   1024
116 
117 #endif
118