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Searched defs:AZALIA_MEM_PWR_CTRL__AZ_INPUT_STREAM4_MEM_PWR_DIS_MASK (Results 1 – 5 of 5) sorted by last modified time

/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h8186 #define AZALIA_MEM_PWR_CTRL__AZ_INPUT_STREAM4_MEM_PWR_DIS_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_sh_mask.h7051 #define AZALIA_MEM_PWR_CTRL__AZ_INPUT_STREAM4_MEM_PWR_DIS_MASK … macro
H A Ddce_11_2_sh_mask.h13911 #define AZALIA_MEM_PWR_CTRL__AZ_INPUT_STREAM4_MEM_PWR_DIS_MASK 0x20000 macro
H A Ddce_10_0_sh_mask.h13289 #define AZALIA_MEM_PWR_CTRL__AZ_INPUT_STREAM4_MEM_PWR_DIS_MASK 0x20000 macro
H A Ddce_11_0_sh_mask.h13295 #define AZALIA_MEM_PWR_CTRL__AZ_INPUT_STREAM4_MEM_PWR_DIS_MASK 0x20000 macro