| /dports/lang/go-devel/go-becaeea1199b875bc24800fa88f2f4fea119bf78/test/codegen/ |
| H A D | mathbits.go | 434 func AddR(x, y, ci uint) uint { func
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| /dports/print/fontforge/fontforge-20201107/fontforgeexe/ |
| H A D | startui.c | 715 static void AddR(char *program_name, char *window_name, char *cmndline_val) { in AddR() function
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 Register AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
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| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 Register AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 Register AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 Register AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 Register AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 Register AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 Register AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 Register AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 Register AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 Register AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 Register AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 Register AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 Register AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 953 unsigned AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 unsigned AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 unsigned AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 954 Register AddR = MRI->createVirtualRegister(IntRC); in computeCount() local
|
| /dports/science/openmx/openmx3.8/source/ |
| H A D | Unfolding_Bands.c | 2630 int AddR(const int a,const int b,const int c) { if (MapR(a,b,c)==-1) { in AddR() function
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| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/mips/ |
| H A D | sim-main.h | 739 #define AddR(op1,op2,fmt) fp_add_r(SIM_ARGS, op1, op2, fmt) macro
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/mips/ |
| H A D | sim-main.h | 739 #define AddR(op1,op2,fmt) fp_add_r(SIM_ARGS, op1, op2, fmt) macro
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/mips/ |
| H A D | sim-main.h | 785 #define AddR(op1,op2,fmt) fp_add_r(SIM_ARGS, op1, op2, fmt) macro
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| /dports/devel/gdb761/gdb-7.6.1/sim/mips/ |
| H A D | sim-main.h | 784 #define AddR(op1,op2,fmt) fp_add_r(SIM_ARGS, op1, op2, fmt) macro
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| /dports/devel/trellis/prjtrellis-5eb0ad87/timing/resource/ |
| H A D | nescore.v | 1305 wire [7:0] AddR; net
|