1 /** @file 2 HDAUDIO policy 3 4 Copyright (c) 2019 Intel Corporation. All rights reserved. <BR> 5 6 SPDX-License-Identifier: BSD-2-Clause-Patent 7 **/ 8 9 #ifndef _HDAUDIO_CONFIG_H_ 10 #define _HDAUDIO_CONFIG_H_ 11 12 #include <ConfigBlock.h> 13 #include <PchHda.h> 14 #include <Uefi.h> 15 16 #define HDAUDIO_PREMEM_CONFIG_REVISION 1 17 #define HDAUDIO_CONFIG_REVISION 2 18 #define HDAUDIO_DXE_CONFIG_REVISION 2 19 20 extern EFI_GUID gHdAudioPreMemConfigGuid; 21 extern EFI_GUID gHdAudioConfigGuid; 22 extern EFI_GUID gHdAudioDxeConfigGuid; 23 24 #pragma pack (push,1) 25 26 /// 27 /// The PCH_HDAUDIO_CONFIG block describes the expected configuration of the Intel HD Audio feature. 28 /// 29 30 #define HDAUDIO_VERB_TABLE_VIDDID(Vid,Did) (UINT32)((UINT16)Vid | ((UINT16)Did << 16)) 31 #define HDAUDIO_VERB_TABLE_RID_SDI_SIZE(Rid,Sdi,VerbTableSize) (UINT32)((UINT8)Rid | ((UINT8)Sdi << 8) | ((UINT16)VerbTableSize << 16)) 32 #define HDAUDIO_VERB_TABLE_CMD_SIZE(VerbTable) ((sizeof (VerbTable) - sizeof (PCH_HDA_VERB_TABLE_HEADER)) / (sizeof (UINT32))) 33 34 /// 35 /// Use this macro to create HDAUDIO_VERB_TABLE and populate size automatically 36 /// 37 #define HDAUDIO_VERB_TABLE_INIT(Vid,Did,Rid,Sdi,...) \ 38 { \ 39 { Vid, Did, Rid, Sdi, (sizeof((UINT32[]){__VA_ARGS__})/sizeof(UINT32)) }, \ 40 { __VA_ARGS__ } \ 41 } 42 43 44 /** 45 Azalia verb table header 46 Every verb table should contain this defined header and followed by azalia verb commands. 47 **/ 48 typedef struct { 49 UINT16 VendorId; ///< Codec Vendor ID 50 UINT16 DeviceId; ///< Codec Device ID 51 UINT8 RevisionId; ///< Revision ID of the codec. 0xFF matches any revision. 52 UINT8 SdiNum; ///< SDI number, 0xFF matches any SDI. 53 UINT16 DataDwords; ///< Number of data DWORDs following the header. 54 } PCH_HDA_VERB_TABLE_HEADER; 55 56 #ifdef _MSC_VER 57 // 58 // Disable "zero-sized array in struct/union" extension warning. 59 // Used for neater verb table definitions. 60 // 61 #pragma warning (push) 62 #pragma warning (disable: 4200) 63 #endif 64 typedef struct { 65 PCH_HDA_VERB_TABLE_HEADER Header; 66 UINT32 Data[]; 67 } HDAUDIO_VERB_TABLE; 68 #ifdef _MSC_VER 69 #pragma warning (pop) 70 #endif 71 72 /** 73 This structure contains the policies which are related to HD Audio device (cAVS). 74 75 <b>Revision 1:</b> 76 - Inital version. 77 <b>Revision 2:</b> 78 - Move DspEndpointDmic, DspEndpointBluetooth, DspEndpointI2s and DspFeatureMask to PCH_HDAUDIO_DXE_CONFIG 79 **/ 80 typedef struct { 81 CONFIG_BLOCK_HEADER Header; ///< Config Block Header 82 UINT32 DspEnable : 1; ///< DSP enablement: 0: Disable; <b>1: Enable</b> 83 UINT32 Pme : 1; ///< Azalia wake-on-ring, <b>0: Disable</b>; 1: Enable 84 UINT32 VcType : 1; ///< Virtual Channel Type Select: <b>0: VC0</b>, 1: VC1 85 UINT32 HdAudioLinkFrequency : 4; ///< HDA-Link frequency (PCH_HDAUDIO_LINK_FREQUENCY enum): <b>2: 24MHz</b>, 1: 12MHz, 0: 6MHz 86 UINT32 IDispLinkFrequency : 4; ///< iDisp-Link frequency (PCH_HDAUDIO_LINK_FREQUENCY enum): <b>4: 96MHz</b>, 3: 48MHz 87 UINT32 IDispLinkTmode : 3; ///< iDisp-Link T-Mode (PCH_HDAUDIO_IDISP_TMODE enum): <b>0: 2T</b>, 1: 1T, 2: 4T, 3: 8T, 4: 16T 88 /** 89 Universal Audio Architecture compliance for DSP enabled system: 90 <b>0: Not-UAA Compliant (Intel SST driver supported only)</b>, 91 1: UAA Compliant (HDA Inbox driver or SST driver supported) 92 **/ 93 UINT32 DspUaaCompliance : 1; 94 UINT32 IDispCodecDisconnect : 1; ///< iDisplay Audio Codec disconnection, <b>0: Not disconnected, enumerable</b>; 1: Disconnected SDI, not enumerable 95 UINT32 CodecSxWakeCapability : 1; ///< Capability to detect wake initiated by a codec in Sx (eg by modem codec), <b>0: Disable</b>; 1: Enable 96 /** 97 Audio Link Mode configuration bitmask. 98 Allows to configure enablement of the following interfaces: HDA-Link, DMIC, SSP, SoundWire. 99 **/ 100 UINT32 AudioLinkHda : 1; ///< HDA-Link enablement: 0: Disable; <b>1: Enable</b>. Muxed with SSP0/SSP1/SNDW1 101 UINT32 AudioLinkDmic0 : 1; ///< DMIC0 link enablement: 0: Disable; <b>1: Enable</b>. Muxed with SNDW4 102 UINT32 AudioLinkDmic1 : 1; ///< DMIC1 link enablement: 0: Disable; <b>1: Enable</b>. Muxed with SNDW3 103 UINT32 AudioLinkSsp0 : 1; ///< I2S/SSP0 link enablement: <b>0: Disable</b>; 1: Enable. Muxed with HDA SDI0 104 UINT32 AudioLinkSsp1 : 1; ///< I2S/SSP1 link enablement: <b>0: Disable</b>; 1: Enable. Muxed with HDA SDI1/SNDW2 105 /** 106 I2S/SSP2 link enablement: <b>0: Disable</b>; 1: Enable. 107 @note Since the I2S/SSP2 pin set contains pads which are also used for CNVi purpose, enabling AudioLinkSsp2 108 is exclusive with CNVi is present. 109 **/ 110 UINT32 AudioLinkSsp2 : 1; 111 UINT32 AudioLinkSndw1 : 1; ///< SoundWire1 link enablement: <b>0: Disable</b>; 1: Enable. Muxed with HDA 112 UINT32 AudioLinkSndw2 : 1; ///< SoundWire2 link enablement: <b>0: Disable</b>; 1: Enable. Muxed with SSP1 113 UINT32 AudioLinkSndw3 : 1; ///< SoundWire3 link enablement: <b>0: Disable</b>; 1: Enable. Muxed with DMIC1 114 UINT32 AudioLinkSndw4 : 1; ///< SoundWire4 link enablement: <b>0: Disable</b>; 1: Enable. Muxed with DMIC0 115 /** 116 Soundwire Clock Buffer GPIO RCOMP adjustments based on bus topology: 117 <b>0: non-ACT</b> - 50 Ohm driver impedance when bus topology does not have the external AC termination; 118 1: ACT - 8 Ohm driver impedance when bus topology has the external AC termination. 119 **/ 120 UINT32 SndwBufferRcomp : 1; 121 UINT32 RsvdBits0 : 4; ///< Reserved bits 0 122 UINT16 ResetWaitTimer; ///< <b>(Test)</b> The delay timer after Azalia reset, the value is number of microseconds. Default is <b>600</b>. 123 UINT8 Rsvd0; ///< Reserved bytes, align to multiple 4 124 /** 125 Number of the verb table entry defined in VerbTablePtr. 126 Each entry points to a verb table which contains HDAUDIO_VERB_TABLE structure and verb command blocks. 127 **/ 128 UINT8 VerbTableEntryNum; 129 /** 130 Pointer to a verb table array. 131 This pointer points to 32bits address, and is only eligible and consumed in post mem phase. 132 Each entry points to a verb table which contains HDAUDIO_VERB_TABLE structure and verb command blocks. 133 The prototype of this is: 134 HDAUDIO_VERB_TABLE **VerbTablePtr; 135 **/ 136 UINT32 VerbTablePtr; 137 } PCH_HDAUDIO_CONFIG; 138 139 /** 140 This structure contains the premem policies which are related to HD Audio device (cAVS). 141 142 <b>Revision 1:</b> 143 - Inital version. 144 **/ 145 typedef struct { 146 CONFIG_BLOCK_HEADER Header; ///< Config Block Header 147 UINT32 Enable : 1; ///< Intel HD Audio (Azalia) enablement: 0: Disable, <b>1: Enable</b> 148 UINT32 RsvdBits : 31; ///< Reserved bits 0 149 } PCH_HDAUDIO_PREMEM_CONFIG; 150 151 /** 152 This structure contains the DXE policies which are related to HD Audio device (cAVS). 153 154 <b>Revision 1:</b> 155 - Inital version. 156 <b>Revision 2:</b> 157 - Add NhltDefaultFlow option for disabling NHLT flow from Si code. 158 **/ 159 typedef struct { 160 CONFIG_BLOCK_HEADER Header; ///< Config Block Header 161 /** 162 AudioDSP/iSST endpoints configuration exposed via NHLT ACPI table: 163 **/ 164 UINT32 DspEndpointDmic : 2; ///< DMIC Select (PCH_HDAUDIO_DMIC_TYPE enum): 0: Disable; 1: 2ch array; <b>2: 4ch array</b>; 3: 1ch array 165 UINT32 DspEndpointBluetooth : 1; ///< Bluetooth enablement: <b>0: Disable</b>; 1: Enable 166 UINT32 DspEndpointI2s : 1; ///< I2S enablement: <b>0: Disable</b>; 1: Enable 167 UINT32 NhltDefaultFlow : 1; ///< Default Nhlt flow: 0: Disable, <b>1: Enable</b> 168 UINT32 RsvdBits1 : 27; ///< Reserved bits 1 169 /** 170 Bitmask of supported DSP features: 171 [BIT0] - WoV; [BIT1] - BT Sideband; [BIT2] - Codec VAD; [BIT5] - BT Intel HFP; [BIT6] - BT Intel A2DP 172 [BIT7] - DSP based speech pre-processing disabled; [BIT8] - 0: Intel WoV, 1: Windows Voice Activation 173 Default is <b>zero</b>. 174 **/ 175 UINT32 DspFeatureMask; 176 } PCH_HDAUDIO_DXE_CONFIG; 177 178 #pragma pack (pop) 179 180 #endif // _HDAUDIO_CONFIG_H_ 181