1/* 2 3 BLIS 4 An object-based framework for developing high-performance BLAS-like 5 libraries. 6 7 Copyright (C) 2014, The University of Texas at Austin 8 Copyright (C) 2018 - 2019, Advanced Micro Devices, Inc. 9 10 Redistribution and use in source and binary forms, with or without 11 modification, are permitted provided that the following conditions are 12 met: 13 - Redistributions of source code must retain the above copyright 14 notice, this list of conditions and the following disclaimer. 15 - Redistributions in binary form must reproduce the above copyright 16 notice, this list of conditions and the following disclaimer in the 17 documentation and/or other materials provided with the distribution. 18 - Neither the name(s) of the copyright holder(s) nor the names of its 19 contributors may be used to endorse or promote products derived 20 from this software without specific prior written permission. 21 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 23 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 24 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 25 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 26 HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 27 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 28 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 32 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 34*/ 35 36#ifndef BLIS_CONFIG_H 37#define BLIS_CONFIG_H 38 39// Enabled configuration "family" (config_name) 40@config_name_define@ 41 42// Enabled sub-configurations (config_list) 43@config_list_defines@ 44 45// Enabled kernel sets (kernel_list) 46@kernel_list_defines@ 47 48#if @enable_system@ 49#define BLIS_ENABLE_SYSTEM 50#else 51#define BLIS_DISABLE_SYSTEM 52#endif 53 54#if @enable_openmp@ 55#define BLIS_ENABLE_OPENMP 56#endif 57 58#if @enable_pthreads@ 59#define BLIS_ENABLE_PTHREADS 60#endif 61 62#if @enable_jrir_slab@ 63#define BLIS_ENABLE_JRIR_SLAB 64#endif 65 66#if @enable_jrir_rr@ 67#define BLIS_ENABLE_JRIR_RR 68#endif 69 70#if @enable_pba_pools@ 71#define BLIS_ENABLE_PBA_POOLS 72#else 73#define BLIS_DISABLE_PBA_POOLS 74#endif 75 76#if @enable_sba_pools@ 77#define BLIS_ENABLE_SBA_POOLS 78#else 79#define BLIS_DISABLE_SBA_POOLS 80#endif 81 82#if @enable_mem_tracing@ 83#define BLIS_ENABLE_MEM_TRACING 84#else 85#define BLIS_DISABLE_MEM_TRACING 86#endif 87 88#if @int_type_size@ == 64 89#define BLIS_INT_TYPE_SIZE 64 90#elif @int_type_size@ == 32 91#define BLIS_INT_TYPE_SIZE 32 92#else 93// determine automatically 94#endif 95 96#if @blas_int_type_size@ == 64 97#define BLIS_BLAS_INT_TYPE_SIZE 64 98#elif @blas_int_type_size@ == 32 99#define BLIS_BLAS_INT_TYPE_SIZE 32 100#else 101// determine automatically 102#endif 103 104#ifndef BLIS_ENABLE_BLAS 105#ifndef BLIS_DISABLE_BLAS 106#if @enable_blas@ 107#define BLIS_ENABLE_BLAS 108#else 109#define BLIS_DISABLE_BLAS 110#endif 111#endif 112#endif 113 114#ifndef BLIS_ENABLE_CBLAS 115#ifndef BLIS_DISABLE_CBLAS 116#if @enable_cblas@ 117#define BLIS_ENABLE_CBLAS 118#else 119#define BLIS_DISABLE_CBLAS 120#endif 121#endif 122#endif 123 124#ifndef BLIS_ENABLE_MIXED_DT 125#ifndef BLIS_DISABLE_MIXED_DT 126#if @enable_mixed_dt@ 127#define BLIS_ENABLE_MIXED_DT 128#else 129#define BLIS_DISABLE_MIXED_DT 130#endif 131#endif 132#endif 133 134#ifndef BLIS_ENABLE_MIXED_DT_EXTRA_MEM 135#ifndef BLIS_DISABLE_MIXED_DT_EXTRA_MEM 136#if @enable_mixed_dt_extra_mem@ 137#define BLIS_ENABLE_MIXED_DT_EXTRA_MEM 138#else 139#define BLIS_DISABLE_MIXED_DT_EXTRA_MEM 140#endif 141#endif 142#endif 143 144#if @enable_sup_handling@ 145#define BLIS_ENABLE_SUP_HANDLING 146#else 147#define BLIS_DISABLE_SUP_HANDLING 148#endif 149 150#if @enable_memkind@ 151#define BLIS_ENABLE_MEMKIND 152#else 153#define BLIS_DISABLE_MEMKIND 154#endif 155 156#if @enable_trsm_preinversion@ 157#define BLIS_ENABLE_TRSM_PREINVERSION 158#else 159#define BLIS_DISABLE_TRSM_PREINVERSION 160#endif 161 162#if @enable_pragma_omp_simd@ 163#define BLIS_ENABLE_PRAGMA_OMP_SIMD 164#else 165#define BLIS_DISABLE_PRAGMA_OMP_SIMD 166#endif 167 168#if @enable_sandbox@ 169#define BLIS_ENABLE_SANDBOX 170#else 171#define BLIS_DISABLE_SANDBOX 172#endif 173 174#if @enable_shared@ 175#define BLIS_ENABLE_SHARED 176#else 177#define BLIS_DISABLE_SHARED 178#endif 179 180#if @complex_return_intel@ 181#define BLIS_ENABLE_COMPLEX_RETURN_INTEL 182#else 183#define BLIS_DISABLE_COMPLEX_RETURN_INTEL 184#endif 185 186 187#endif 188