xref: /freebsd/sys/dev/cxgb/cxgb_osdep.h (revision 78d14616)
1 /**************************************************************************
2 SPDX-License-Identifier: BSD-2-Clause
3 
4 Copyright (c) 2007, Chelsio Inc.
5 All rights reserved.
6 
7 Redistribution and use in source and binary forms, with or without
8 modification, are permitted provided that the following conditions are met:
9 
10  1. Redistributions of source code must retain the above copyright notice,
11     this list of conditions and the following disclaimer.
12 
13  2. Neither the name of the Chelsio Corporation nor the names of its
14     contributors may be used to endorse or promote products derived from
15     this software without specific prior written permission.
16 
17 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 POSSIBILITY OF SUCH DAMAGE.
28 
29 ***************************************************************************/
30 
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/ctype.h>
34 #include <sys/endian.h>
35 #include <sys/bus.h>
36 
37 #include <sys/lock.h>
38 #include <sys/mutex.h>
39 
40 #include <sys/kdb.h>
41 
42 #include <dev/mii/mii.h>
43 
44 #ifndef _CXGB_OSDEP_H_
45 #define _CXGB_OSDEP_H_
46 
47 typedef struct adapter adapter_t;
48 typedef struct port_info pinfo_t;
49 struct sge_rspq;
50 
51 enum {
52 	TP_TMR_RES = 200,	/* TP timer resolution in usec */
53 	MAX_NPORTS = 4,		/* max # of ports */
54 	TP_SRAM_OFFSET = 4096,	/* TP SRAM content offset in eeprom */
55 	TP_SRAM_LEN = 2112,	/* TP SRAM content offset in eeprom */
56 };
57 
58 struct t3_mbuf_hdr {
59 	struct mbuf *mh_head;
60 	struct mbuf *mh_tail;
61 };
62 
63 #ifndef PANIC_IF
64 #define PANIC_IF(exp) do {                  \
65 	if (exp)                            \
66 		panic("BUG: %s", #exp);      \
67 } while (0)
68 #endif
69 
70 /*
71  * Workaround for weird Chelsio issue
72  */
73 #define PRIV_SUPPORTED
74 
75 #define CXGB_TX_CLEANUP_THRESHOLD        32
76 
77 #define TX_MAX_SIZE                (1 << 16)    /* 64KB                          */
78 #define TX_MAX_SEGS                      36     /* maximum supported by card     */
79 
80 #define TX_MAX_DESC                       4     /* max descriptors per packet    */
81 
82 
83 #define TX_START_MAX_DESC (TX_MAX_DESC << 2)    /* maximum number of descriptors
84 						 * call to start used per 	 */
85 
86 #define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4)    /* maximum tx descriptors
87 						 * to clean per iteration        */
88 #define TX_WR_SIZE_MAX    11*1024              /* the maximum total size of packets aggregated into a single
89 						* TX WR
90 						*/
91 #define TX_WR_COUNT_MAX         7              /* the maximum total number of packets that can be
92 						* aggregated into a single TX WR
93 						*/
94 
95 #define prefetch(x) __builtin_prefetch(x)
96 
97 #if defined(__i386__) || defined(__amd64__)
98 #define smp_mb() mb()
99 #define WARN_ON(condition) do { \
100 	if (__predict_false((condition)!=0)) {  \
101                 log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \
102                 kdb_backtrace(); \
103         } \
104 } while (0)
105 #else
106 #define smp_mb()
107 #endif
108 
109 #define DBG_RX          (1 << 0)
110 static const int debug_flags = DBG_RX;
111 
112 #ifdef DEBUG_PRINT
113 #define DBG(flag, msg) do {	\
114 	if ((flag & debug_flags))	\
115 		printf msg; \
116 } while (0)
117 #else
118 #define DBG(...)
119 #endif
120 
121 #include <sys/syslog.h>
122 
123 #define promisc_rx_mode(rm)  (if_getflags((rm)->port->ifp) & IFF_PROMISC)
124 #define allmulti_rx_mode(rm) (if_getflags((rm)->port->ifp) & IFF_ALLMULTI)
125 
126 #define CH_ERR(adap, fmt, ...) log(LOG_ERR, fmt, ##__VA_ARGS__)
127 #define CH_WARN(adap, fmt, ...)	log(LOG_WARNING, fmt, ##__VA_ARGS__)
128 #define CH_ALERT(adap, fmt, ...) log(LOG_ALERT, fmt, ##__VA_ARGS__)
129 
130 #define t3_os_sleep(x) DELAY((x) * 1000)
131 
132 #define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit)))
133 
134 #define max_t(type, a, b) (type)max((a), (b))
135 #define cpu_to_be32(x)		htobe32(x)
136 
137 /* Standard PHY definitions */
138 #define BMCR_LOOPBACK		BMCR_LOOP
139 #define BMCR_ISOLATE		BMCR_ISO
140 #define BMCR_ANENABLE		BMCR_AUTOEN
141 #define BMCR_SPEED1000		BMCR_SPEED1
142 #define BMCR_SPEED100		BMCR_SPEED0
143 #define BMCR_ANRESTART		BMCR_STARTNEG
144 #define BMCR_FULLDPLX		BMCR_FDX
145 #define BMSR_LSTATUS		BMSR_LINK
146 #define BMSR_ANEGCOMPLETE	BMSR_ACOMP
147 
148 #define MII_LPA			MII_ANLPAR
149 #define MII_ADVERTISE		MII_ANAR
150 #define MII_CTRL1000		MII_100T2CR
151 
152 #define ADVERTISE_PAUSE_CAP	ANAR_FC
153 #define ADVERTISE_PAUSE_ASYM	0x800
154 #define ADVERTISE_PAUSE		ANAR_FC
155 #define ADVERTISE_1000HALF	0x100
156 #define ADVERTISE_1000FULL	0x200
157 #define ADVERTISE_10FULL	ANAR_10_FD
158 #define ADVERTISE_10HALF	ANAR_10
159 #define ADVERTISE_100FULL	ANAR_TX_FD
160 #define ADVERTISE_100HALF	ANAR_TX
161 
162 
163 #define ADVERTISE_1000XHALF	ANAR_X_HD
164 #define ADVERTISE_1000XFULL	ANAR_X_FD
165 #define ADVERTISE_1000XPSE_ASYM	ANAR_X_PAUSE_ASYM
166 #define ADVERTISE_1000XPAUSE	ANAR_X_PAUSE_SYM
167 
168 #define ADVERTISE_CSMA		ANAR_CSMA
169 #define ADVERTISE_NPAGE		ANAR_NP
170 
171 
172 /* Standard PCI Extended Capabilities definitions */
173 #define PCI_CAP_ID_VPD	PCIY_VPD
174 #define PCI_VPD_ADDR	PCIR_VPD_ADDR
175 #define PCI_VPD_ADDR_F	0x8000
176 #define PCI_VPD_DATA	PCIR_VPD_DATA
177 
178 #define PCI_CAP_ID_EXP		PCIY_EXPRESS
179 #define PCI_EXP_DEVCTL		PCIER_DEVICE_CTL
180 #define PCI_EXP_DEVCTL_PAYLOAD	PCIEM_CTL_MAX_PAYLOAD
181 #define PCI_EXP_DEVCTL_READRQ	PCIEM_CTL_MAX_READ_REQUEST
182 #define PCI_EXP_LNKCTL		PCIER_LINK_CTL
183 #define PCI_EXP_LNKSTA		PCIER_LINK_STA
184 
185 /*
186  * Linux compatibility macros
187  */
188 
189 /* Some simple translations */
190 #define __devinit
191 #define udelay(x) DELAY(x)
192 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
193 #define le32_to_cpu(x) le32toh(x)
194 #define le16_to_cpu(x) le16toh(x)
195 #define cpu_to_le32(x) htole32(x)
196 #define swab32(x) bswap32(x)
197 #ifndef simple_strtoul
198 #define simple_strtoul(...) strtoul(__VA_ARGS__)
199 #endif
200 
201 
202 #ifndef LINUX_TYPES_DEFINED
203 typedef uint8_t 	u8;
204 typedef uint16_t 	u16;
205 typedef uint32_t 	u32;
206 typedef uint64_t 	u64;
207 
208 typedef uint8_t		__u8;
209 typedef uint16_t	__u16;
210 typedef uint32_t	__u32;
211 typedef uint8_t		__be8;
212 typedef uint16_t	__be16;
213 typedef uint32_t	__be32;
214 typedef uint64_t	__be64;
215 #endif
216 
217 
218 #if BYTE_ORDER == BIG_ENDIAN
219 #define __BIG_ENDIAN_BITFIELD
220 #elif BYTE_ORDER == LITTLE_ENDIAN
221 #define __LITTLE_ENDIAN_BITFIELD
222 #else
223 #error "Must set BYTE_ORDER"
224 #endif
225 
226 /* Indicates what features are supported by the interface. */
227 #define SUPPORTED_10baseT_Half          (1 << 0)
228 #define SUPPORTED_10baseT_Full          (1 << 1)
229 #define SUPPORTED_100baseT_Half         (1 << 2)
230 #define SUPPORTED_100baseT_Full         (1 << 3)
231 #define SUPPORTED_1000baseT_Half        (1 << 4)
232 #define SUPPORTED_1000baseT_Full        (1 << 5)
233 #define SUPPORTED_Autoneg               (1 << 6)
234 #define SUPPORTED_TP                    (1 << 7)
235 #define SUPPORTED_AUI                   (1 << 8)
236 #define SUPPORTED_MII                   (1 << 9)
237 #define SUPPORTED_FIBRE                 (1 << 10)
238 #define SUPPORTED_BNC                   (1 << 11)
239 #define SUPPORTED_10000baseT_Full       (1 << 12)
240 #define SUPPORTED_Pause                 (1 << 13)
241 #define SUPPORTED_Asym_Pause            (1 << 14)
242 
243 /* Indicates what features are advertised by the interface. */
244 #define ADVERTISED_10baseT_Half         (1 << 0)
245 #define ADVERTISED_10baseT_Full         (1 << 1)
246 #define ADVERTISED_100baseT_Half        (1 << 2)
247 #define ADVERTISED_100baseT_Full        (1 << 3)
248 #define ADVERTISED_1000baseT_Half       (1 << 4)
249 #define ADVERTISED_1000baseT_Full       (1 << 5)
250 #define ADVERTISED_Autoneg              (1 << 6)
251 #define ADVERTISED_TP                   (1 << 7)
252 #define ADVERTISED_AUI                  (1 << 8)
253 #define ADVERTISED_MII                  (1 << 9)
254 #define ADVERTISED_FIBRE                (1 << 10)
255 #define ADVERTISED_BNC                  (1 << 11)
256 #define ADVERTISED_10000baseT_Full      (1 << 12)
257 #define ADVERTISED_Pause                (1 << 13)
258 #define ADVERTISED_Asym_Pause           (1 << 14)
259 
260 /* Enable or disable autonegotiation.  If this is set to enable,
261  * the forced link modes above are completely ignored.
262  */
263 #define AUTONEG_DISABLE         0x00
264 #define AUTONEG_ENABLE          0x01
265 
266 #define SPEED_10		10
267 #define SPEED_100		100
268 #define SPEED_1000		1000
269 #define SPEED_10000		10000
270 #define DUPLEX_HALF		0
271 #define DUPLEX_FULL		1
272 
273 #endif
274