1 /*- 2 * Copyright (c) 1992, 1993 3 * The Regents of the University of California. All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * Ralph Campbell and Rick Macklem. 7 * 8 * %sccs.include.redist.c% 9 * 10 * @(#)mfbreg.h 8.1 (Berkeley) 06/10/93 11 */ 12 13 /* 14 * Mach Operating System 15 * Copyright (c) 1991,1990,1989 Carnegie Mellon University 16 * All Rights Reserved. 17 * 18 * Permission to use, copy, modify and distribute this software and its 19 * documentation is hereby granted, provided that both the copyright 20 * notice and this permission notice appear in all copies of the 21 * software, derivative works or modified versions, and any portions 22 * thereof, and that both notices appear in supporting documentation. 23 * 24 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS 25 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR 26 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 27 * 28 * Carnegie Mellon requests users of this software to return to 29 * 30 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 31 * School of Computer Science 32 * Carnegie Mellon University 33 * Pittsburgh PA 15213-3890 34 * 35 * any improvements or extensions that they make and grant Carnegie the 36 * rights to redistribute these changes. 37 */ 38 /* 39 * This configuration uses two twin Bt431s and a single Bt455 colour map. 40 * (Yep, that's a colour map on a single bitplane mono display) 41 */ 42 #define SET_VALUE(x) (((x)<<8)|((x)&0xff)) 43 #define GET_VALUE(x) ((x)&0xff) 44 45 typedef struct { 46 volatile u_short addr_lo; 47 short pad0; 48 volatile u_short addr_hi; 49 short pad1; 50 volatile u_short addr_cmap; 51 short pad2; 52 volatile u_short addr_reg; 53 short pad3; 54 } bt431_regmap_t; 55 56 /* 57 * Generic register access 58 */ 59 /* when using autoincrement */ 60 #define BT431_WRITE_REG_AUTOI(regs, val) { \ 61 (regs)->addr_reg = SET_VALUE(val); \ 62 MachEmptyWriteBuffer(); \ 63 } 64 65 #define BT431_READ_REG_AUTOI(regs) \ 66 GET_VALUE(((regs)->addr_reg)) 67 68 #define BT431_WRITE_CMAP_AUTOI(regs, val) { \ 69 (regs)->addr_cmap = (val); \ 70 MachEmptyWriteBuffer(); \ 71 } 72 73 #define BT431_READ_CMAP_AUTOI(regs) \ 74 ((regs)->addr_cmap) 75 76 typedef struct { 77 volatile u_char addr_cmap; 78 char pad0[3]; 79 volatile u_char addr_cmap_data; 80 char pad1[3]; 81 volatile u_char addr_clr; 82 char pad2[3]; 83 volatile u_char addr_ovly; 84 char pad3[3]; 85 } bt455_regmap_t; 86 87 88 /* 89 * Generic register access 90 */ 91 #define BT455_SELECT_ENTRY(regs, regno) { \ 92 (regs)->addr_cmap = (regno)&0x0f; \ 93 MachEmptyWriteBuffer(); \ 94 } 95 96 /* 97 * Additional registers addressed indirectly 98 */ 99 #define BT431_REG_CMD 0x0000 100 #define BT431_REG_CXLO 0x0001 101 #define BT431_REG_CXHI 0x0002 102 #define BT431_REG_CYLO 0x0003 103 #define BT431_REG_CYHI 0x0004 104 #define BT431_REG_WXLO 0x0005 105 #define BT431_REG_WXHI 0x0006 106 #define BT431_REG_WYLO 0x0007 107 #define BT431_REG_WYHI 0x0008 108 #define BT431_REG_WWLO 0x0009 109 #define BT431_REG_WWHI 0x000a 110 #define BT431_REG_WHLO 0x000b 111 #define BT431_REG_WHHI 0x000c 112 113 #define BT431_REG_CRAM_BASE 0x0000 114 #define BT431_REG_CRAM_END 0x01ff 115 116 /* 117 * Command register 118 */ 119 120 #define BT431_CMD_CURS_ENABLE 0x40 121 #define BT431_CMD_XHAIR_ENABLE 0x20 122 #define BT431_CMD_OR_CURSORS 0x10 123 #define BT431_CMD_AND_CURSORS 0x00 124 #define BT431_CMD_1_1_MUX 0x00 125 #define BT431_CMD_4_1_MUX 0x04 126 #define BT431_CMD_5_1_MUX 0x08 127 #define BT431_CMD_xxx_MUX 0x0c 128 #define BT431_CMD_THICK_1 0x00 129 #define BT431_CMD_THICK_3 0x01 130 #define BT431_CMD_THICK_5 0x02 131 #define BT431_CMD_THICK_7 0x03 132