1 /* $NetBSD: landiskreg.h,v 1.2 2012/01/21 19:44:30 nonaka Exp $ */ 2 3 /*- 4 * Copyright (C) 2005 NONAKA Kimihiro <nonaka@netbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #ifndef LANDISKREG_H__ 29 #define LANDISKREG_H__ 30 31 #define LANDISK_BTNSTAT 0xb0000002 32 #define LANDISK_PWRMNG 0xb0000003 /* write-only */ 33 #define LANDISK_INTEN 0xb0000005 34 #define LANDISK_PWRSW_INTCLR 0xb0000006 35 36 #define BTN_SELECT_BIT (1 << 0) 37 #define BTN_COPY_BIT (1 << 1) 38 #define BTN_REMOVE_BIT (1 << 2) 39 #define BTN_POWER_BIT (1 << 4) 40 #define BTN_RESET_BIT (1 << 5) 41 #define BTN_ALL_BIT (BTN_SELECT_BIT \ 42 | BTN_COPY_BIT \ 43 | BTN_REMOVE_BIT \ 44 | BTN_RESET_BIT) 45 46 #define PWRMNG_POWEROFF 0x01 47 #define PWRMNG_RTC_CE 0x02 48 49 #define INTEN_ALL_MASK 0x00 50 #define INTEN_PCI0 0x01 /* rtk/ehci */ 51 #define INTEN_PCI1 0x02 /* acardide */ 52 #define INTEN_PCI2 0x04 /* ochi0 */ 53 #define INTEN_PCI3 0x08 /* ochi1 */ 54 #define INTEN_ICONNECT 0x10 /* wdc1 at obio */ 55 #define INTEN_CFIDE 0x20 /* wdc0 at obio */ 56 #define INTEN_PWRSW 0x40 /* pwrsw at obio */ 57 #define INTEN_BTN 0x80 /* btn at obio */ 58 59 #define LANDISK_INTR_PCI0 5 /* rtk/ehci */ 60 #define LANDISK_INTR_PCI1 6 /* acardide (LANDISK) */ 61 #define LANDISK_INTR_PCI2 7 /* ohci0 */ 62 #define LANDISK_INTR_PCI3 8 /* ochi1 */ 63 #define LANDISK_INTR_ICONNECT 9 /* wdc1 (LAN-iCN2 iConnect) */ 64 #define LANDISK_INTR_CFIDE 10 /* wdc0 (LAN-iCN2/USL-5P CF) */ 65 #define LANDISK_INTR_PWRSW 11 /* pwrsw */ 66 #define LANDISK_INTR_BTN 12 /* btn (USL-5P) */ 67 68 #endif /* LANDISKREG_H__ */ 69