| /dports/sysutils/u-boot-pine-h64/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun9i.h | 173 #define GTBUS_CLK_DIV_RATIO(n) (((n - 1) & 0x3) << 0)
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/math/py-statsmodels/statsmodels-0.13.1/statsmodels/tsa/exponential_smoothing/ |
| H A D | ets.py | 174 # Implementation details:
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
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| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun8i_a83t.h | 173 #define CCM_PLL5_CTRL_EN (0x1 << 31) macro
|