1 #pragma once
2 
3 #include "Types.h"
4 #include "zip/ZipArchiveWriter.h"
5 #include "zip/ZipArchiveReader.h"
6 #include "Iop_DmacChannel.h"
7 
8 namespace Iop
9 {
10 	class CIntc;
11 
12 	class CDmac
13 	{
14 	public:
15 		enum
16 		{
17 			CHANNEL_SPU0 = 4,
18 			CHANNEL_SPU1 = 8,
19 			CHANNEL_DEV9 = 9,
20 			CHANNEL_SIO2in = 11,
21 			CHANNEL_SIO2out = 12,
22 			MAX_CHANNEL = 14,
23 		};
24 
25 		enum
26 		{
27 			CH0_BASE = 0x1F801080,
28 			CH1_BASE = 0x1F801090,
29 			CH2_BASE = 0x1F8010A0,
30 			CH3_BASE = 0x1F8010B0,
31 			CH4_BASE = 0x1F8010C0,
32 			CH5_BASE = 0x1F8010D0,
33 			CH6_BASE = 0x1F8010E0,
34 			CH8_BASE = 0x1F801500,
35 			CH9_BASE = 0x1F801510,
36 			CH11_BASE = 0x1F801530, //Unsure about that
37 			CH12_BASE = 0x1F801540, //Unsure about that
38 		};
39 
40 		enum DMAC_ZONE1
41 		{
42 			DMAC_ZONE1_START = 0x1F801080,
43 			DMAC_ZONE1_END = 0x1F8010FF,
44 			DMAC_ZONE2_START = 0x1F801500,
45 			DMAC_ZONE2_END = 0x1F80155F,
46 			DMAC_ZONE3_START = 0x1F801570,
47 			DMAC_ZONE3_END = 0x1F801578,
48 		};
49 
50 		CDmac(uint8*, CIntc&);
51 		virtual ~CDmac() = default;
52 
53 		void Reset();
54 		void SetReceiveFunction(unsigned int, const Dmac::CChannel::ReceiveFunctionType&);
55 		uint32 ReadRegister(uint32);
56 		uint32 WriteRegister(uint32, uint32);
57 
58 		void LoadState(Framework::CZipArchiveReader&);
59 		void SaveState(Framework::CZipArchiveWriter&);
60 
61 		void ResumeDma(unsigned int);
62 
63 		void AssertLine(unsigned int);
64 		uint8* GetRam();
65 
66 		enum
67 		{
68 			DPCR = 0x1F8010F0,
69 			DPCR2 = 0x1F801570,
70 			DICR = 0x1F8010F4
71 		};
72 
73 	private:
74 		unsigned int GetChannelIdFromAddress(uint32);
75 		Dmac::CChannel* GetChannelFromAddress(uint32);
76 		void LogRead(uint32);
77 		void LogWrite(uint32, uint32);
78 
79 		Dmac::CChannel m_channelSpu0;
80 		Dmac::CChannel m_channelSpu1;
81 		Dmac::CChannel m_channelDev9;
82 		Dmac::CChannel m_channelSio2In;
83 		Dmac::CChannel m_channelSio2Out;
84 		Dmac::CChannel* m_channel[MAX_CHANNEL];
85 
86 		uint32 m_DPCR;
87 		uint32 m_DPCR2;
88 
89 		uint32 m_DICR;
90 		uint8* m_ram;
91 		CIntc& m_intc;
92 	};
93 }
94