1 /* $OpenBSD: cmpcivar.h,v 1.7 2010/10/08 14:01:07 jakemsr Exp $ */ 2 /* $NetBSD: cmpcivar.h,v 1.9 2005/12/11 12:22:48 christos Exp $ */ 3 4 /* 5 * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Takuya SHIOZAKI <tshiozak@NetBSD.org> . 10 * 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by ITOH Yasufumi. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 */ 36 37 /* C-Media CMI8x38 Audio Chip Support */ 38 39 #ifndef _DEV_PCI_CMPCIVAR_H_ 40 #define _DEV_PCI_CMPCIVAR_H_ 41 42 43 /* 44 * DMA pool 45 */ 46 struct cmpci_dmanode { 47 bus_dma_tag_t cd_tag; 48 int cd_nsegs; 49 bus_dma_segment_t cd_segs[1]; 50 bus_dmamap_t cd_map; 51 caddr_t cd_addr; 52 size_t cd_size; 53 struct cmpci_dmanode *cd_next; 54 }; 55 56 typedef struct cmpci_dmanode *cmpci_dmapool_t; 57 #define KVADDR(dma) ((void *)(dma)->cd_addr) 58 #define DMAADDR(dma) ((dma)->cd_map->dm_segs[0].ds_addr) 59 60 61 /* 62 * Mixer device 63 * 64 * Note that cmpci_query_devinfo() is optimized depending on 65 * the order of this. Be careful if you change the values. 66 */ 67 #define CMPCI_DAC_VOL 0 /* inputs.dac */ 68 #define CMPCI_FM_VOL 1 /* inputs.fmsynth */ 69 #define CMPCI_CD_VOL 2 /* inputs.cd */ 70 #define CMPCI_LINE_IN_VOL 3 /* inputs.line */ 71 #define CMPCI_AUX_IN_VOL 4 /* inputs.aux */ 72 #define CMPCI_MIC_VOL 5 /* inputs.mic */ 73 74 #define CMPCI_DAC_MUTE 6 /* inputs.dac.mute */ 75 #define CMPCI_FM_MUTE 7 /* inputs.fmsynth.mute */ 76 #define CMPCI_CD_MUTE 8 /* inputs.cd.mute */ 77 #define CMPCI_LINE_IN_MUTE 9 /* inputs.line.mute */ 78 #define CMPCI_AUX_IN_MUTE 10 /* inputs.aux.mute */ 79 #define CMPCI_MIC_MUTE 11 /* inputs.mic.mute */ 80 81 #define CMPCI_MIC_PREAMP 12 /* inputs.mic.preamp */ 82 #define CMPCI_PCSPEAKER 13 /* inputs.speaker */ 83 84 #define CMPCI_RECORD_SOURCE 14 /* record.source */ 85 #define CMPCI_MIC_RECVOL 15 /* record.mic */ 86 87 #define CMPCI_PLAYBACK_MODE 16 /* playback.mode */ 88 #define CMPCI_SPDIF_IN_SELECT 17 /* spdif.input */ 89 #define CMPCI_SPDIF_IN_PHASE 18 /* spdif.input.phase */ 90 #define CMPCI_SPDIF_LOOP 19 /* spdif.output */ 91 #define CMPCI_SPDIF_OUT_PLAYBACK 20 /* spdif.output.playback */ 92 #define CMPCI_SPDIF_OUT_VOLTAGE 21 /* spdif.output.voltage */ 93 #define CMPCI_MONITOR_DAC 22 /* spdif.monitor */ 94 95 #define CMPCI_MASTER_VOL 23 /* outputs.master */ 96 #define CMPCI_REAR 24 /* outputs.rear */ 97 #define CMPCI_INDIVIDUAL 25 /* outputs.rear.individual */ 98 #define CMPCI_REVERSE 26 /* outputs.rear.reverse */ 99 #define CMPCI_SURROUND 27 /* outputs.surround */ 100 101 #define CMPCI_NDEVS 28 102 103 #define CMPCI_INPUT_CLASS 28 104 #define CMPCI_OUTPUT_CLASS 29 105 #define CMPCI_RECORD_CLASS 30 106 #define CMPCI_PLAYBACK_CLASS 31 107 #define CMPCI_SPDIF_CLASS 32 108 109 #define CmpciNspdif "spdif" 110 #define CmpciCspdif "spdif" 111 #define CmpciNspdin "spdin" 112 #define CmpciNspdin1 "spdin1" 113 #define CmpciNspdin2 "spdin2" 114 #define CmpciNspdout "spdout" 115 #define CmpciNplayback "playback" 116 #define CmpciCplayback "playback" 117 #define CmpciNlegacy "legacy" 118 #define CmpciNvoltage "voltage" 119 #define CmpciNphase "phase" 120 #define CmpciNpositive "positive" 121 #define CmpciNnegative "negative" 122 #define CmpciNrear "rear" 123 #define CmpciNindividual "individual" 124 #define CmpciNreverse "reverse" 125 #define CmpciNhigh_v "5V" 126 #define CmpciNlow_v "0.5V" 127 #define CmpciNsurround "surround" 128 129 /* record.source bitmap (see cmpci_set_in_ports()) */ 130 #define CMPCI_RECORD_SOURCE_MIC CMPCI_SB16_MIXER_MIC_SRC /* mic */ 131 #define CMPCI_RECORD_SOURCE_CD CMPCI_SB16_MIXER_CD_SRC_R /* cd */ 132 #define CMPCI_RECORD_SOURCE_LINE_IN CMPCI_SB16_MIXER_LINE_SRC_R /* line */ 133 #define CMPCI_RECORD_SOURCE_AUX_IN (1 << 8) /* aux */ 134 #define CMPCI_RECORD_SOURCE_WAVE (1 << 9) /* wave */ 135 #define CMPCI_RECORD_SOURCE_FM CMPCI_SB16_MIXER_FM_SRC_R /* fmsynth*/ 136 #define CMPCI_RECORD_SOURCE_SPDIF (1 << 10) /* spdif */ 137 138 /* playback.mode */ 139 #define CMPCI_PLAYBACK_MODE_WAVE 0 /* dac */ 140 #define CMPCI_PLAYBACK_MODE_SPDIF 1 /* spdif */ 141 142 /* spdif.input */ 143 #define CMPCI_SPDIFIN_SPDIFIN2 0x01 144 #define CMPCI_SPDIFIN_SPDIFOUT 0x02 145 #define CMPCI_SPDIF_IN_SPDIN1 0 /* spdin1 */ 146 #define CMPCI_SPDIF_IN_SPDIN2 CMPCI_SPDIFIN_SPDIFIN2 /* spdin2 */ 147 #define CMPCI_SPDIF_IN_SPDOUT (CMPCI_SPDIFIN_SPDIFIN2|CMPCI_SPDIFIN_SPDIFOUT) 148 /* spdout */ 149 /* spdif.input.phase */ 150 #define CMPCI_SPDIF_IN_PHASE_POSITIVE 0 /* positive */ 151 #define CMPCI_SPDIF_IN_PHASE_NEGATIVE 1 /* negative */ 152 153 /* spdif.output */ 154 #define CMPCI_SPDIF_LOOP_OFF 0 /* playback */ 155 #define CMPCI_SPDIF_LOOP_ON 1 /* spdin */ 156 157 /* spdif.output.playback */ 158 #define CMPCI_SPDIF_OUT_PLAYBACK_WAVE 0 /* wave */ 159 #define CMPCI_SPDIF_OUT_PLAYBACK_LEGACY 1 /* legacy */ 160 161 /* spdif.output.voltage */ 162 #define CMPCI_SPDIF_OUT_VOLTAGE_HIGH 0 /* 5V */ 163 #define CMPCI_SPDIF_OUT_VOLTAGE_LOW 1 /* 0.5V */ 164 165 /* spdif.monitor */ 166 #define CMPCI_MONDAC_ENABLE 0x01 167 #define CMPCI_MONDAC_SPDOUT 0x02 168 #define CMPCI_MONITOR_DAC_OFF 0 /* off */ 169 #define CMPCI_MONITOR_DAC_SPDIN CMPCI_MONDAC_ENABLE /* spdin */ 170 #define CMPCI_MONITOR_DAC_SPDOUT (CMPCI_MONDAC_ENABLE | CMPCI_MONDAC_SPDOUT) 171 /* spdout */ 172 173 /* 174 * softc 175 */ 176 177 /* each channel */ 178 struct cmpci_channel { 179 void (*intr)(void *); 180 void *intr_arg; 181 int md_divide; 182 int bps; 183 int blksize; 184 int nblocks; 185 int swpos; 186 }; 187 188 struct cmpci_softc { 189 struct device sc_dev; 190 191 /* model/rev */ 192 uint32_t sc_id; 193 uint32_t sc_class; 194 uint32_t sc_capable; 195 #define CMPCI_CAP_SPDIN 0x00000001 196 #define CMPCI_CAP_SPDOUT 0x00000002 197 #define CMPCI_CAP_SPDLOOP 0x00000004 198 #define CMPCI_CAP_SPDLEGACY 0x00000008 199 #define CMPCI_CAP_SPDIN_MONITOR 0x00000010 200 #define CMPCI_CAP_XSPDOUT 0x00000020 201 #define CMPCI_CAP_SPDOUT_VOLTAGE 0x00000040 202 #define CMPCI_CAP_SPDOUT_48K 0x00000080 203 #define CMPCI_CAP_SURROUND 0x00000100 204 #define CMPCI_CAP_REAR 0x00000200 205 #define CMPCI_CAP_INDIVIDUAL_REAR 0x00000400 206 #define CMPCI_CAP_REVERSE_FR 0x00000800 207 #define CMPCI_CAP_SPDIN_PHASE 0x00001000 208 #define CMPCI_CAP_2ND_SPDIN 0x00002000 209 #define CMPCI_CAP_4CH 0x00004000 210 #define CMPCI_CAP_6CH 0x00008000 211 #define CMPCI_CAP_8CH 0x00010000 212 213 #define CMPCI_CAP_CMI8338 (CMPCI_CAP_SPDIN | CMPCI_CAP_SPDOUT | \ 214 CMPCI_CAP_SPDLOOP | CMPCI_CAP_SPDLEGACY) 215 216 #define CMPCI_CAP_CMI8738 (CMPCI_CAP_CMI8338 | \ 217 CMPCI_CAP_SPDIN_MONITOR | \ 218 CMPCI_CAP_XSPDOUT | \ 219 CMPCI_CAP_SPDOUT_VOLTAGE | \ 220 CMPCI_CAP_SPDOUT_48K | CMPCI_CAP_SURROUND |\ 221 CMPCI_CAP_REAR | \ 222 CMPCI_CAP_INDIVIDUAL_REAR | \ 223 CMPCI_CAP_REVERSE_FR | \ 224 CMPCI_CAP_SPDIN_PHASE | \ 225 CMPCI_CAP_2ND_SPDIN /* XXX 6ch only */) 226 #define CMPCI_ISCAP(sc, name) (sc->sc_capable & CMPCI_CAP_ ## name) 227 228 /* I/O Base device */ 229 bus_space_tag_t sc_iot; 230 bus_space_handle_t sc_ioh; 231 232 bus_space_handle_t sc_mpu_ioh; 233 struct device *sc_mpudev; 234 235 /* intr handle */ 236 pci_intr_handle_t *sc_ih; 237 238 /* DMA */ 239 bus_dma_tag_t sc_dmat; 240 cmpci_dmapool_t sc_dmap; 241 242 /* each channel */ 243 struct cmpci_channel sc_ch0, sc_ch1; 244 245 /* which channel is used for playback */ 246 uint32_t sc_play_channel; 247 248 /* value of CMPCI_REG_MISC register */ 249 uint32_t sc_reg_misc; 250 251 /* chip version */ 252 uint32_t sc_version; 253 254 /* mixer */ 255 uint8_t sc_gain[CMPCI_NDEVS][2]; 256 #define CMPCI_LEFT 0 257 #define CMPCI_RIGHT 1 258 #define CMPCI_LR 0 259 uint16_t sc_in_mask; 260 }; 261 262 263 #endif /* _DEV_PCI_CMPCIVAR_H_ */ 264 265 /* end of file */ 266