xref: /netbsd/sys/dev/isa/cmsreg.h (revision ce099b40)
1 /* $NetBSD: cmsreg.h,v 1.4 2008/04/28 20:23:52 martin Exp $ */
2 
3 /*
4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  * POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #define CMS_NVOICES 12
30 #define CMS_FIRST_NOTE 30
31 
32 /* direct registers */
33 
34 #define CMS_DATA0 0x00 /* for chip 0, voices 0-5 */
35 #define CMS_ADDR0 0x01
36 
37 #define CMS_DATA1 0x02 /* for chip 1, voices 6-11 */
38 #define CMS_ADDR1 0x03
39 
40 #define CMS_MREG  0x04 /* always returns 0x7f */
41 #define CMS_WREG  0x07 /* writable register */
42 #define CMS_RREG  0x0b /* readable register */
43 
44 #define CMS_IOSIZE 16
45 
46 /*
47  * Note that for each register, if ports CMS_DATA1/CMS_ADDR1 are used
48  * then the first voice is modified.  If ports CMS_DATA2/CMS_ADDR2 are
49  * used then the second voice is modified.
50  */
51 
52 /*
53  * Each voice can have a volume between 0 and 15 on both left and
54  * right channels.  The high-order nibble is the right channel volume,
55  * and the low-order nibble is the left channel volume.
56  */
57 
58 #define CMS_IREG_VOL0 0x00
59 #define CMS_IREG_VOL1 0x01
60 #define CMS_IREG_VOL2 0x02
61 #define CMS_IREG_VOL3 0x03
62 #define CMS_IREG_VOL4 0x04
63 #define CMS_IREG_VOL5 0x05
64 
65 /* Frequency registers */
66 #define CMS_IREG_FREQ0 0x08
67 #define CMS_IREG_FREQ1 0x09
68 #define CMS_IREG_FREQ2 0x0a
69 #define CMS_IREG_FREQ3 0x0b
70 #define CMS_IREG_FREQ4 0x0c
71 #define CMS_IREG_FREQ5 0x0d
72 
73 /*
74  * Octave Registers: To get tones in higher octaves the octave
75  * register for the voice must be set.  Each octave register stores
76  * the octave number for two voices.  The high-order nibble is for
77  * first voice and the low-order nibble is for the second voice.
78  */
79 
80 #define CMS_IREG_OCTAVE_1_0 0x10
81 #define CMS_IREG_OCTAVE_3_2 0x11
82 #define CMS_IREG_OCTAVE_5_4 0x12
83 
84 #define CMS_IREG_FREQ_CTL 0x14 /* voice frequencies */
85 #define CMS_IREG_FREQ_ENBL0 0x01 /* setting the bit enables the voice */
86 #define CMS_IREG_FREQ_ENBL1 0x02 /* clearing the bit disables the voice */
87 #define CMS_IREG_FREQ_ENBL2 0x04
88 #define CMS_IREG_FREQ_ENBL3 0x08
89 #define CMS_IREG_FREQ_ENBL4 0x10
90 #define CMS_IREG_FREQ_ENBL5 0x20
91 
92 /*
93  * There are 4 noise generators, each noise generator can be connected
94  * up to any of three voices:
95  *
96  * Noise generator 0: connected to voices 0,1,2
97  *                 1: connected to voices 3,4,5
98  *                 2: connected to voices 6,7,8
99  *                 3: connected to voices 0,10,11
100  *
101  * CMS_DATA1/CMS_ADDR1 access noise generators 0 and 1.  Each noise
102  * generator has two bits which control the noise generator rate.
103  */
104 
105 #define CMS_IREG_NOISE_CTL 0x15 /* noises */
106 #define CMS_IREG_NOISE_ENBL0 0x01
107 #define CMS_IREG_NOISE_ENBL1 0x02
108 #define CMS_IREG_NOISE_ENBL2 0x04
109 #define CMS_IREG_NOISE_ENBL3 0x08
110 #define CMS_IREG_NOISE_ENBL4 0x10
111 #define CMS_IREG_NOISE_ENBL5 0x20
112 
113 #define CMS_IREG_NOISE_BW 0x16
114 #define CMS_IREG_NOISE_MASK0 0x03 /* bits for noise generator 0 */
115 #define CMS_IREG_NOISE_MASK1 0x30 /* bits for noise generator 1 */
116 /* the bits in the mask have the following meaning */
117 #define CMS_IREG_NOISE_MASK_28k 0 /* 28kHz */
118 #define CMS_IREG_NOISE_MASK_14k 1 /* 14kHz */
119 #define CMS_IREG_NOISE_MASK_7k  2 /* 6.8kHz */
120 
121 #define CMS_IREG_SYS_CTL 0x1c
122 #define CMS_IREG_SYS_ENBL  0x01 /* enable all channels */
123 #define CMS_IREG_SYS_RESET 0x02 /* reset and synchronise generators */
124 
125 
126 /*
127  * Some useful macros
128  */
129 
130 #define CMS_WRITE(sc, chip, reg, val)					\
131 do {									\
132 	(sc)->sc_shadowregs[((chip)<<5) + (reg)] = val;			\
133 	bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh,			\
134 		CMS_ADDR0 + ((chip)<<1), (reg));			\
135 	bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh,			\
136 		CMS_DATA0 + ((chip)<<1), (val));			\
137 } while (0)
138 
139 #define CMS_READ(sc, chip, reg) ((sc)->sc_shadowregs[((chip)<<5) + (reg)])
140 
141 #define CHAN_TO_CHIP(chan) ((chan)>5)
142 #define CHAN_TO_VOICE(chan) ((chan)%6)
143 #define OCTAVE_OFFSET(voice) ((voice)>>1)
144 #define OCTAVE_SHIFT(voice) (((voice)&1)<<2)
145