1 /*********************************************************************/
2 /* Copyright 2009, 2010 The University of Texas at Austin.           */
3 /* All rights reserved.                                              */
4 /*                                                                   */
5 /* Redistribution and use in source and binary forms, with or        */
6 /* without modification, are permitted provided that the following   */
7 /* conditions are met:                                               */
8 /*                                                                   */
9 /*   1. Redistributions of source code must retain the above         */
10 /*      copyright notice, this list of conditions and the following  */
11 /*      disclaimer.                                                  */
12 /*                                                                   */
13 /*   2. Redistributions in binary form must reproduce the above      */
14 /*      copyright notice, this list of conditions and the following  */
15 /*      disclaimer in the documentation and/or other materials       */
16 /*      provided with the distribution.                              */
17 /*                                                                   */
18 /*    THIS  SOFTWARE IS PROVIDED  BY THE  UNIVERSITY OF  TEXAS AT    */
19 /*    AUSTIN  ``AS IS''  AND ANY  EXPRESS OR  IMPLIED WARRANTIES,    */
20 /*    INCLUDING, BUT  NOT LIMITED  TO, THE IMPLIED  WARRANTIES OF    */
21 /*    MERCHANTABILITY  AND FITNESS FOR  A PARTICULAR  PURPOSE ARE    */
22 /*    DISCLAIMED.  IN  NO EVENT SHALL THE UNIVERSITY  OF TEXAS AT    */
23 /*    AUSTIN OR CONTRIBUTORS BE  LIABLE FOR ANY DIRECT, INDIRECT,    */
24 /*    INCIDENTAL,  SPECIAL, EXEMPLARY,  OR  CONSEQUENTIAL DAMAGES    */
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27 /*    BUSINESS INTERRUPTION) HOWEVER CAUSED  AND ON ANY THEORY OF    */
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30 /*    OF  THE  USE OF  THIS  SOFTWARE,  EVEN  IF ADVISED  OF  THE    */
31 /*    POSSIBILITY OF SUCH DAMAGE.                                    */
32 /*                                                                   */
33 /* The views and conclusions contained in the software and           */
34 /* documentation are those of the authors and should not be          */
35 /* interpreted as representing official policies, either expressed   */
36 /* or implied, of The University of Texas at Austin.                 */
37 /*********************************************************************/
38 
39 #ifndef CPUID_H
40 #define CPUID_H
41 
42 #if defined(__i386__) || defined(__x86_64__) || defined(_M_IX86) || defined(_M_X64)
43 #define INTEL_AMD
44 #endif
45 
46 #define VENDOR_INTEL      1
47 #define VENDOR_UMC        2
48 #define VENDOR_AMD        3
49 #define VENDOR_CYRIX      4
50 #define VENDOR_NEXGEN     5
51 #define VENDOR_CENTAUR    6
52 #define VENDOR_RISE       7
53 #define VENDOR_SIS	  8
54 #define VENDOR_TRANSMETA  9
55 #define VENDOR_NSC	 10
56 #define VENDOR_HYGON	 11
57 #define VENDOR_ZHAOXIN   12
58 #define VENDOR_UNKNOWN   99
59 
60 #define BITMASK(a, b, c) ((((a) >> (b)) & (c)))
61 
62 #define FAMILY_80486  4
63 #define FAMILY_P5     5
64 #define FAMILY_P6     6
65 #define FAMILY_PM     7
66 #define FAMILY_IA64   8
67 
68 #ifdef INTEL_AMD
69 #define GET_EXFAMILY  1
70 #define GET_EXMODEL   2
71 #define GET_TYPE      3
72 #define GET_FAMILY    4
73 #define GET_MODEL     5
74 #define GET_APICID    6
75 #define GET_LCOUNT    7
76 #define GET_CHUNKS    8
77 #define GET_STEPPING  9
78 #define GET_BLANDID  10
79 #define GET_FEATURE  11
80 #define GET_NUMSHARE 12
81 #define GET_NUMCORES 13
82 #endif
83 
84 #ifdef __ia64__
85 #define GET_ARCHREV   1
86 #define GET_FAMILY    2
87 #define GET_MODEL     3
88 #define GET_REVISION  4
89 #define GET_NUMBER    5
90 #endif
91 
92 #define CORE_UNKNOWN     0
93 #define CORE_80486       1
94 #define CORE_P5          2
95 #define CORE_P6          3
96 #define CORE_KATMAI      4
97 #define CORE_COPPERMINE  5
98 #define CORE_NORTHWOOD   6
99 #define CORE_PRESCOTT    7
100 #define CORE_BANIAS      8
101 #define CORE_ATHLON      9
102 #define CORE_OPTERON    10
103 #define CORE_BARCELONA  11
104 #define CORE_VIAC3      12
105 #define CORE_YONAH	13
106 #define CORE_CORE2	14
107 #define CORE_PENRYN	15
108 #define CORE_DUNNINGTON	16
109 #define CORE_NEHALEM	17
110 #define CORE_ATOM	18
111 #define CORE_NANO	19
112 #define CORE_SANDYBRIDGE 20
113 #define CORE_BOBCAT      21
114 #define CORE_BULLDOZER   22
115 #define CORE_PILEDRIVER  23
116 #define CORE_HASWELL     24
117 #define CORE_STEAMROLLER 25
118 #define CORE_EXCAVATOR   26
119 #define CORE_ZEN         27
120 #define CORE_SKYLAKEX    28
121 #define CORE_DHYANA	 29
122 #define CORE_COOPERLAKE  30
123 
124 #define HAVE_SSE      (1 <<  0)
125 #define HAVE_SSE2     (1 <<  1)
126 #define HAVE_SSE3     (1 <<  2)
127 #define HAVE_SSSE3    (1 <<  3)
128 #define HAVE_SSE4_1   (1 <<  4)
129 #define HAVE_SSE4_2   (1 <<  5)
130 #define HAVE_SSE4A    (1 <<  6)
131 #define HAVE_SSE5     (1 <<  7)
132 #define HAVE_MMX      (1 <<  8)
133 #define HAVE_3DNOW    (1 <<  9)
134 #define HAVE_3DNOWEX  (1 << 10)
135 #define HAVE_CMOV     (1 << 11)
136 #define HAVE_PSE      (1 << 12)
137 #define HAVE_CFLUSH   (1 << 13)
138 #define HAVE_HIT      (1 << 14)
139 #define HAVE_MISALIGNSSE (1 << 15)
140 #define HAVE_128BITFPU   (1 << 16)
141 #define HAVE_FASTMOVU    (1 << 17)
142 #define HAVE_AVX      (1 << 18)
143 #define HAVE_FMA4     (1 << 19)
144 #define HAVE_FMA3     (1 << 20)
145 #define HAVE_AVX512VL (1 << 21)
146 #define HAVE_AVX2     (1 << 22)
147 #define HAVE_AVX512BF16  (1 << 23)
148 
149 #define CACHE_INFO_L1_I     1
150 #define CACHE_INFO_L1_D     2
151 #define CACHE_INFO_L2       3
152 #define CACHE_INFO_L3       4
153 #define CACHE_INFO_L1_ITB   5
154 #define CACHE_INFO_L1_DTB   6
155 #define CACHE_INFO_L1_LITB  7
156 #define CACHE_INFO_L1_LDTB  8
157 #define CACHE_INFO_L2_ITB   9
158 #define CACHE_INFO_L2_DTB  10
159 #define CACHE_INFO_L2_LITB 11
160 #define CACHE_INFO_L2_LDTB 12
161 
162 typedef struct {
163   int size;
164   int associative;
165   int linesize;
166   int shared;
167 } cache_info_t;
168 
169 #define CPUTYPE_UNKNOWN			 0
170 #define CPUTYPE_INTEL_UNKNOWN		 1
171 #define CPUTYPE_UMC_UNKNOWN		 2
172 #define CPUTYPE_AMD_UNKNOWN		 3
173 #define CPUTYPE_CYRIX_UNKNOWN		 4
174 #define CPUTYPE_NEXGEN_UNKNOWN		 5
175 #define CPUTYPE_CENTAUR_UNKNOWN		 6
176 #define CPUTYPE_RISE_UNKNOWN		 7
177 #define CPUTYPE_SIS_UNKNOWN		 8
178 #define CPUTYPE_TRANSMETA_UNKNOWN	 9
179 #define CPUTYPE_NSC_UNKNOWN		10
180 
181 #define CPUTYPE_80386			11
182 #define CPUTYPE_80486			12
183 #define CPUTYPE_PENTIUM			13
184 #define CPUTYPE_PENTIUM2		14
185 #define CPUTYPE_PENTIUM3		15
186 #define CPUTYPE_PENTIUMM		16
187 #define CPUTYPE_PENTIUM4		17
188 #define CPUTYPE_CORE2			18
189 #define CPUTYPE_PENRYN			19
190 #define CPUTYPE_DUNNINGTON		20
191 #define CPUTYPE_NEHALEM			21
192 #define CPUTYPE_ATOM			22
193 #define CPUTYPE_ITANIUM			23
194 #define CPUTYPE_ITANIUM2		24
195 #define CPUTYPE_AMD5X86			25
196 #define CPUTYPE_AMDK6			26
197 #define CPUTYPE_ATHLON			27
198 #define CPUTYPE_DURON			28
199 #define CPUTYPE_OPTERON			29
200 #define CPUTYPE_BARCELONA		30
201 #define CPUTYPE_SHANGHAI		31
202 #define CPUTYPE_ISTANBUL		32
203 #define CPUTYPE_CYRIX5X86		33
204 #define CPUTYPE_CYRIXM1			34
205 #define CPUTYPE_CYRIXM2			35
206 #define CPUTYPE_NEXGENNX586		36
207 #define CPUTYPE_CENTAURC6		37
208 #define CPUTYPE_RISEMP6			38
209 #define CPUTYPE_SYS55X			39
210 #define CPUTYPE_CRUSOETM3X		40
211 #define CPUTYPE_NSGEODE			41
212 #define CPUTYPE_VIAC3			42
213 #define CPUTYPE_NANO			43
214 #define CPUTYPE_SANDYBRIDGE             44
215 #define CPUTYPE_BOBCAT                  45
216 #define CPUTYPE_BULLDOZER               46
217 #define CPUTYPE_PILEDRIVER              47
218 #define CPUTYPE_HASWELL 		48
219 #define CPUTYPE_STEAMROLLER 		49
220 #define CPUTYPE_EXCAVATOR 		50
221 #define CPUTYPE_ZEN 			51
222 #define CPUTYPE_SKYLAKEX		52
223 #define CPUTYPE_DHYANA			53
224 #define CPUTYPE_COOPERLAKE		54
225 
226 #define CPUTYPE_HYGON_UNKNOWN		99
227 
228 #endif
229