| /dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/imx/imx8m/include/ |
| H A D | imx8m_psci.h | 10 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro
|
| /dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/imx/imx8m/include/ |
| H A D | imx8m_psci.h | 10 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro
|
| /dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/imx/imx8m/include/ |
| H A D | imx8m_psci.h | 10 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro
|
| /dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/imx/imx8m/include/ |
| H A D | imx8m_psci.h | 10 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro
|
| /dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/imx/imx8m/include/ |
| H A D | imx8m_psci.h | 10 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro
|
| /dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/ti/k3/common/ |
| H A D | k3_psci.c | 20 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro
|
| /dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/ti/k3/common/ |
| H A D | k3_psci.c | 20 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro
|
| /dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/ti/k3/common/ |
| H A D | k3_psci.c | 20 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro
|
| /dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/ti/k3/common/ |
| H A D | k3_psci.c | 20 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro
|
| /dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/ti/k3/common/ |
| H A D | k3_psci.c | 20 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro
|
| /dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/imx/imx8qm/ |
| H A D | imx8qm_psci.c | 22 #define CORE_PWR_STATE(state) \ macro
|
| /dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/imx/imx8qm/ |
| H A D | imx8qm_psci.c | 22 #define CORE_PWR_STATE(state) \ macro
|
| /dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/imx/imx8qm/ |
| H A D | imx8qm_psci.c | 22 #define CORE_PWR_STATE(state) \ macro
|
| /dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/imx/imx8qm/ |
| H A D | imx8qm_psci.c | 22 #define CORE_PWR_STATE(state) \ macro
|
| /dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/imx/imx8qm/ |
| H A D | imx8qm_psci.c | 22 #define CORE_PWR_STATE(state) \ macro
|
| /dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/hisilicon/hikey/ |
| H A D | hikey_pm.c | 23 #define CORE_PWR_STATE(state) \ macro
|
| /dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/hisilicon/hikey/ |
| H A D | hikey_pm.c | 23 #define CORE_PWR_STATE(state) \ macro
|
| /dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/hisilicon/hikey/ |
| H A D | hikey_pm.c | 23 #define CORE_PWR_STATE(state) \ macro
|
| /dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/hisilicon/hikey/ |
| H A D | hikey_pm.c | 23 #define CORE_PWR_STATE(state) \ macro
|
| /dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/hisilicon/hikey/ |
| H A D | hikey_pm.c | 23 #define CORE_PWR_STATE(state) \ macro
|
| /dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/renesas/common/ |
| H A D | plat_pm.c | 37 #define CORE_PWR_STATE(s) ((s)->pwr_domain_state[MPIDR_AFFLVL0]) macro
|
| /dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/renesas/common/ |
| H A D | plat_pm.c | 37 #define CORE_PWR_STATE(s) ((s)->pwr_domain_state[MPIDR_AFFLVL0]) macro
|
| /dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/renesas/common/ |
| H A D | plat_pm.c | 37 #define CORE_PWR_STATE(s) ((s)->pwr_domain_state[MPIDR_AFFLVL0]) macro
|
| /dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/renesas/common/ |
| H A D | plat_pm.c | 37 #define CORE_PWR_STATE(s) ((s)->pwr_domain_state[MPIDR_AFFLVL0]) macro
|
| /dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/renesas/common/ |
| H A D | plat_pm.c | 37 #define CORE_PWR_STATE(s) ((s)->pwr_domain_state[MPIDR_AFFLVL0]) macro
|