xref: /original-bsd/sys/pmax/include/dc7085cons.h (revision 99c3aed0)
1 /*
2  * Copyright (c) 1992, 1993
3  *	The Regents of the University of California.  All rights reserved.
4  *
5  * This code is derived from software contributed to Berkeley by
6  * Ralph Campbell and Rick Macklem.
7  *
8  * %sccs.include.redist.c%
9  *
10  *	@(#)dc7085cons.h	8.1 (Berkeley) 06/10/93
11  *
12  * dc7085.h --
13  *
14  *     	Definitions for the dc7085 chip.
15  *
16  *	Copyright (C) 1989 Digital Equipment Corporation.
17  *	Permission to use, copy, modify, and distribute this software and
18  *	its documentation for any purpose and without fee is hereby granted,
19  *	provided that the above copyright notice appears in all copies.
20  *	Digital Equipment Corporation makes no representations about the
21  *	suitability of this software for any purpose.  It is provided "as is"
22  *	without express or implied warranty.
23  *
24  * from: $Header: /sprite/src/kernel/dev/ds3100.md/RCS/dc7085.h,
25  *	v 1.4 89/08/15 19:52:46 rab Exp $ SPRITE (DECWRL)
26  */
27 
28 #ifndef _DC7085
29 #define _DC7085
30 
31 typedef volatile struct dc7085regs {
32 	u_short	dc_csr;		/* control and status (R/W) */
33 	u_short	pad0[3];
34 	short	dc_rbuf_lpr;	/* receiver data (R), line params (W) */
35 	u_short	pad1[3];
36 	u_short	dc_tcr;		/* transmitter control (R/W) */
37 	u_short	pad2[3];
38 	u_short	dc_msr_tdr;	/* modem status (R), transmit data (W) */
39 } dcregs;
40 #define dc_rbuf	dc_rbuf_lpr
41 #define dc_lpr	dc_rbuf_lpr
42 #define dc_msr	dc_msr_tdr
43 #define dc_tdr	dc_msr_tdr
44 
45 /*
46  * Control status register bits.
47  */
48 #define	CSR_TRDY	0x8000
49 #define CSR_TIE		0x4000
50 #define	CSR_TX_LINE_NUM	0x0300
51 #define	CSR_RDONE	0x0080
52 #define	CSR_RIE		0x0040
53 #define CSR_MSE		0x0020
54 #define CSR_CLR		0x0010
55 #define CSR_MAINT	0x0008
56 
57 /*
58  * Receiver buffer register bits.
59  */
60 #define	RBUF_DVAL		0x8000
61 #define RBUF_OERR		0x4000
62 #define RBUF_FERR		0x2000
63 #define RBUF_PERR		0x1000
64 #define RBUF_LINE_NUM		0x0300
65 #define RBUF_LINE_NUM_SHIFT	8
66 #define RBUF_CHAR		0x00FF
67 
68 /*
69  * Transmit control register values.
70  */
71 #define TCR_DTR2		0x400
72 #define TCR_EN3			0x008
73 #define TCR_EN2			0x004
74 #define TCR_EN1			0x002
75 #define TCR_EN0			0x001
76 
77 #define TCR_RTS2		0x800
78 #define TCR_RTS3		0x200
79 #define TCR_DTR3		0x100
80 
81 /*
82  * Line parameter register bits.
83  */
84 #define	LPR_RXENAB	0x1000
85 #define LPR_B50		0x0000
86 #define LPR_B75		0x0100
87 #define LPR_B110	0x0200
88 #define LPR_B134	0x0300
89 #define LPR_B150	0x0400
90 #define LPR_B300	0x0500
91 #define LPR_B600	0x0600
92 #define LPR_B1200	0x0700
93 #define LPR_B1800	0x0800
94 #define LPR_B2000	0x0900
95 #define LPR_B2400	0x0A00
96 #define LPR_B3600	0x0B00
97 #define	LPR_B4800	0x0C00
98 #define LPR_B7200	0x0D00
99 #define LPR_B9600	0x0E00
100 #define LPR_B19200	0x0F00
101 #define LPR_B38400	0x0F00
102 #define LPR_OPAR	0x0080
103 #define LPR_PARENB	0x0040
104 #define LPR_2_STOP	0x0020
105 #define LPR_8_BIT_CHAR	0x0018
106 #define LPR_7_BIT_CHAR	0x0010
107 #define LPR_6_BIT_CHAR	0x0008
108 #define LPR_5_BIT_CHAR	0x0000
109 
110 /*
111  * Modem status register bits.
112  */
113 #define	MSR_DSR2	0x0200
114 
115 #define	MSR_RI2		0x0800
116 #define	MSR_CD2		0x0400
117 #define	MSR_CTS2	0x0100
118 #define	MSR_RI3		0x0008
119 #define	MSR_CD3		0x0004
120 #define	MSR_DSR3	0x0002
121 #define	MSR_CTS3	0x0001
122 
123 /*
124  * The four serial ports.
125  */
126 #define DCKBD_PORT	0
127 #define DCMOUSE_PORT	1
128 #define DCCOMM_PORT	2
129 #define DCPRINTER_PORT	3
130 
131 /* bits in dm lsr, copied from dmreg.h */
132 #define	DML_DSR		0000400		/* data set ready, not a real DM bit */
133 #define	DML_RNG		0000200		/* ring */
134 #define	DML_CAR		0000100		/* carrier detect */
135 #define	DML_CTS		0000040		/* clear to send */
136 #define	DML_SR		0000020		/* secondary receive */
137 #define	DML_ST		0000010		/* secondary transmit */
138 #define	DML_RTS		0000004		/* request to send */
139 #define	DML_DTR		0000002		/* data terminal ready */
140 #define	DML_LE		0000001		/* line enable */
141 
142 #endif /* _DC7085 */
143