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Searched defs:DAGB1_WR_VC5_CNTL__MIN_BW__SHIFT (Results 1 – 2 of 2) sorted by last modified time

/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_9_3_0_sh_mask.h3094 #define DAGB1_WR_VC5_CNTL__MIN_BW__SHIFT … macro
H A Dmmhub_1_0_sh_mask.h3094 #define DAGB1_WR_VC5_CNTL__MIN_BW__SHIFT … macro