1/*------------------------------------------------------------- 2 3cache_asm.S -- Cache interface 4 5Copyright (C) 2004 6Michael Wiedenbauer (shagkur) 7Dave Murphy (WinterMute) 8 9This software is provided 'as-is', without any express or implied 10warranty. In no event will the authors be held liable for any 11damages arising from the use of this software. 12 13Permission is granted to anyone to use this software for any 14purpose, including commercial applications, and to alter it and 15redistribute it freely, subject to the following restrictions: 16 171. The origin of this software must not be misrepresented; you 18must not claim that you wrote the original software. If you use 19this software in a product, an acknowledgment in the product 20documentation would be appreciated but is not required. 21 222. Altered source versions must be plainly marked as such, and 23must not be misrepresented as being the original software. 24 253. This notice may not be removed or altered from any source 26distribution. 27 28-------------------------------------------------------------*/ 29 30#include <asm.h> 31 32 .globl DCFlashInvalidate 33DCFlashInvalidate: 34 mfspr r3,HID0 35 ori r3,r3,0x0400 36 mtspr HID0,r3 37 isync 38 blr 39 40 .globl DCEnable 41DCEnable: 42 mfspr r3,HID0 43 ori r3,r3,0x4000 44 mtspr HID0,r3 45 isync 46 blr 47 48 .globl DCDisable 49DCDisable: 50 mfspr r3,HID0 51 rlwinm r3,r3,0,18,16 52 mtspr HID0,r3 53 isync 54 blr 55 56 .globl DCFreeze 57DCFreeze: 58 mfspr r3,HID0 59 ori r3,r3,0x1000 60 mtspr HID0,r3 61 isync 62 blr 63 64 .globl DCUnfreeze 65DCUnfreeze: 66 mfspr r3,HID0 67 rlwinm r3,r3,0,20,18 68 mtspr HID0,r3 69 isync 70 blr 71 72 .globl DCTouchLoad 73DCTouchLoad: 74 dcbt r0,r3 75 blr 76 77 .globl DCBlockZero 78DCBlockZero: 79 dcbz r0,r3 80 blr 81 82 .globl DCBlockStore 83DCBlockStore: 84 dcbst r0,r3 85 blr 86 87 .globl DCBlockFlush 88DCBlockFlush: 89 dcbf r0,r3 90 blr 91 92 .globl DCBlockInvalidate 93DCBlockInvalidate: 94 dcbi r0,r3 95 blr 96 97 .globl DCInvalidateRange 98DCInvalidateRange: 99 cmplwi r4, 0 # zero or negative size? 100 blelr 101 clrlwi. r5, r3, 27 # check for lower bits set in address 102 beq 1f 103 addi r4, r4, 0x20 1041: 105 addi r4, r4, 0x1f 106 srwi r4, r4, 5 107 mtctr r4 1082: 109 dcbi r0, r3 110 addi r3, r3, 0x20 111 bdnz 2b 112 blr 113 114 .globl DCFlushRange 115DCFlushRange: 116 cmplwi r4, 0 # zero or negative size? 117 blelr 118 clrlwi. r5, r3, 27 # check for lower bits set in address 119 beq 1f 120 addi r4, r4, 0x20 1211: 122 addi r4, r4, 0x1f 123 srwi r4, r4, 5 124 mtctr r4 1252: 126 dcbf r0, r3 127 addi r3, r3, 0x20 128 bdnz 2b 129 sc 130 blr 131 132 .globl DCStoreRange 133DCStoreRange: 134 cmplwi r4, 0 # zero or negative size? 135 blelr 136 clrlwi. r5, r3, 27 # check for lower bits set in address 137 beq 1f 138 addi r4, r4, 0x20 1391: 140 addi r4, r4, 0x1f 141 srwi r4, r4, 5 142 mtctr r4 1432: 144 dcbst r0, r3 145 addi r3, r3, 0x20 146 bdnz 2b 147 sc 148 blr 149 150 .globl DCFlushRangeNoSync 151DCFlushRangeNoSync: 152 cmplwi r4, 0 # zero or negative size? 153 blelr 154 clrlwi. r5, r3, 27 # check for lower bits set in address 155 beq 1f 156 addi r4, r4, 0x20 1571: 158 addi r4, r4, 0x1f 159 srwi r4, r4, 5 160 mtctr r4 1612: 162 dcbf r0, r3 163 addi r3, r3, 0x20 164 bdnz 2b 165 blr 166 167 .globl DCStoreRangeNoSync 168DCStoreRangeNoSync: 169 cmplwi r4, 0 # zero or negative size? 170 blelr 171 clrlwi. r5, r3, 27 # check for lower bits set in address 172 beq 1f 173 addi r4, r4, 0x20 1741: 175 addi r4, r4, 0x1f 176 srwi r4, r4, 5 177 mtctr r4 1782: 179 dcbst r0, r3 180 addi r3, r3, 0x20 181 bdnz 2b 182 blr 183 184 .globl DCZeroRange 185DCZeroRange: 186 cmplwi r4, 0 # zero or negative size? 187 blelr 188 clrlwi. r5, r3, 27 # check for lower bits set in address 189 beq 1f 190 addi r4, r4, 0x20 1911: 192 addi r4, r4, 0x1f 193 srwi r4, r4, 5 194 mtctr r4 1952: 196 dcbz r0, r3 197 addi r3, r3, 0x20 198 bdnz 2b 199 blr 200 201 .globl DCTouchRange 202DCTouchRange: 203 cmplwi r4, 0 # zero or negative size? 204 blelr 205 clrlwi. r5, r3, 27 # check for lower bits set in address 206 beq 1f 207 addi r4, r4, 0x20 2081: 209 addi r4, r4, 0x1f 210 srwi r4, r4, 5 211 mtctr r4 2122: 213 dcbt r0, r3 214 addi r3, r3, 0x20 215 bdnz 2b 216 blr 217 218 .globl ICInvalidateRange 219ICInvalidateRange: 220 cmplwi r4, 0 # zero or negative size? 221 blelr 222 clrlwi. r5, r3, 27 # check for lower bits set in address 223 beq 1f 224 addi r4, r4, 0x20 2251: 226 addi r4, r4, 0x1f 227 srwi r4, r4, 5 228 mtctr r4 2292: 230 icbi r0, r3 231 addi r3, r3, 0x20 232 bdnz 2b 233 sync 234 isync 235 blr 236 237 .globl ICFlashInvalidate 238ICFlashInvalidate: 239 mfspr r3,HID0 240 ori r3,r3,0x0800 241 mtspr HID0,r3 242 isync 243 blr 244 245 .globl ICEnable 246ICEnable: 247 mfspr r3,HID0 248 ori r3,r3,0x8000 249 mtspr HID0,r3 250 isync 251 blr 252 253 .globl ICDisable 254ICDisable: 255 mfspr r3,HID0 256 rlwinm r3,r3,0,17,15 257 mtspr HID0,r3 258 isync 259 blr 260 261 .globl ICFreeze 262ICFreeze: 263 mfspr r3,HID0 264 ori r3,r3,0x2000 265 mtspr HID0,r3 266 isync 267 blr 268 269 .globl ICUnfreeze 270ICUnfreeze: 271 mfspr r3,HID0 272 rlwinm r3,r3,0,19,17 273 mtspr HID0,r3 274 isync 275 blr 276 277 .globl ICBlockInvalidate 278ICBlockInvalidate: 279 icbi r0,r3 280 blr 281 282 .globl ICSync 283ICSync: 284 isync 285 blr 286 287 .globl L2Init 288L2Init: 289 mflr r0 290 stw r0,4(sp) 291 stwu sp,-16(sp) 292 stw r31,12(sp) 293 mfmsr r3 294 mr r31,r3 295 sync 296 li r3,48 297 mtmsr r3 298 sync 299 bl L2Disable 300 bl L2GlobalInvalidate 301 mr r3,r31 302 mtmsr r3 303 lwz r0,20(sp) 304 lwz r31,12(sp) 305 mtlr r0 306 blr 307 308 .globl L2Enable 309L2Enable: 310 sync 311 mfspr r3,L2CR; 312 oris r0,r3,0x8000 313 rlwinm r3,r0,0,11,9 314 mtspr L2CR,r3 315 sync 316 blr 317 318 .globl L2Disable 319L2Disable: 320 sync 321 mfspr r3,L2CR 322 clrlwi r3,r3,1 323 mtspr L2CR,r3 324 sync 325 blr 326 327 .globl L2GlobalInvalidate 328L2GlobalInvalidate: 329 mflr r0 330 stw r0,4(sp) 331 stwu sp,-8(sp) 332 bl L2Disable 333 mfspr r3,L2CR 334 oris r3,r3,0x0020 335 mtspr L2CR,r3 3361: mfspr r3,L2CR 337 clrlwi r0,r3,31 338 cmplwi r0,0x0000 339 bne 1b 340 mfspr r3,L2CR 341 rlwinm r3,r3,0,11,9 342 mtspr L2CR,r3 3432: mfspr r3,L2CR 344 clrlwi r0,r3,31 345 cmplwi r0,0x0000 346 bne 2b 347 lwz r0,12(sp) 348 addi sp,sp,8 349 mtlr r0 350 blr 351 352 .globl __LCEnable 353__LCEnable: 354 mfmsr r5 355 ori r5,r5,0x1000 356 mtmsr r5 357 lis r3,0x8000 358 li r4,1024 359 mtctr r4 3601: dcbt r0,r3 361 dcbst r0,r3 362 addi r3,r3,32 363 bdnz 1b 364 mfspr r4,HID2 365 oris r4,r4,0x100f 366 mtspr HID2,r4 367 nop 368 nop 369 nop 370 nop 371 nop 372 nop 373 nop 374 nop 375 nop 376 nop 377 nop 378 nop 379 lis r3,0xe000 380 ori r3,r3,0x0002 381 mtspr DBAT3L,r3 382 ori r3,r3,0x01fe 383 mtspr DBAT3U,r3 384 isync 385 lis r3,0xe000 386 li r6,512 387 mtctr r6 388 li r6,0 3892: dcbz_l r6,r3 390 addi r3,r3,32 391 bdnz 2b 392 nop 393 nop 394 nop 395 nop 396 nop 397 nop 398 nop 399 nop 400 nop 401 nop 402 nop 403 nop 404 blr 405 406 .globl LCDisable 407LCDisable: 408 lis r3,0xe000 409 li r4,512 410 mtctr r4 4111: dcbi r0,r3 412 addi r3,r3,32 413 bdnz 1b 414 mfspr r4,HID2 415 rlwinm r4,r4,0,4,2 416 mtspr HID2,r4 417 blr 418 419 .globl LCAllocOneTag 420LCAllocOneTag: 421 cmpwi r3,0 422 beq 1f 423 dcbi r0,r4 4241: dcbz_l r0,r4 425 blr 426 427 .globl LCAllocTags 428LCAllocTags: 429 mflr r6 430 cmplwi r5,0 431 ble 2f 432 mtctr r5 433 cmpwi r3,0 434 beq 3f 4351: dcbi r0,r4 436 dcbz_l r0,r4 437 addi r4,r4,32 438 bdnz 1b 439 b 2f 4403: dcbz_l r0,r4 441 addi r4,r4,32 442 bdnz 3b 4432: mtlr r6 444 blr 445 446 .globl LCLoadBlocks 447LCLoadBlocks: 448 extrwi r6,r5,5,25 449 clrlwi r4,r4,4 450 or r6,r6,r4 451 mtspr DMAU,r6 452 clrlslwi r6,r5,30,2 453 or r6,r6,r3 454 ori r6,r6,0x0012 455 mtspr DMAL,r6 456 blr 457 458 .globl LCStoreBlocks 459LCStoreBlocks: 460 extrwi r6,r5,5,25 461 clrlwi r4,r4,4 462 or r6,r6,r3 463 mtspr DMAU,r6 464 clrlslwi r6,r5,30,2 465 or r6,r6,r4 466 ori r6,r6,0x0002 467 mtspr DMAL,r6 468 blr 469