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Searched defs:DCP_GSL_SYNC_SOURCE_PHASE0 (Results 1 – 3 of 3) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_enum.h1919 DCP_GSL_SYNC_SOURCE_PHASE0 = 0x1, enumerator
H A Ddce_11_2_enum.h2382 DCP_GSL_SYNC_SOURCE_PHASE0 = 0x1, enumerator
/openbsd/sys/dev/pci/drm/amd/include/
H A Dvega10_enum.h5853 DCP_GSL_SYNC_SOURCE_PHASE0 = 0x00000001, enumerator