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Searched defs:DDRC_SBRCTL (Results 51 – 62 of 62) sorted by relevance

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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dddr.h527 #define DDRC_SBRCTL(X) (DDRC_IPS_BASE_ADDR(X) + 0xf24) macro
/dports/sysutils/u-boot-pinebook/u-boot-2021.07/arch/arm/include/asm/arch-imx8m/
H A Dddr.h527 #define DDRC_SBRCTL(X) (DDRC_IPS_BASE_ADDR(X) + 0xf24) macro
/dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/include/asm/arch-imx8m/
H A Dddr.h527 #define DDRC_SBRCTL(X) (DDRC_IPS_BASE_ADDR(X) + 0xf24) macro
/dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/arch/arm/include/asm/arch-imx8m/
H A Dddr.h527 #define DDRC_SBRCTL(X) (DDRC_IPS_BASE_ADDR(X) + 0xf24) macro
/dports/sysutils/u-boot-rpi/u-boot-2021.07/arch/arm/include/asm/arch-imx8m/
H A Dddr.h527 #define DDRC_SBRCTL(X) (DDRC_IPS_BASE_ADDR(X) + 0xf24) macro
/dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/arch/arm/include/asm/arch-imx8m/
H A Dddr.h527 #define DDRC_SBRCTL(X) (DDRC_IPS_BASE_ADDR(X) + 0xf24) macro
/dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/arch/arm/include/asm/arch-imx8m/
H A Dddr.h527 #define DDRC_SBRCTL(X) (DDRC_IPS_BASE_ADDR(X) + 0xf24) macro
/dports/sysutils/u-boot-rpi2/u-boot-2021.07/arch/arm/include/asm/arch-imx8m/
H A Dddr.h527 #define DDRC_SBRCTL(X) (DDRC_IPS_BASE_ADDR(X) + 0xf24) macro
/dports/sysutils/u-boot-riotboard/u-boot-2021.07/arch/arm/include/asm/arch-imx8m/
H A Dddr.h527 #define DDRC_SBRCTL(X) (DDRC_IPS_BASE_ADDR(X) + 0xf24) macro
/dports/sysutils/u-boot-rock64/u-boot-2021.07/arch/arm/include/asm/arch-imx8m/
H A Dddr.h527 #define DDRC_SBRCTL(X) (DDRC_IPS_BASE_ADDR(X) + 0xf24) macro
/dports/sysutils/u-boot-rpi3/u-boot-2021.07/arch/arm/include/asm/arch-imx8m/
H A Dddr.h527 #define DDRC_SBRCTL(X) (DDRC_IPS_BASE_ADDR(X) + 0xf24) macro
/dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/arch/arm/include/asm/arch-imx8m/
H A Dddr.h527 #define DDRC_SBRCTL(X) (DDRC_IPS_BASE_ADDR(X) + 0xf24) macro

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