1 /* Definitions of target machine for GNU compiler.  AT&T DSP1600.
2    Copyright (C) 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002
3    Free Software Foundation, Inc.
4    Contributed by Michael Collison (collison@isisinc.net).
5 
6 This file is part of GNU CC.
7 
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12 
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16 GNU General Public License for more details.
17 
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING.  If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA.  */
22 
23 extern const char *low_reg_names[];
24 extern const char *text_seg_name;
25 extern const char *rsect_text;
26 extern const char *data_seg_name;
27 extern const char *rsect_data;
28 extern const char *bss_seg_name;
29 extern const char *rsect_bss;
30 extern const char *const_seg_name;
31 extern const char *rsect_const;
32 extern const char *chip_name;
33 extern const char *save_chip_name;
34 extern GTY(()) rtx dsp16xx_compare_op0;
35 extern GTY(()) rtx dsp16xx_compare_op1;
36 extern GTY(()) rtx dsp16xx_addhf3_libcall;
37 extern GTY(()) rtx dsp16xx_subhf3_libcall;
38 extern GTY(()) rtx dsp16xx_mulhf3_libcall;
39 extern GTY(()) rtx dsp16xx_divhf3_libcall;
40 extern GTY(()) rtx dsp16xx_cmphf3_libcall;
41 extern GTY(()) rtx dsp16xx_fixhfhi2_libcall;
42 extern GTY(()) rtx dsp16xx_floathihf2_libcall;
43 extern GTY(()) rtx dsp16xx_neghf2_libcall;
44 extern GTY(()) rtx dsp16xx_mulhi3_libcall;
45 extern GTY(()) rtx dsp16xx_udivqi3_libcall;
46 extern GTY(()) rtx dsp16xx_udivhi3_libcall;
47 extern GTY(()) rtx dsp16xx_divqi3_libcall;
48 extern GTY(()) rtx dsp16xx_divhi3_libcall;
49 extern GTY(()) rtx dsp16xx_modqi3_libcall;
50 extern GTY(()) rtx dsp16xx_modhi3_libcall;
51 extern GTY(()) rtx dsp16xx_umodqi3_libcall;
52 extern GTY(()) rtx dsp16xx_umodhi3_libcall;
53 
54 extern GTY(()) rtx dsp16xx_ashrhi3_libcall;
55 extern GTY(()) rtx dsp16xx_ashlhi3_libcall;
56 extern GTY(()) rtx dsp16xx_lshrhi3_libcall;
57 
58 /* RUN-TIME TARGET SPECIFICATION */
59 #define DSP16XX   1
60 
61 /* Name of the AT&T assembler */
62 
63 #define ASM_PROG "as1600"
64 
65 /* Name of the AT&T linker */
66 
67 #define LD_PROG "ld1600"
68 
69 /* Define which switches take word arguments */
70 #define WORD_SWITCH_TAKES_ARG(STR)              \
71   (!strcmp (STR, "ifile") ? 1 :                 \
72    0)
73 
74 #undef  CC1_SPEC
75 #define CC1_SPEC       "%{!O*:-O}"
76 
77 /* Define this as a spec to call the AT&T assembler */
78 
79 #define CROSS_ASM_SPEC   "%{!S:as1600 %a %i\n }"
80 
81 /* Define this as a spec to call the AT&T linker */
82 
83 #define CROSS_LINK_SPEC  "%{!c:%{!M:%{!MM:%{!E:%{!S:ld1600 %l %X %{o*} %{m} \
84 			%{r} %{s} %{t} %{u*} %{x}\
85 			%{!A:%{!nostdlib:%{!nostartfiles:%S}}} %{static:}\
86 			%{L*} %D %o %{!nostdlib:-le1600 %L -le1600}\
87 			%{!A:%{!nostdlib:%{!nostartfiles:%E}}}\n }}}}}"
88 
89 /* Nothing complicated here, just link with libc.a under normal
90    circumstances */
91 #define LIB_SPEC "-lc"
92 
93 /* Specify the startup file to link with.  */
94 #define STARTFILE_SPEC "%{mmap1:m1_crt0.o%s}  \
95 %{mmap2:m2_crt0.o%s}                          \
96 %{mmap3:m3_crt0.o%s}                          \
97 %{mmap4:m4_crt0.o%s}                          \
98 %{!mmap*: %{!ifile*: m4_crt0.o%s} %{ifile*:     \
99 %ea -ifile option requires a -map option}}"
100 
101 /* Specify the end file to link with */
102 
103 #define ENDFILE_SPEC "%{mmap1:m1_crtn.o%s}  \
104 %{mmap2:m2_crtn.o%s}                          \
105 %{mmap3:m3_crtn.o%s}                          \
106 %{mmap4:m4_crtn.o%s}                          \
107 %{!mmap*: %{!ifile*: m4_crtn.o%s} %{ifile*:     \
108 %ea -ifile option requires a -map option}}"
109 
110 
111 /* Tell gcc where to look for the startfile */
112 /*#define STANDARD_STARTFILE_PREFIX   "/d1600/lib"*/
113 
114 /* Tell gcc where to look for it's executables */
115 /*#define STANDARD_EXEC_PREFIX  "/d1600/bin"*/
116 
117 /* Command line options to the AT&T assembler */
118 #define ASM_SPEC  "%{V} %{v:%{!V:-V}} %{g*:-g}"
119 
120 /* Command line options for the AT&T linker */
121 
122 #define LINK_SPEC "%{V} %{v:%{!V:-V}} %{minit:-i}  \
123 %{!ifile*:%{mmap1:m1_deflt.if%s}         \
124           %{mmap2:m2_deflt.if%s}         \
125           %{mmap3:m3_deflt.if%s}         \
126           %{mmap4:m4_deflt.if%s}         \
127           %{!mmap*:m4_deflt.if%s}}       \
128 %{ifile*:%*} %{r}"
129 
130 /* Include path is determined from the environment variable */
131 #define INCLUDE_DEFAULTS     \
132 {                            \
133   { 0, 0, 0 }                \
134 }
135 
136 /* Names to predefine in the preprocessor for this target machine.  */
137 #define TARGET_CPU_CPP_BUILTINS()		\
138   do						\
139     {						\
140       builtin_define_std ("dsp1600");		\
141       builtin_define_std ("DSP1600");		\
142     }						\
143   while (0)
144 
145 #ifdef __MSDOS__
146 # define TARGET_OS_CPP_BUILTINS()		\
147   do						\
148     {						\
149       builtin_define_std ("MSDOS");		\
150     }						\
151   while (0)
152 #else
153 # define TARGET_OS_CPP_BUILTINS()		\
154   do						\
155     {						\
156       builtin_define_std ("dsp1610");		\
157       builtin_define_std ("DSP1610");		\
158     }						\
159   while (0)
160 #endif
161 
162 /* Run-time compilation parameters selecting different hardware subsets.  */
163 
164 extern int target_flags;
165 
166 /* Macros used in the machine description to test the flags.  */
167 
168 #define MASK_REGPARM         0x00000001    /* Pass parameters in registers */
169 #define MASK_NEAR_CALL       0x00000002    /* The call is on the same 4k page */
170 #define MASK_NEAR_JUMP       0x00000004    /* The jump is on the same 4k page */
171 #define MASK_BMU             0x00000008    /* Use the 'bmu' shift instructions */
172 #define MASK_MAP1            0x00000040    /* Link with map1 */
173 #define MASK_MAP2            0x00000080    /* Link with map2 */
174 #define MASK_MAP3            0x00000100    /* Link with map3 */
175 #define MASK_MAP4            0x00000200    /* Link with map4 */
176 #define MASK_YBASE_HIGH      0x00000400    /* The ybase register window starts high */
177 #define MASK_INIT	     0x00000800    /* Have the linker generate tables to
178 					      initialize data at startup */
179 #define MASK_RESERVE_YBASE   0x00002000    /* Reserved the ybase registers */
180 #define MASK_DEBUG           0x00004000	   /* Debugging turned on*/
181 #define MASK_SAVE_TEMPS      0x00008000    /* Save temps. option seen */
182 
183 /* Compile passing first two args in regs 0 and 1.
184    This exists only to test compiler features that will
185    be needed for RISC chips.  It is not usable
186    and is not intended to be usable on this cpu.  */
187 #define TARGET_REGPARM   (target_flags & MASK_REGPARM)
188 
189 /* The call is on the same 4k page, so instead of loading
190    the 'pt' register and branching, we can branch directly */
191 
192 #define TARGET_NEAR_CALL (target_flags & MASK_NEAR_CALL)
193 
194 /* The jump is on the same 4k page, so instead of loading
195    the 'pt' register and branching, we can branch directly */
196 
197 #define TARGET_NEAR_JUMP (target_flags & MASK_NEAR_JUMP)
198 
199 /* Generate shift instructions to use the 1610 Bit Manipulation
200    Unit.  */
201 #define TARGET_BMU (target_flags & MASK_BMU)
202 
203 #define TARGET_YBASE_HIGH (target_flags & MASK_YBASE_HIGH)
204 
205 /* Direct the linker to output extra info for initialized data */
206 #define TARGET_MASK_INIT (target_flags & MASK_INIT)
207 
208 #define TARGET_INLINE_MULT (target_flags & MASK_INLINE_MULT)
209 
210 /* Reserve the ybase registers *(0) - *(31) */
211 #define TARGET_RESERVE_YBASE (target_flags & MASK_RESERVE_YBASE)
212 
213 /* We turn this option on internally after seeing "-g" */
214 #define TARGET_DEBUG            (target_flags & MASK_DEBUG)
215 
216 /* We turn this option on internally after seeing "-save-temps */
217 #define TARGET_SAVE_TEMPS       (target_flags & MASK_SAVE_TEMPS)
218 
219 
220 /* Macro to define tables used to set the flags.
221    This is a list in braces of pairs in braces,
222    each pair being { "NAME", VALUE }
223    where VALUE is the bits to set or minus the bits to clear.
224    An empty string NAME is used to identify the default VALUE.  */
225 
226 
227 #define TARGET_SWITCHES                                           \
228   {				                                  \
229     { "regparm",       MASK_REGPARM,                              \
230       N_("Pass parameters in registers (default)") },             \
231     { "no-regparm",   -MASK_REGPARM,	                          \
232       N_("Don't pass parameters in registers") },                 \
233     { "near-call",     MASK_NEAR_JUMP,                            \
234       N_("Generate code for near calls") },                       \
235     { "no-near-call", -MASK_NEAR_CALL,                            \
236       N_("Don't generate code for near calls") },                 \
237     { "near-jump",     MASK_NEAR_JUMP,                            \
238       N_("Generate code for near jumps") },                       \
239     { "no-near-jump", -MASK_NEAR_JUMP,                            \
240       N_("Don't generate code for near jumps") },                 \
241     { "bmu",           MASK_BMU,                                  \
242       N_("Generate code for a bit-manipulation unit") },          \
243     { "no-bmu",       -MASK_BMU,                                  \
244       N_("Don't generate code for a bit-manipulation unit") },    \
245     { "map1",          MASK_MAP1,                                 \
246       N_("Generate code for memory map1") },                      \
247     { "map2",          MASK_MAP2,                                 \
248       N_("Generate code for memory map2") },                      \
249     { "map3",          MASK_MAP3,                                 \
250       N_("Generate code for memory map3") },                      \
251     { "map4",          MASK_MAP4,                                 \
252       N_("Generate code for memory map4") },                      \
253     { "init",          MASK_INIT,                                 \
254       N_("Ouput extra code for initialized data") },              \
255     { "reserve-ybase", MASK_RESERVE_YBASE,                        \
256       N_("Don't let reg. allocator use ybase registers") },       \
257     { "debug",         MASK_DEBUG,                                \
258       N_("Output extra debug info in Luxworks environment") },    \
259     { "save-temporaries",    MASK_SAVE_TEMPS,                     \
260       N_("Save temp. files in Luxworks environment") },           \
261     { "",              TARGET_DEFAULT, ""}                        \
262   }
263 
264 /* Default target_flags if no switches are specified */
265 #ifndef TARGET_DEFAULT
266 #define TARGET_DEFAULT  MASK_REGPARM|MASK_YBASE_HIGH
267 #endif
268 
269 #define TARGET_OPTIONS						\
270 {								\
271   { "text=",	&text_seg_name,				        \
272     N_("Specify alternate name for text section") },            \
273   { "data=",	&data_seg_name,				        \
274     N_("Specify alternate name for data section") },            \
275   { "bss=",	&bss_seg_name,				        \
276     N_("Specify alternate name for bss section") },             \
277   { "const=",   &const_seg_name,                                \
278     N_("Specify alternate name for constant section") },        \
279   { "chip=",    &chip_name,                                     \
280     N_("Specify alternate name for dsp16xx chip") },            \
281 }
282 
283 /* Sometimes certain combinations of command options do not make sense
284    on a particular target machine.  You can define a macro
285    `OVERRIDE_OPTIONS' to take account of this.  This macro, if
286    defined, is executed once just after all the command options have
287    been parsed.
288 
289    Don't use this macro to turn on various extra optimizations for
290    `-O'.  That is what `OPTIMIZATION_OPTIONS' is for.  */
291 
292 #define OVERRIDE_OPTIONS override_options ()
293 
294 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE)              \
295 {                                                     \
296     flag_gnu_linker             = FALSE;              \
297                                                       \
298     if (LEVEL >= 2)                                   \
299     {                                                 \
300         /* The dsp16xx family has so few registers    \
301          * that running the first instruction         \
302          * scheduling is bad for reg. allocation      \
303          * since it increases lifetimes of pseudos.   \
304          * So turn of first scheduling pass.          \
305          */                                           \
306         flag_schedule_insns          = FALSE;         \
307     }                                                 \
308 }
309 
310 /* STORAGE LAYOUT */
311 
312 /* Define this if most significant bit is lowest numbered
313    in instructions that operate on numbered bit-fields.
314  */
315 #define BITS_BIG_ENDIAN  0
316 
317 /* Define this if most significant byte of a word is the lowest numbered.
318    We define big-endian, but since the 1600 series cannot address bytes
319    it does not matter.  */
320 #define BYTES_BIG_ENDIAN 1
321 
322 /* Define this if most significant word of a multiword number is numbered.
323    For the 1600 we can decide arbitrarily since there are no machine instructions for them.  */
324 #define WORDS_BIG_ENDIAN 1
325 
326 /* number of bits in an addressable storage unit */
327 #define BITS_PER_UNIT 16
328 
329 /* Maximum number of bits in a word.  */
330 #define MAX_BITS_PER_WORD 16
331 
332 /* Width of a word, in units (bytes).  */
333 #define UNITS_PER_WORD 1
334 
335 /* Allocation boundary (in *bits*) for storing pointers in memory.  */
336 #define POINTER_BOUNDARY 16
337 
338 /* Allocation boundary (in *bits*) for storing arguments in argument list.  */
339 #define PARM_BOUNDARY 16
340 
341 /* Boundary (in *bits*) on which stack pointer should be aligned.  */
342 #define STACK_BOUNDARY 16
343 
344 /* Allocation boundary (in *bits*) for the code of a function.  */
345 #define FUNCTION_BOUNDARY 16
346 
347 /* Biggest alignment that any data type can require on this machine, in bits.  */
348 #define BIGGEST_ALIGNMENT 16
349 
350 /* Biggest alignment that any structure field can require on this machine, in bits */
351 #define BIGGEST_FIELD_ALIGNMENT 16
352 
353 /* Alignment of field after `int : 0' in a structure.  */
354 #define EMPTY_FIELD_BOUNDARY 16
355 
356 /* Number of bits which any structure or union's size must be a multiple of. Each structure
357    or union's size is rounded up to a multiple of this */
358 #define STRUCTURE_SIZE_BOUNDARY 16
359 
360 /* Define this if move instructions will actually fail to work
361    when given unaligned data.  */
362 #define STRICT_ALIGNMENT  1
363 
364 /* An integer expression for the size in bits of the largest integer machine mode that
365    should actually be used. All integer machine modes of this size or smaller can be
366    used for structures and unions with the appropriate sizes.  */
367 #define MAX_FIXED_MODE_SIZE 32
368 
369 /* LAYOUT OF SOURCE LANGUAGE DATA TYPES */
370 
371 #define SHORT_TYPE_SIZE        16
372 #define INT_TYPE_SIZE          16
373 #define LONG_TYPE_SIZE         32
374 #define LONG_LONG_TYPE_SIZE    32
375 #define FLOAT_TYPE_SIZE        32
376 #define DOUBLE_TYPE_SIZE       32
377 #define LONG_DOUBLE_TYPE_SIZE  32
378 
379 /* An expression whose value is 1 or 0, according to whether the type char should be
380    signed or unsigned by default.  */
381 
382 #define DEFAULT_SIGNED_CHAR 1
383 
384 /* A C expression to determine whether to give an enum type only as many bytes
385    as it takes to represent the range of possible values of that type. A nonzero
386    value means to do that; a zero value means all enum types should be allocated
387    like int.  */
388 
389 #define DEFAULT_SHORT_ENUMS 0
390 
391 /* A C expression for a string describing the name of the data type to use for
392    size values.  */
393 
394 #define SIZE_TYPE    "unsigned int"
395 
396 /* A C expression for a string describing the name of the data type to use for the
397    result of subtracting two pointers */
398 
399 #define PTRDIFF_TYPE "int"
400 
401 
402 /* REGISTER USAGE.  */
403 
404 #define ALL_16_BIT_REGISTERS  1
405 
406 /* Number of actual hardware registers.
407    The hardware registers are assigned numbers for the compiler
408    from 0 to FIRST_PSEUDO_REGISTER-1 */
409 
410 #define FIRST_PSEUDO_REGISTER (REG_YBASE31 + 1)
411 
412 /* 1 for registers that have pervasive standard uses
413    and are not available for the register allocator.
414 
415    The registers are laid out as follows:
416 
417    {a0,a0l,a1,a1l,x,y,yl,p,pl} - Data Arithmetic Unit
418    {r0,r1,r2,r3,j,k,ybase} - Y Space Address Arithmetic Unit
419    {pt} - X Space Address Arithmetic Unit
420    {ar0,ar1,ar2,ar3} - Bit Manipulation UNit
421    {pr} - Return Address Register
422 
423    We reserve r2 for the Stack Pointer.
424    We specify r3 for the Frame Pointer but allow the compiler
425    to omit it when possible since we have so few pointer registers.  */
426 
427 #define REG_A0     0
428 #define REG_A0L    1
429 #define REG_A1     2
430 #define REG_A1L    3
431 #define REG_X      4
432 #define REG_Y      5
433 #define REG_YL     6
434 #define REG_PROD   7
435 #define REG_PRODL  8
436 #define REG_R0     9
437 #define REG_R1     10
438 #define REG_R2     11
439 #define REG_R3     12
440 #define REG_J      13
441 #define REG_K      14
442 #define REG_YBASE  15
443 #define REG_PT     16
444 #define REG_AR0    17
445 #define REG_AR1    18
446 #define REG_AR2    19
447 #define REG_AR3    20
448 #define REG_C0     21
449 #define REG_C1     22
450 #define REG_C2     23
451 #define REG_PR     24
452 #define REG_RB     25
453 #define REG_YBASE0 26
454 #define REG_YBASE1 27
455 #define REG_YBASE2 28
456 #define REG_YBASE3 29
457 #define REG_YBASE4 30
458 #define REG_YBASE5 31
459 #define REG_YBASE6 32
460 #define REG_YBASE7 33
461 #define REG_YBASE8 34
462 #define REG_YBASE9 35
463 #define REG_YBASE10 36
464 #define REG_YBASE11 37
465 #define REG_YBASE12 38
466 #define REG_YBASE13 39
467 #define REG_YBASE14 40
468 #define REG_YBASE15 41
469 #define REG_YBASE16 42
470 #define REG_YBASE17 43
471 #define REG_YBASE18 44
472 #define REG_YBASE19 45
473 #define REG_YBASE20 46
474 #define REG_YBASE21 47
475 #define REG_YBASE22 48
476 #define REG_YBASE23 49
477 #define REG_YBASE24 50
478 #define REG_YBASE25 51
479 #define REG_YBASE26 52
480 #define REG_YBASE27 53
481 #define REG_YBASE28 54
482 #define REG_YBASE29 55
483 #define REG_YBASE30 56
484 #define REG_YBASE31 57
485 
486 /* Do we have an accumulator register? */
487 #define IS_ACCUM_REG(REGNO) IN_RANGE ((REGNO), REG_A0, REG_A1L)
488 #define IS_ACCUM_LOW_REG(REGNO) ((REGNO) == REG_A0L || (REGNO) == REG_A1L)
489 
490 /* Do we have a virtual ybase register */
491 #define IS_YBASE_REGISTER_WINDOW(REGNO) ((REGNO) >= REG_YBASE0 && (REGNO) <= REG_YBASE31)
492 
493 #define IS_YBASE_ELIGIBLE_REG(REGNO) (IS_ACCUM_REG (REGNO) || IS_ADDRESS_REGISTER(REGNO) \
494                                       || REGNO == REG_X || REGNO == REG_Y || REGNO == REG_YL \
495                                       || REGNO == REG_PROD || REGNO == REG_PRODL)
496 
497 #define IS_ADDRESS_REGISTER(REGNO) ((REGNO) >= REG_R0 && (REGNO) <= REG_R3)
498 
499 #define FIXED_REGISTERS     \
500 {0, 0, 0, 0, 0, 0, 0, 0, 0, \
501  0, 0, 0, 1, 0, 0, 1,       \
502  1,                         \
503  0, 0, 0, 0,                \
504  1, 1, 1,                   \
505  1, 0,                      \
506  0, 0, 0, 0, 0, 0, 0, 0,    \
507  0, 0, 0, 0, 0, 0, 0, 0,    \
508  0, 0, 0, 0, 0, 0, 0, 0,    \
509  0, 0, 0, 0, 0, 0, 0, 0}
510 
511 /* 1 for registers not available across function calls.
512    These must include the FIXED_REGISTERS and also any
513    registers that can be used without being saved.
514    The latter must include the registers where values are returned
515    and the register where structure-value addresses are passed.
516    On the 1610 'a0' holds return values from functions. 'r0' holds
517    structure-value addresses.
518 
519    In addition we don't save either j, k, ybase or any of the
520    bit manipulation registers.  */
521 
522 
523 #define CALL_USED_REGISTERS			\
524 {1, 1, 1, 1, 0, 1, 1, 1, 1,	/* 0-8 */	\
525  1, 0, 0, 1, 1, 1, 1,		/* 9-15 */	\
526  1,                             /* 16 */	\
527  0, 0, 1, 1,			/* 17-20 */	\
528  1, 1, 1,			/* 21-23 */	\
529  1, 1,				/* 24-25 */	\
530  0, 0, 0, 0, 0, 0, 0, 0,	/* 26-33 */	\
531  0, 0, 0, 0, 0, 0, 0, 0,	/* 34-41 */	\
532  0, 0, 0, 0, 0, 0, 0, 0,	/* 42-49 */	\
533  0, 0, 0, 0, 0, 0, 0, 0}	/* 50-57 */
534 
535 /* List the order in which to allocate registers.  Each register must be
536    listed once, even those in FIXED_REGISTERS.
537 
538    We allocate in the following order:
539  */
540 
541 #if 0
542 #define REG_ALLOC_ORDER					\
543 { REG_R0, REG_R1, REG_R2, REG_PROD, REG_Y, REG_X,       \
544   REG_PRODL, REG_YL, REG_AR0, REG_AR1,                  \
545   REG_RB, REG_A0, REG_A1, REG_A0L,                      \
546   REG_A1L, REG_AR2, REG_AR3,                            \
547   REG_YBASE, REG_J, REG_K, REG_PR, REG_PT, REG_C0,      \
548   REG_C1, REG_C2, REG_R3,				\
549   REG_YBASE0, REG_YBASE1, REG_YBASE2, REG_YBASE3,       \
550   REG_YBASE4, REG_YBASE5, REG_YBASE6, REG_YBASE7,       \
551   REG_YBASE8, REG_YBASE9, REG_YBASE10, REG_YBASE11,     \
552   REG_YBASE12, REG_YBASE13, REG_YBASE14, REG_YBASE15,   \
553   REG_YBASE16, REG_YBASE17, REG_YBASE18, REG_YBASE19,   \
554   REG_YBASE20, REG_YBASE21, REG_YBASE22, REG_YBASE23,   \
555   REG_YBASE24, REG_YBASE25, REG_YBASE26, REG_YBASE27,   \
556   REG_YBASE28, REG_YBASE29, REG_YBASE30, REG_YBASE31 }
557 #else
558 #define REG_ALLOC_ORDER                                 \
559 {                                                       \
560   REG_A0, REG_A0L, REG_A1, REG_A1L, REG_Y, REG_YL,      \
561   REG_PROD,                                             \
562   REG_PRODL, REG_R0, REG_J, REG_K, REG_AR2, REG_AR3,    \
563   REG_X, REG_R1, REG_R2, REG_RB, REG_AR0, REG_AR1,      \
564   REG_YBASE0, REG_YBASE1, REG_YBASE2, REG_YBASE3,       \
565   REG_YBASE4, REG_YBASE5, REG_YBASE6, REG_YBASE7,       \
566   REG_YBASE8, REG_YBASE9, REG_YBASE10, REG_YBASE11,     \
567   REG_YBASE12, REG_YBASE13, REG_YBASE14, REG_YBASE15,   \
568   REG_YBASE16, REG_YBASE17, REG_YBASE18, REG_YBASE19,   \
569   REG_YBASE20, REG_YBASE21, REG_YBASE22, REG_YBASE23,   \
570   REG_YBASE24, REG_YBASE25, REG_YBASE26, REG_YBASE27,   \
571   REG_YBASE28, REG_YBASE29, REG_YBASE30, REG_YBASE31,   \
572   REG_R3, REG_YBASE, REG_PT, REG_C0, REG_C1, REG_C2,    \
573   REG_PR }
574 #endif
575 /* Zero or more C statements that may conditionally modify two
576    variables `fixed_regs' and `call_used_regs' (both of type `char
577    []') after they have been initialized from the two preceding
578    macros.
579 
580    This is necessary in case the fixed or call-clobbered registers
581    depend on target flags.
582 
583    You need not define this macro if it has no work to do.
584 
585    If the usage of an entire class of registers depends on the target
586    flags, you may indicate this to GCC by using this macro to modify
587    `fixed_regs' and `call_used_regs' to 1 for each of the registers in
588    the classes which should not be used by GCC.  Also define the macro
589    `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
590    letter for a class that shouldn't be used.
591 
592    (However, if this class is not included in `GENERAL_REGS' and all
593    of the insn patterns whose constraints permit this class are
594    controlled by target switches, then GCC will automatically avoid
595    using these registers when the target switches are opposed to
596    them.)  If the user tells us there is no BMU, we can't use
597    ar0-ar3 for register allocation */
598 
599 #define CONDITIONAL_REGISTER_USAGE					\
600 do									\
601   {									\
602     if (!TARGET_BMU)						        \
603       {									\
604 	int regno;							\
605 									\
606 	for (regno = REG_AR0; regno <= REG_AR3; regno++)	        \
607 	  fixed_regs[regno] = call_used_regs[regno] = 1;		\
608       }									\
609     if (TARGET_RESERVE_YBASE)						\
610       {									\
611 	int regno;							\
612 									\
613 	for (regno = REG_YBASE0; regno <= REG_YBASE31; regno++)	        \
614 	  fixed_regs[regno] = call_used_regs[regno] = 1;		\
615       }									\
616   }									\
617 while (0)
618 
619 /* Determine which register classes are very likely used by spill registers.
620    local-alloc.c won't allocate pseudos that have these classes as their
621    preferred class unless they are "preferred or nothing".  */
622 
623 #define CLASS_LIKELY_SPILLED_P(CLASS) \
624  ((CLASS) != ALL_REGS && (CLASS) != YBASE_VIRT_REGS)
625 
626 /* Return number of consecutive hard regs needed starting at reg REGNO
627    to hold something of mode MODE.
628    This is ordinarily the length in words of a value of mode MODE
629    but can be less for certain modes in special long registers.  */
630 
631 #define HARD_REGNO_NREGS(REGNO, MODE)                                 \
632   (GET_MODE_SIZE(MODE))
633 
634 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.  */
635 
636 #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok(REGNO, MODE)
637 
638 /* Value is 1 if it is a good idea to tie two pseudo registers
639    when one has mode MODE1 and one has mode MODE2.
640    If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
641    for any hard reg, then this must be 0 for correct output.  */
642 #define MODES_TIEABLE_P(MODE1, MODE2)		     \
643   (((MODE1) == (MODE2)) ||                           \
644    (GET_MODE_CLASS((MODE1)) == MODE_FLOAT)           \
645     == (GET_MODE_CLASS((MODE2)) == MODE_FLOAT))
646 
647 /* Specify the registers used for certain standard purposes.
648    The values of these macros are register numbers.  */
649 
650 /* DSP1600 pc isn't overloaded on a register.  */
651 /* #define PC_REGNUM  */
652 
653 /* Register to use for pushing function arguments.
654    This is r3 in our case */
655 #define STACK_POINTER_REGNUM  REG_R3
656 
657 /* Base register for access to local variables of the function.
658    This is r2 in our case   */
659 #define FRAME_POINTER_REGNUM  REG_R2
660 
661 /* We can debug without the frame pointer */
662 #define CAN_DEBUG_WITHOUT_FP 1
663 
664 /* The 1610 saves the return address in this register */
665 #define RETURN_ADDRESS_REGNUM REG_PR
666 
667 /* Base register for access to arguments of the function.  */
668 #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
669 
670 /* Register in which static-chain is passed to a function.  */
671 
672 #define STATIC_CHAIN_REGNUM 4
673 
674 /* Register in which address to store a structure value
675    is passed to a function.  This is 'r0' in our case */
676 #define STRUCT_VALUE_REGNUM   REG_R0
677 
678 /* Define the classes of registers for register constraints in the
679    machine description.  Also define ranges of constants.
680 
681    One of the classes must always be named ALL_REGS and include all hard regs.
682    If there is more than one class, another class must be named NO_REGS
683    and contain no registers.
684 
685    The name GENERAL_REGS must be the name of a class (or an alias for
686    another name such as ALL_REGS).  This is the class of registers
687    that is allowed by "g" or "r" in a register constraint.
688    Also, registers outside this class are allocated only when
689    instructions express preferences for them.
690 
691    The classes must be numbered in nondecreasing order; that is,
692    a larger-numbered class must never be contained completely
693    in a smaller-numbered class.
694 
695    For any two classes, it is very desirable that there be another
696    class that represents their union.  */
697 
698 
699 enum reg_class
700 {
701     NO_REGS,
702     A0H_REG,
703     A0L_REG,
704     A0_REG,
705     A1H_REG,
706     ACCUM_HIGH_REGS,
707     A1L_REG,
708     ACCUM_LOW_REGS,
709     A1_REG,
710     ACCUM_REGS,
711     X_REG,
712     X_OR_ACCUM_LOW_REGS,
713     X_OR_ACCUM_REGS,
714     YH_REG,
715     YH_OR_ACCUM_HIGH_REGS,
716     X_OR_YH_REGS,
717     YL_REG,
718     YL_OR_ACCUM_LOW_REGS,
719     X_OR_YL_REGS,
720     X_OR_Y_REGS,
721     Y_REG,
722     ACCUM_OR_Y_REGS,
723     PH_REG,
724     X_OR_PH_REGS,
725     PL_REG,
726     PL_OR_ACCUM_LOW_REGS,
727     X_OR_PL_REGS,
728     YL_OR_PL_OR_ACCUM_LOW_REGS,
729     P_REG,
730     ACCUM_OR_P_REGS,
731     YL_OR_P_REGS,
732     ACCUM_LOW_OR_YL_OR_P_REGS,
733     Y_OR_P_REGS,
734     ACCUM_Y_OR_P_REGS,
735     NO_FRAME_Y_ADDR_REGS,
736     Y_ADDR_REGS,
737     ACCUM_LOW_OR_Y_ADDR_REGS,
738     ACCUM_OR_Y_ADDR_REGS,
739     X_OR_Y_ADDR_REGS,
740     Y_OR_Y_ADDR_REGS,
741     P_OR_Y_ADDR_REGS,
742     NON_HIGH_YBASE_ELIGIBLE_REGS,
743     YBASE_ELIGIBLE_REGS,
744     J_REG,
745     J_OR_DAU_16_BIT_REGS,
746     BMU_REGS,
747     NOHIGH_NON_ADDR_REGS,
748     NON_ADDR_REGS,
749     SLOW_MEM_LOAD_REGS,
750     NOHIGH_NON_YBASE_REGS,
751     NO_ACCUM_NON_YBASE_REGS,
752     NON_YBASE_REGS,
753     YBASE_VIRT_REGS,
754     ACCUM_LOW_OR_YBASE_REGS,
755     ACCUM_OR_YBASE_REGS,
756     X_OR_YBASE_REGS,
757     Y_OR_YBASE_REGS,
758     ACCUM_LOW_YL_PL_OR_YBASE_REGS,
759     P_OR_YBASE_REGS,
760     ACCUM_Y_P_OR_YBASE_REGS,
761     Y_ADDR_OR_YBASE_REGS,
762     YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
763     YBASE_OR_YBASE_ELIGIBLE_REGS,
764     NO_HIGH_ALL_REGS,
765     ALL_REGS,
766     LIM_REG_CLASSES
767 };
768 
769 /* GENERAL_REGS must be the name of a register class */
770 #define GENERAL_REGS ALL_REGS
771 
772 #define N_REG_CLASSES (int) LIM_REG_CLASSES
773 
774 /* Give names of register classes as strings for dump file.  */
775 
776 #define REG_CLASS_NAMES        \
777 {                              \
778     "NO_REGS",                 \
779     "A0H_REG",                 \
780     "A0L_REG",                 \
781     "A0_REG",                  \
782     "A1H_REG",                 \
783     "ACCUM_HIGH_REGS",         \
784     "A1L_REG",                 \
785     "ACCUM_LOW_REGS",          \
786     "A1_REG",                  \
787     "ACCUM_REGS",              \
788     "X_REG",                   \
789     "X_OR_ACCUM_LOW_REGS",     \
790     "X_OR_ACCUM_REGS",         \
791     "YH_REG",                  \
792     "YH_OR_ACCUM_HIGH_REGS",   \
793     "X_OR_YH_REGS",            \
794     "YL_REG",                  \
795     "YL_OR_ACCUM_LOW_REGS",    \
796     "X_OR_YL_REGS",            \
797     "X_OR_Y_REGS",             \
798     "Y_REG",                   \
799     "ACCUM_OR_Y_REGS",         \
800     "PH_REG",                  \
801     "X_OR_PH_REGS",            \
802     "PL_REG",                  \
803     "PL_OR_ACCUM_LOW_REGS",    \
804     "X_OR_PL_REGS",            \
805     "PL_OR_YL_OR_ACCUM_LOW_REGS", \
806     "P_REG",                   \
807     "ACCUM_OR_P_REGS",         \
808     "YL_OR_P_REGS",            \
809     "ACCUM_LOW_OR_YL_OR_P_REGS", \
810     "Y_OR_P_REGS",             \
811     "ACCUM_Y_OR_P_REGS",       \
812     "NO_FRAME_Y_ADDR_REGS",      \
813     "Y_ADDR_REGS",               \
814     "ACCUM_LOW_OR_Y_ADDR_REGS",  \
815     "ACCUM_OR_Y_ADDR_REGS",    \
816     "X_OR_Y_ADDR_REGS",        \
817     "Y_OR_Y_ADDR_REGS",        \
818     "P_OR_Y_ADDR_REGS",        \
819     "NON_HIGH_YBASE_ELIGIBLE_REGS", \
820     "YBASE_ELIGIBLE_REGS",     \
821     "J_REG",                   \
822     "J_OR_DAU_16_BIT_REGS",    \
823     "BMU_REGS",                \
824     "NOHIGH_NON_ADDR_REGS",    \
825     "NON_ADDR_REGS",           \
826     "SLOW_MEM_LOAD_REGS",      \
827     "NOHIGH_NON_YBASE_REGS",   \
828     "NO_ACCUM_NON_YBASE_REGS", \
829     "NON_YBASE_REGS",          \
830     "YBASE_VIRT_REGS",         \
831     "ACCUM_LOW_OR_YBASE_REGS", \
832     "ACCUM_OR_YBASE_REGS",     \
833     "X_OR_YBASE_REGS",         \
834     "Y_OR_YBASE_REGS",         \
835     "ACCUM_LOW_YL_PL_OR_YBASE_REGS", \
836     "P_OR_YBASE_REGS",         \
837     "ACCUM_Y_P_OR_YBASE_REGS", \
838     "Y_ADDR_OR_YBASE_REGS",    \
839     "YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS", \
840     "YBASE_OR_YBASE_ELIGIBLE_REGS", \
841     "NO_HIGH_ALL_REGS",        \
842     "ALL_REGS"                 \
843 }
844 
845 /* Define which registers fit in which classes.
846    This is an initializer for a vector of HARD_REG_SET
847    of length N_REG_CLASSES.  */
848 
849 #define REG_CLASS_CONTENTS   \
850 {                            \
851     {0x00000000,  0x00000000},      /* no reg */                             \
852     {0x00000001,  0x00000000},      /* a0h */                                \
853     {0x00000002,  0x00000000},      /* a0l */                                \
854     {0x00000003,  0x00000000},      /* a0h:a0l */                            \
855     {0x00000004,  0x00000000},      /* a1h */                                \
856     {0x00000005,  0x00000000},      /* accum high */                         \
857     {0x00000008,  0x00000000},      /* a1l */                                \
858     {0x0000000A,  0x00000000},      /* accum low */                          \
859     {0x0000000c,  0x00000000},      /* a1h:a1l */                            \
860     {0x0000000f,  0x00000000},      /* accum regs */                         \
861     {0x00000010,  0x00000000},      /* x reg */                              \
862     {0x0000001A,  0x00000000},      /* x & accum_low_regs */                 \
863     {0x0000001f,  0x00000000},      /* x & accum regs */                     \
864     {0x00000020,  0x00000000},      /* y high */                             \
865     {0x00000025,  0x00000000},      /* yh, accum high */                     \
866     {0x00000030,  0x00000000},      /* x & yh */                             \
867     {0x00000040,  0x00000000},      /* y low */                              \
868     {0x0000004A,  0x00000000},      /* y low, accum_low */                   \
869     {0x00000050,  0x00000000},      /* x & yl */                             \
870     {0x00000060,  0x00000000},      /* yl:yh */                              \
871     {0x00000070,  0x00000000},      /* x, yh,a nd yl */                      \
872     {0x0000006F,  0x00000000},      /* accum, y */                           \
873     {0x00000080,  0x00000000},      /* p high */                             \
874     {0x00000090,  0x00000000},      /* x & ph */                             \
875     {0x00000100,  0x00000000},      /* p low */                              \
876     {0x0000010A,  0x00000000},      /* p_low and accum_low */                \
877     {0x00000110,  0x00000000},      /* x & pl */                             \
878     {0x0000014A,  0x00000000},      /* pl,yl,a1l,a0l */                      \
879     {0x00000180,  0x00000000},      /* pl:ph */                              \
880     {0x0000018F,  0x00000000},      /* accum, p */                           \
881     {0x000001C0,  0x00000000},      /* pl:ph and yl */                       \
882     {0x000001CA,  0x00000000},      /* pl:ph, yl, a0l, a1l */                \
883     {0x000001E0,  0x00000000},      /* y or p */                             \
884     {0x000001EF,  0x00000000},      /* accum, y or p */                      \
885     {0x00000E00,  0x00000000},      /* r0-r2 */                              \
886     {0x00001E00,  0x00000000},      /* r0-r3 */                              \
887     {0x00001E0A,  0x00000000},      /* r0-r3, accum_low */                   \
888     {0x00001E0F,  0x00000000},      /* accum,r0-r3 */                        \
889     {0x00001E10,  0x00000000},      /* x,r0-r3 */                            \
890     {0x00001E60,  0x00000000},      /* y,r0-r3 */                            \
891     {0x00001F80,  0x00000000},      /* p,r0-r3 */                            \
892     {0x00001FDA,  0x00000000},      /* ph:pl, r0-r3, x,a0l,a1l */            \
893     {0x00001fff,  0x00000000},      /* accum,x,y,p,r0-r3 */                  \
894     {0x00002000,  0x00000000},      /* j */                                  \
895     {0x00002025,  0x00000000},      /* j, yh, a1h, a0h */                    \
896     {0x001E0000,  0x00000000},      /* ar0-ar3 */                            \
897     {0x03FFE1DA,  0x00000000},      /* non_addr except yh,a0h,a1h */         \
898     {0x03FFE1FF,  0x00000000},      /* non_addr regs */                      \
899     {0x03FFFF8F,  0x00000000},      /* non ybase except yh, yl, and x */     \
900     {0x03FFFFDA,  0x00000000},      /* non ybase regs except yh,a0h,a1h */   \
901     {0x03FFFFF0,  0x00000000},      /* non ybase except a0,a0l,a1,a1l */     \
902     {0x03FFFFFF,  0x00000000},      /* non ybase regs */                     \
903     {0xFC000000,  0x03FFFFFF},      /* virt ybase regs */                    \
904     {0xFC00000A,  0x03FFFFFF},      /* accum_low, virt ybase regs */         \
905     {0xFC00000F,  0x03FFFFFF},      /* accum, virt ybase regs */             \
906     {0xFC000010,  0x03FFFFFF},      /* x,virt ybase regs */                  \
907     {0xFC000060,  0x03FFFFFF},      /* y,virt ybase regs */                  \
908     {0xFC00014A,  0x03FFFFFF},      /* accum_low, yl, pl, ybase */           \
909     {0xFC000180,  0x03FFFFFF},      /* p,virt ybase regs */                  \
910     {0xFC0001EF,  0x03FFFFFF},      /* accum,y,p,ybase regs */               \
911     {0xFC001E00,  0x03FFFFFF},      /* r0-r3, ybase regs */                  \
912     {0xFC001FDA,  0x03FFFFFF},      /* r0-r3, pl:ph,yl,x,a1l,a0l */          \
913     {0xFC001FFF,  0x03FFFFFF},      /* virt ybase, ybase eligible regs */    \
914     {0xFCFFFFDA,  0x03FFFFFF},      /* all regs except yh,a0h,a1h */         \
915     {0xFFFFFFFF,  0x03FFFFFF}       /* all regs */                           \
916 }
917 
918 
919 /* The same information, inverted:
920    Return the class number of the smallest class containing
921    reg number REGNO.  This could be a conditional expression
922    or could index an array.  */
923 
924 #define REGNO_REG_CLASS(REGNO) regno_reg_class(REGNO)
925 
926 /* The class value for index registers, and the one for base regs.  */
927 
928 #define INDEX_REG_CLASS NO_REGS
929 #define BASE_REG_CLASS  Y_ADDR_REGS
930 
931 /* Get reg_class from a letter such as appears in the machine description.  */
932 
933 #define REG_CLASS_FROM_LETTER(C) \
934   dsp16xx_reg_class_from_letter(C)
935 
936 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X)  \
937    secondary_reload_class(CLASS, MODE, X)
938 
939 /* When defined, the compiler allows registers explicitly used in the
940    rtl to be used as spill registers but prevents the compiler from
941    extending the lifetime of these registers.  */
942 
943 #define SMALL_REGISTER_CLASSES 1
944 
945 /* Macros to check register numbers against specific register classes.  */
946 
947 /* These assume that REGNO is a hard or pseudo reg number.
948    They give nonzero only if REGNO is a hard reg of the suitable class
949    or a pseudo reg currently allocated to a suitable hard reg.
950    Since they use reg_renumber, they are safe only once reg_renumber
951    has been allocated, which happens in local-alloc.c.  */
952 
953 /* A C expression which is nonzero if register REGNO is suitable for use
954    as a base register in operand addresses. It may be either a suitable
955    hard register or a pseudo register that has been allocated such a
956    hard register.
957 
958   On the 1610 the Y address pointers can be used as a base registers */
959 #define REGNO_OK_FOR_BASE_P(REGNO) \
960 (((REGNO) >= REG_R0 && (REGNO) < REG_R3 + 1) || ((unsigned) reg_renumber[REGNO] >= REG_R0  \
961                                    && (unsigned) reg_renumber[REGNO] < REG_R3 + 1))
962 
963 #define REGNO_OK_FOR_YBASE_P(REGNO) \
964   (((REGNO) == REG_YBASE) || ((unsigned) reg_renumber[REGNO] == REG_YBASE))
965 
966 #define REGNO_OK_FOR_INDEX_P(REGNO)  0
967 
968 #ifdef ALL_16_BIT_REGISTERS
969 #define IS_32_BIT_REG(REGNO)  0
970 #else
971 #define IS_32_BIT_REG(REGNO)     \
972   ((REGNO) == REG_A0 || (REGNO) == REG_A1 || (REGNO) == REG_Y || (REGNO) == REG_PROD)
973 #endif
974 
975 /* Given an rtx X being reloaded into a reg required to be
976    in class CLASS, return the class of reg to actually use.
977    In general this is just CLASS; but on some machines
978    in some cases it is preferable to use a more restrictive class.
979    Also, we must ensure that a PLUS is reloaded either
980    into an accumulator or an address register.  */
981 
982 #define PREFERRED_RELOAD_CLASS(X,CLASS)	 preferred_reload_class (X, CLASS)
983 
984 /*   A C expression that places additional restrictions on the register
985      class to use when it is necessary to be able to hold a value of
986      mode MODE in a reload register for which class CLASS would
987      ordinarily be used.
988 
989      Unlike `PREFERRED_RELOAD_CLASS', this macro should be used when
990      there are certain modes that simply can't go in certain reload
991      classes.
992 
993      The value is a register class; perhaps CLASS, or perhaps another,
994      smaller class.
995 
996      Don't define this macro unless the target machine has limitations
997      which require the macro to do something nontrivial.  */
998 
999 #if 0
1000 #define LIMIT_RELOAD_CLASS(MODE, CLASS) dsp16xx_limit_reload_class (MODE, CLASS)
1001 #endif
1002 
1003 /* A C expression for the maximum number of consecutive registers of class CLASS
1004    needed to hold a value of mode MODE */
1005 #define CLASS_MAX_NREGS(CLASS, MODE)                                \
1006     class_max_nregs(CLASS, MODE)
1007 
1008 /* The letters 'I' through 'P' in a register constraint string
1009    can be used to stand for particular ranges of immediate operands.
1010    This macro defines what the ranges are.
1011    C is the letter, and VALUE is a constant value.
1012    Return 1 if VALUE is in the range specified by C.
1013 
1014    For the 16xx, the following constraints are used:
1015    'I' requires a non-negative 16-bit value.
1016    'J' requires a non-negative 9-bit value
1017    'K' requires a constant 0 operand.
1018    'L' constant for use in add or sub from low 16-bits
1019    'M' 32-bit value -- low 16-bits zero
1020    'N' constant for use incrementing or decrementing an address register
1021    'O' constant for use with and'ing only high 16-bit
1022    'P' constant for use with and'ing only low 16-bit
1023  */
1024 
1025 #define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
1026 #define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
1027 #define SHORT_IMMEDIATE(X)  (SHORT_INTVAL (INTVAL(X)))
1028 #define SHORT_INTVAL(I)     ((unsigned) (I) < 0x100)
1029 #define ADD_LOW_16(I)       ((I) >= 0 && (I) <= 32767)
1030 #define ADD_HIGH_16(I)      (((I) & 0x0000ffff) == 0)
1031 #define AND_LOW_16(I)       ((I) >= 0 && (I) <= 32767)
1032 #define AND_HIGH_16(I)      (((I) & 0x0000ffff) == 0)
1033 
1034 #define CONST_OK_FOR_LETTER_P(VALUE, C)                           \
1035    ((C) == 'I' ? (SMALL_INTVAL(VALUE))                            \
1036     : (C) == 'J' ? (SHORT_INTVAL(VALUE))                          \
1037     : (C) == 'K' ? ((VALUE) == 0)                                 \
1038     : (C) == 'L' ? ((VALUE) >= 0 && (VALUE) <= 32767)             \
1039     : (C) == 'M' ? (((VALUE) & 0x0000ffff) == 0)                  \
1040     : (C) == 'N' ? ((VALUE) == -1 || (VALUE) == 1                 \
1041                     || (VALUE) == -2 || (VALUE) == 2)             \
1042     : (C) == 'O' ? (((VALUE) & 0xffff0000) == 0xffff0000)         \
1043     : (C) == 'P' ? (((VALUE) & 0x0000ffff) == 0xffff)             \
1044     : 0)
1045 
1046 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)   1
1047 
1048 /* Optional extra constraints for this machine */
1049 #define EXTRA_CONSTRAINT(OP,C)                                    \
1050   ((C) == 'R' ? symbolic_address_p (OP)                           \
1051    : 0)
1052 
1053 /* DESCRIBING STACK LAYOUT AND CALLING CONVENTIONS */
1054 
1055 /* Define this if pushing a word on the stack
1056    makes the stack pointer a smaller address.  */
1057 /* #define STACK_GROWS_DOWNWARD */
1058 
1059 /* Define this if the nominal address of the stack frame
1060    is at the high-address end of the local variables;
1061    that is, each additional local variable allocated
1062    goes at a more negative offset in the frame.  */
1063 /* #define FRAME_GROWS_DOWNWARD */
1064 
1065 #define ARGS_GROW_DOWNWARD
1066 
1067 /* We use post decrement on the 1600 because there isn't
1068    a pre-decrement addressing mode. This means that we
1069    assume the stack pointer always points at the next
1070    FREE location on the stack.  */
1071 #define STACK_PUSH_CODE POST_INC
1072 
1073 /* Offset within stack frame to start allocating local variables at.
1074    If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1075    first local allocated.  Otherwise, it is the offset to the BEGINNING
1076    of the first local allocated.  */
1077 #define STARTING_FRAME_OFFSET  0
1078 
1079 /* Offset from the stack pointer register to the first
1080    location at which outgoing arguments are placed.  */
1081 #define STACK_POINTER_OFFSET (0)
1082 
1083 struct dsp16xx_frame_info
1084 {
1085   unsigned long total_size;	/* # bytes that the entire frame takes up */
1086   unsigned long var_size;	/* # bytes that variables take up */
1087   unsigned long args_size;	/* # bytes that outgoing arguments take up */
1088   unsigned long extra_size;	/* # bytes of extra gunk */
1089   unsigned int  reg_size;	/* # bytes needed to store regs */
1090   long		fp_save_offset;	/* offset from vfp to store registers */
1091   unsigned long sp_save_offset;	/* offset from new sp to store registers */
1092   int		pr_save_offset;	/* offset to saved PR */
1093   int		initialized;	/* != 0 if frame size already calculated */
1094   int		num_regs;	/* number of registers saved */
1095   int           function_makes_calls;  /* Does the function make calls */
1096 };
1097 
1098 extern struct dsp16xx_frame_info current_frame_info;
1099 
1100 #define RETURN_ADDR_OFF current_frame_info.pr_save_offset
1101 
1102 /* If we generate an insn to push BYTES bytes,
1103    this says how many the stack pointer really advances by.  */
1104 /* #define PUSH_ROUNDING(BYTES) ((BYTES)) */
1105 
1106 /* If defined, the maximum amount of space required for outgoing
1107    arguments will be computed and placed into the variable
1108    'current_function_outgoing_args_size'. No space will be pushed
1109    onto the stack for each call; instead, the function prologue should
1110    increase the stack frame size by this amount.
1111 
1112    It is not proper to define both 'PUSH_ROUNDING' and
1113    'ACCUMULATE_OUTGOING_ARGS'.  */
1114 #define ACCUMULATE_OUTGOING_ARGS 1
1115 
1116 /* Offset of first parameter from the argument pointer
1117    register value.  */
1118 
1119 #define FIRST_PARM_OFFSET(FNDECL)   (0)
1120 
1121 /* Value is 1 if returning from a function call automatically
1122    pops the arguments described by the number-of-args field in the call.
1123    FUNDECL is the declaration node of the function (as a tree),
1124    FUNTYPE is the data type of the function (as a tree),
1125    or for a library call it is an identifier node for the subroutine name.  */
1126 
1127 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
1128 
1129 /* Define how to find the value returned by a function.
1130    VALTYPE is the data type of the value (as a tree).
1131    If the precise function being called is known, FUNC is its FUNCTION_DECL;
1132    otherwise, FUNC is 0. On the 1610 all function return their values
1133    in a0 (i.e. the upper 16 bits). If the return value is 32-bits the
1134    entire register is significant.  */
1135 
1136 #define VALUE_REGNO(MODE)  (REG_Y)
1137 
1138 #define FUNCTION_VALUE(VALTYPE, FUNC)  \
1139   gen_rtx_REG (TYPE_MODE (VALTYPE), VALUE_REGNO(TYPE_MODE(VALTYPE)))
1140 
1141 /* Define how to find the value returned by a library function
1142    assuming the value has mode MODE.  */
1143 #define LIBCALL_VALUE(MODE)  gen_rtx_REG (MODE, VALUE_REGNO(MODE))
1144 
1145 /* 1 if N is a possible register number for a function value.  */
1146 #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_Y)
1147 
1148 
1149 /* Define where to put the arguments to a function.
1150    Value is zero to push the argument on the stack,
1151    or a hard register in which to store the argument.
1152 
1153    MODE is the argument's machine mode.
1154    TYPE is the data type of the argument (as a tree).
1155     This is null for libcalls where that information may
1156     not be available.
1157    CUM is a variable of type CUMULATIVE_ARGS which gives info about
1158     the preceding args and about the function being called.
1159    NAMED is nonzero if this argument is a named parameter
1160     (otherwise it is an extra parameter matching an ellipsis).  */
1161 
1162 /* On the 1610 all args are pushed, except if -mregparm is specified
1163    then the first two words of arguments are passed in a0, a1.  */
1164 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1165   dsp16xx_function_arg (CUM, MODE, TYPE, NAMED)
1166 
1167 /* Define the first register to be used for argument passing */
1168 #define FIRST_REG_FOR_FUNCTION_ARG REG_Y
1169 
1170 /* Define the profitability of saving registers around calls.
1171    NOTE: For now we turn this off because of a bug in the
1172    caller-saves code and also because i'm not sure it is helpful
1173    on the 1610.  */
1174 
1175 #define CALLER_SAVE_PROFITABLE(REFS,CALLS) 0
1176 
1177 /* This indicates that an argument is to be passed with an invisible reference
1178    (i.e., a pointer to the object is passed).
1179 
1180    On the dsp16xx, we do this if it must be passed on the stack.  */
1181 
1182 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED)	\
1183   (MUST_PASS_IN_STACK (MODE, TYPE))
1184 
1185 /* For an arg passed partly in registers and partly in memory,
1186    this is the number of registers used.
1187    For args passed entirely in registers or entirely in memory, zero.  */
1188 
1189 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED)  (0)
1190 
1191 /* Define a data type for recording info about an argument list
1192    during the scan of that argument list.  This data type should
1193    hold all necessary information about the function itself
1194    and about the args processed so far, enough to enable macros
1195    such as FUNCTION_ARG to determine where the next arg should go.  */
1196 #define CUMULATIVE_ARGS int
1197 
1198 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1199    for a call to a function whose data type is FNTYPE.
1200    For a library call, FNTYPE is 0.  */
1201 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT)  ((CUM) = 0)
1202 
1203 /* Update the data in CUM to advance over an argument
1204    of mode MODE and data type TYPE.
1205    (TYPE is null for libcalls where that information may not be available.)  */
1206 
1207 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)	\
1208   dsp16xx_function_arg_advance (&CUM, MODE,TYPE, NAMED)
1209 
1210 /* 1 if N is a possible register number for function argument passing.  */
1211 #define FUNCTION_ARG_REGNO_P(N)   \
1212   ((N) == REG_Y || (N) == REG_YL || (N) == REG_PROD || (N) == REG_PRODL)
1213 
1214 /* Output assembler code to FILE to increment profiler label # LABELNO
1215    for profiling a function entry.  */
1216 
1217 #define FUNCTION_PROFILER(FILE, LABELNO)        \
1218   internal_error ("profiling not implemented yet")
1219 
1220 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1221    the stack pointer does not matter.  The value is tested only in
1222    functions that have frame pointers.
1223    No definition is equivalent to always zero.  */
1224 
1225 #define EXIT_IGNORE_STACK  (0)
1226 
1227 #define TRAMPOLINE_TEMPLATE(FILE) \
1228   internal_error ("trampolines not yet implemented");
1229 
1230 /* Length in units of the trampoline for entering a nested function.
1231    This is a dummy value  */
1232 
1233 #define TRAMPOLINE_SIZE 20
1234 
1235 /* Emit RTL insns to initialize the variable parts of a trampoline.
1236    FNADDR is an RTX for the address of the function's pure code.
1237    CXT is an RTX for the static chain value for the function.  */
1238 
1239 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)			\
1240   internal_error ("trampolines not yet implemented");
1241 
1242 /* A C expression which is nonzero if a function must have and use a
1243    frame pointer. If its value is nonzero the functions will have a
1244    frame pointer.  */
1245 #define FRAME_POINTER_REQUIRED  (current_function_calls_alloca)
1246 
1247 /* A C statement to store in the variable 'DEPTH' the difference
1248    between the frame pointer and the stack pointer values immediately
1249    after the function prologue.  */
1250 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH)                     \
1251 {  (DEPTH) = initial_frame_pointer_offset();	                \
1252 }
1253 
1254 /* IMPLICIT CALLS TO LIBRARY ROUTINES */
1255 
1256 #define ADDHF3_LIBCALL      "__Emulate_addhf3"
1257 #define SUBHF3_LIBCALL      "__Emulate_subhf3"
1258 #define MULHF3_LIBCALL      "__Emulate_mulhf3"
1259 #define DIVHF3_LIBCALL      "__Emulate_divhf3"
1260 #define CMPHF3_LIBCALL      "__Emulate_cmphf3"
1261 #define FIXHFHI2_LIBCALL    "__Emulate_fixhfhi2"
1262 #define FLOATHIHF2_LIBCALL  "__Emulate_floathihf2"
1263 #define NEGHF2_LIBCALL      "__Emulate_neghf2"
1264 
1265 #define UMULHI3_LIBCALL     "__Emulate_umulhi3"
1266 #define MULHI3_LIBCALL      "__Emulate_mulhi3"
1267 #define UDIVQI3_LIBCALL     "__Emulate_udivqi3"
1268 #define UDIVHI3_LIBCALL     "__Emulate_udivhi3"
1269 #define DIVQI3_LIBCALL      "__Emulate_divqi3"
1270 #define DIVHI3_LIBCALL      "__Emulate_divhi3"
1271 #define MODQI3_LIBCALL      "__Emulate_modqi3"
1272 #define MODHI3_LIBCALL      "__Emulate_modhi3"
1273 #define UMODQI3_LIBCALL     "__Emulate_umodqi3"
1274 #define UMODHI3_LIBCALL     "__Emulate_umodhi3"
1275 #define ASHRHI3_LIBCALL     "__Emulate_ashrhi3"
1276 #define LSHRHI3_LIBCALL     "__Emulate_lshrhi3"
1277 #define ASHLHI3_LIBCALL     "__Emulate_ashlhi3"
1278 #define LSHLHI3_LIBCALL     "__Emulate_lshlhi3"   /* NOT USED */
1279 
1280 /* Define this macro if calls to the ANSI C library functions memcpy and
1281    memset should be generated instead of the BSD function bcopy & bzero.  */
1282 #define TARGET_MEM_FUNCTIONS
1283 
1284 
1285 /* ADDRESSING MODES */
1286 
1287 /* The 1610 has post-increment and decrement, but no pre-modify */
1288 #define HAVE_POST_INCREMENT 1
1289 #define HAVE_POST_DECREMENT 1
1290 
1291 /* #define HAVE_PRE_DECREMENT 0 */
1292 /* #define HAVE_PRE_INCREMENT 0 */
1293 
1294 /* Recognize any constant value that is a valid address.  */
1295 #define CONSTANT_ADDRESS_P(X)  CONSTANT_P (X)
1296 
1297 /* Maximum number of registers that can appear in a valid memory address.  */
1298 #define MAX_REGS_PER_ADDRESS 1
1299 
1300 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1301    and check its validity for a certain class.
1302    We have two alternate definitions for each of them.
1303    The usual definition accepts all pseudo regs; the other rejects
1304    them unless they have been allocated suitable hard regs.
1305    The symbol REG_OK_STRICT causes the latter definition to be used.
1306 
1307    Most source files want to accept pseudo regs in the hope that
1308    they will get allocated to the class that the insn wants them to be in.
1309    Source files for reload pass need to be strict.
1310    After reload, it makes no difference, since pseudo regs have
1311    been eliminated by then.  */
1312 
1313 #ifndef REG_OK_STRICT
1314 
1315 /* Nonzero if X is a hard reg that can be used as an index
1316    or if it is a pseudo reg.  */
1317 #define REG_OK_FOR_INDEX_P(X)  0
1318 
1319 /* Nonzero if X is a hard reg that can be used as a base reg
1320    or if it is a pseudo reg.  */
1321 #define REG_OK_FOR_BASE_P(X)    \
1322     ((REGNO (X) >= REG_R0 && REGNO (X) < REG_R3 + 1 )          \
1323        || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1324 
1325 /* Nonzero if X is the 'ybase' register */
1326 #define REG_OK_FOR_YBASE_P(X)   \
1327   (REGNO(X) == REG_YBASE || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1328 #else
1329 
1330 /* Nonzero if X is a hard reg that can be used as an index.  */
1331 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1332 
1333 /* Nonzero if X is a hard reg that can be used as a base reg.  */
1334 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1335 
1336 /* Nonzero if X is the 'ybase' register */
1337 #define REG_OK_FOR_YBASE_P(X) REGNO_OK_FOR_YBASE_P (REGNO(X))
1338 
1339 #endif
1340 
1341 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1342    that is a valid memory address for an instruction.
1343    The MODE argument is the machine mode for the MEM expression
1344    that wants to use this address.
1345 
1346    On the 1610, the actual legitimate addresses must be N (N must fit in
1347    5 bits), *rn (register indirect), *rn++, or *rn-- */
1348 
1349 #define INT_FITS_5_BITS(I)    ((unsigned long) (I) < 0x20)
1350 #define INT_FITS_16_BITS(I)   ((unsigned long) (I) < 0x10000)
1351 #define YBASE_CONST_OFFSET(I)       ((I) >= -31 && (I) <= 0)
1352 #define YBASE_OFFSET(X)       (GET_CODE (X) == CONST_INT && YBASE_CONST_OFFSET (INTVAL(X)))
1353 
1354 #define FITS_16_BITS(X)       (GET_CODE (X) == CONST_INT && INT_FITS_16_BITS(INTVAL(X)))
1355 #define FITS_5_BITS(X)        (GET_CODE (X) == CONST_INT && INT_FITS_5_BITS(INTVAL(X)))
1356 #define ILLEGAL_HIMODE_ADDR(MODE, CONST)  ((MODE) == HImode && CONST == -31)
1357 
1358 #define INDIRECTABLE_ADDRESS_P(X)                            \
1359     ((GET_CODE(X) == REG && REG_OK_FOR_BASE_P(X))            \
1360   || ((GET_CODE(X) == POST_DEC || GET_CODE(X) == POST_INC)   \
1361        && REG_P(XEXP(X,0)) && REG_OK_FOR_BASE_P(XEXP(X,0)))  \
1362   || (GET_CODE(X) == CONST_INT && (unsigned long) (X) < 0x20))
1363 
1364 
1365 #define INDEXABLE_ADDRESS_P(X,MODE)                                 \
1366    ((GET_CODE(X) == PLUS && GET_CODE (XEXP (X,0)) == REG &&         \
1367      XEXP(X,0) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,1)) &&   \
1368      !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,1)))) ||              \
1369     (GET_CODE(X) == PLUS && GET_CODE (XEXP (X,1)) == REG &&         \
1370      XEXP(X,1) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,0)) &&  \
1371      !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,0)))))
1372 
1373 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                     \
1374 {							            \
1375     if (INDIRECTABLE_ADDRESS_P(X))                                  \
1376         goto ADDR;                                                  \
1377 }
1378 
1379 
1380 /* Try machine-dependent ways of modifying an illegitimate address
1381    to be legitimate.  If we find one, return the new, valid address.
1382    This macro is used in only one place: `memory_address' in explow.c.
1383 
1384    OLDX is the address as it was before break_out_memory_refs was called.
1385    In some cases it is useful to look at this to decide what needs to be done.
1386 
1387    MODE and WIN are passed so that this macro can use
1388    GO_IF_LEGITIMATE_ADDRESS.
1389 
1390    It is always safe for this macro to do nothing.  It exists to recognize
1391    opportunities to optimize the output.
1392 
1393    For the 1610, we need not do anything.  However, if we don't,
1394    `memory_address' will try lots of things to get a valid address, most of
1395    which will result in dead code and extra pseudos.  So we make the address
1396    valid here.
1397 
1398    This is easy:  The only valid addresses are an offset from a register
1399    and we know the address isn't valid.  So just call either `force_operand'
1400    or `force_reg' unless this is a (plus (reg ...) (const_int 0)).  */
1401 
1402 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)			\
1403 { if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx)	\
1404     X = XEXP (x, 0);						\
1405   if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS)		\
1406     X = force_operand (X, 0);					\
1407   else								\
1408     X = force_reg (Pmode, X);					\
1409   goto WIN;							\
1410 }
1411 
1412 /* Go to LABEL if ADDR (a legitimate address expression)
1413    has an effect that depends on the machine mode it is used for.
1414    On the 1610, only postdecrement and postincrement address depend thus
1415    (the amount of decrement or increment being the length of the operand).  */
1416 
1417 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)	\
1418  if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1419 
1420 /* Nonzero if the constant value X is a legitimate general operand.
1421    It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */
1422 #define LEGITIMATE_CONSTANT_P(X) (1)
1423 
1424 
1425 /* CONDITION CODE INFORMATION */
1426 
1427 /* Store in cc_status the expressions
1428    that the condition codes will describe
1429    after execution of an instruction whose pattern is EXP.
1430    Do not alter them if the instruction would not alter the cc's.  */
1431 
1432 #define NOTICE_UPDATE_CC(EXP, INSN) \
1433    notice_update_cc( (EXP) )
1434 
1435 /* DESCRIBING RELATIVE COSTS OF OPERATIONS */
1436 
1437 /* Compute the cost of computing a constant rtl expression RTX
1438    whose rtx-code is CODE.  The body of this macro is a portion
1439    of a switch statement.  If the code is computed here,
1440    return it with a return statement.  */
1441 #define CONST_COSTS(RTX,CODE,OUTER_CODE)                                \
1442   case CONST_INT:						        \
1443     return (unsigned) INTVAL (RTX) < 65536 ? 0 : 2;                     \
1444   case LABEL_REF:						        \
1445   case SYMBOL_REF:						        \
1446   case CONST:								\
1447     return COSTS_N_INSNS (1);						\
1448                                                                         \
1449   case CONST_DOUBLE:						        \
1450     return COSTS_N_INSNS (2);
1451 
1452 /* Like CONST_COSTS but applies to nonconstant RTL expressions.
1453    This can be used, for example to indicate how costly a multiply
1454    instruction is.  */
1455 #define RTX_COSTS(X,CODE,OUTER_CODE)                            \
1456   case MEM:                                                     \
1457     return GET_MODE (X) == QImode ? COSTS_N_INSNS (2) :         \
1458                                     COSTS_N_INSNS (4);          \
1459   case DIV:                                                     \
1460   case MOD:                                                     \
1461     return COSTS_N_INSNS (38);                                  \
1462   case MULT:                                                    \
1463     if (GET_MODE (X) == QImode)                                 \
1464         return COSTS_N_INSNS (2);                               \
1465     else                                                        \
1466         return COSTS_N_INSNS (38);                              \
1467   case PLUS:                                                    \
1468   case MINUS:                                                   \
1469     if (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT)              \
1470         {                                                       \
1471           return (1 +                                           \
1472                   rtx_cost (XEXP (X, 0), CODE) +                \
1473                   rtx_cost (XEXP (X, 1), CODE));                \
1474         }                                                       \
1475     else                                                        \
1476         return COSTS_N_INSNS (38);                              \
1477                                                                 \
1478   case AND: case IOR: case XOR:                                 \
1479         return (1 +                                             \
1480                 rtx_cost (XEXP (X, 0), CODE) +                  \
1481                 rtx_cost (XEXP (X, 1), CODE));                  \
1482                                                                 \
1483   case NEG: case NOT:                                           \
1484     return COSTS_N_INSNS (1);                                   \
1485   case ASHIFT:                                                  \
1486   case ASHIFTRT:                                                \
1487   case LSHIFTRT:                                                \
1488     if (GET_CODE (XEXP (X,1)) == CONST_INT)                     \
1489       {                                                         \
1490         int number = INTVAL(XEXP (X,1));                        \
1491         if (number == 1 || number == 4 || number == 8 ||        \
1492             number == 16)                                       \
1493             return COSTS_N_INSNS (1);                           \
1494         else                                                    \
1495 	{                                                       \
1496           if (TARGET_BMU)                                       \
1497             return COSTS_N_INSNS (2);                           \
1498           else                                                  \
1499             return COSTS_N_INSNS (num_1600_core_shifts(number)); \
1500 	}                                                       \
1501       }                                                         \
1502     if (TARGET_BMU)                                             \
1503       return COSTS_N_INSNS (1);                                 \
1504     else                                                        \
1505       return COSTS_N_INSNS (15);
1506 
1507 /* An expression giving the cost of an addressing mode that contains
1508    address.  */
1509 #define ADDRESS_COST(ADDR)  dsp16xx_address_cost (ADDR)
1510 
1511 /* A c expression for the cost of moving data from a register in
1512    class FROM to one in class TO. The classes are expressed using
1513    the enumeration values such as GENERAL_REGS. A value of 2 is
1514    the default.  */
1515 #define REGISTER_MOVE_COST(MODE,FROM,TO)  dsp16xx_register_move_cost (FROM, TO)
1516 
1517 /* A C expression for the cost of moving data of mode MODE between
1518    a register and memory. A value of 2 is the default.  */
1519 #define MEMORY_MOVE_COST(MODE,CLASS,IN)                          \
1520   (GET_MODE_CLASS(MODE) == MODE_INT && MODE == QImode ? 12       \
1521    : 16)
1522 
1523 /* A C expression for the cost of a branch instruction. A value of
1524    1 is the default; */
1525 #define BRANCH_COST 1
1526 
1527 
1528 /* Define this because otherwise gcc will try to put the function address
1529    in any old pseudo register. We can only use pt.  */
1530 #define NO_FUNCTION_CSE
1531 
1532 /* Define this macro as a C expression which is nonzero if accessing less
1533    than a word of memory (i.e a char or short) is no faster than accessing
1534    a word of memory, i.e if such access require more than one instruction
1535    or if ther is no difference in cost between byte and (aligned) word
1536    loads.  */
1537 #define SLOW_BYTE_ACCESS 1
1538 
1539 /* Define this macro if unaligned accesses have a cost many times greater than
1540    aligned accesses, for example if they are emulated in a trap handler */
1541 /* define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) */
1542 
1543 /* Define this macro to inhibit strength reduction of memory addresses */
1544 /* #define DONT_REDUCE_ADDR */
1545 
1546 
1547 /* DIVIDING THE OUTPUT IN SECTIONS */
1548 /* Output before read-only data.  */
1549 
1550 #define DEFAULT_TEXT_SEG_NAME ".text"
1551 #define TEXT_SECTION_ASM_OP  rsect_text
1552 
1553 /* Output before constants and strings */
1554 #define DEFAULT_CONST_SEG_NAME  ".const"
1555 #define READONLY_DATA_SECTION_ASM_OP rsect_const
1556 
1557 /* Output before writable data.  */
1558 #define DEFAULT_DATA_SEG_NAME ".data"
1559 #define DATA_SECTION_ASM_OP  rsect_data
1560 
1561 #define DEFAULT_BSS_SEG_NAME ".bss"
1562 #define BSS_SECTION_ASM_OP rsect_bss
1563 
1564 /* We will default to using 1610 if the user doesn't
1565    specify it.  */
1566 #define DEFAULT_CHIP_NAME "1610"
1567 
1568 /* THE OVERALL FRAMEWORK OF AN ASSEMBLER FILE */
1569 
1570 /* Output at beginning of assembler file.  */
1571 #define ASM_FILE_START(FILE) coff_dsp16xx_file_start (FILE)
1572 
1573 /* A C string constant describing how to begin a comment in the target
1574    assembler language.  */
1575 #define ASM_COMMENT_START ""
1576 #define ASM_COMMENT_END ""
1577 
1578 /* Output to assembler file text saying following lines
1579    may contain character constants, extra white space, comments, etc.  */
1580 #define ASM_APP_ON ""
1581 
1582 /* Output to assembler file text saying following lines
1583    no longer contain unusual constructs.  */
1584 #define ASM_APP_OFF ""
1585 
1586 /* OUTPUT OF DATA */
1587 
1588 /* This is how we output a 'c' character string. For the 16xx
1589    assembler we have to do it one letter at a time */
1590 
1591 #define ASCII_LENGTH 10
1592 
1593 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1594   do {									      \
1595     FILE *_hide_asm_out_file = (MYFILE);				      \
1596     const unsigned char *_hide_p = (const unsigned char *) (MYSTRING);	      \
1597     int _hide_thissize = (MYLENGTH);					      \
1598     {									      \
1599       FILE *asm_out_file = _hide_asm_out_file;				      \
1600       const unsigned char *p = _hide_p;					      \
1601       int thissize = _hide_thissize;					      \
1602       int i;								      \
1603 									      \
1604       for (i = 0; i < thissize; i++)					      \
1605 	{								      \
1606 	  register int c = p[i];					      \
1607 	  								      \
1608 	  if (i % ASCII_LENGTH == 0) \
1609 	    fprintf (asm_out_file, "\tint ");				      \
1610 	    								\
1611 	  if (c >= ' ' && c < 0177 && c != '\'')			      \
1612 	  {								      \
1613 	    putc ('\'', asm_out_file);					      \
1614 	    putc (c, asm_out_file);					      \
1615 	    putc ('\'', asm_out_file);					      \
1616 	  }								      \
1617 	  else								      \
1618 	    {								      \
1619 	      fprintf (asm_out_file, "%d", c);			              \
1620 	      /* After an octal-escape, if a digit follows,		      \
1621 		 terminate one string constant and start another.	      \
1622 		 The VAX assembler fails to stop reading the escape	      \
1623 		 after three digits, so this is the only way we		      \
1624 		 can get it to parse the data properly.  		      \
1625 	      if (i < thissize - 1 && ISDIGIT (p[i + 1]))		      \
1626 		fprintf (asm_out_file, "\'\n\tint \'");		              \
1627 		*/ \
1628 	  }								      \
1629 	  /* if: \
1630 	     we are not at the last char (i != thissize -1) \
1631 	     and (we are not at a line break multiple  \
1632 	     but i == 0) (it will be the very first time) \
1633 	     then put out a comma to extend. \
1634 	   */ \
1635 	  if ((i != thissize - 1) && ((i + 1) % ASCII_LENGTH))	      \
1636 	    fprintf(asm_out_file, ",");	 	                      \
1637 	  if (!((i + 1) % ASCII_LENGTH)) \
1638 	    fprintf (asm_out_file, "\n");			      \
1639 	}								      \
1640       fprintf (asm_out_file, "\n");					      \
1641     }									      \
1642   }									      \
1643   while (0)
1644 
1645 /* Store in OUTPUT a string (made with alloca) containing
1646    an assembler-name for a local static variable or function
1647    named NAME. LABELNO is an integer which is different for
1648    each call.  */
1649 
1650 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO)			\
1651   do {									\
1652     int len = strlen (NAME);						\
1653     char *temp = (char *) alloca (len + 3);				\
1654     temp[0] = 'L';							\
1655     strcpy (&temp[1], (NAME));						\
1656     temp[len + 1] = '_';						\
1657     temp[len + 2] = 0;							\
1658     (OUTPUT) = (char *) alloca (strlen (NAME) + 11);			\
1659     ASM_GENERATE_INTERNAL_LABEL (OUTPUT, temp, LABELNO);		\
1660   } while (0)
1661 
1662 /* OUTPUT OF UNINITIALIZED VARIABLES */
1663 
1664 /* This says how to output an assembler line
1665    to define a global common symbol.  */
1666 
1667 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED)  \
1668   asm_output_common (FILE, NAME, SIZE, ROUNDED);
1669 
1670 /* This says how to output an assembler line
1671    to define a local common symbol.  */
1672 
1673 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)  \
1674   asm_output_local (FILE, NAME, SIZE, ROUNDED);
1675 
1676 /* OUTPUT AND GENERATION OF LABELS */
1677 
1678 /* Globalizing directive for a label.  */
1679 #define GLOBAL_ASM_OP ".global "
1680 
1681 /* A C statement to output to the stdio stream any text necessary
1682    for declaring the name of an external symbol named name which
1683    is referenced in this compilation but not defined.  */
1684 
1685 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME)   \
1686 {					\
1687 	fprintf (FILE, ".extern ");	\
1688 	assemble_name (FILE, NAME);	\
1689 	fprintf (FILE, "\n");		\
1690 }
1691 /* A C statement to output on stream an assembler pseudo-op to
1692    declare a library function named external.  */
1693 
1694 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN)    \
1695 {						\
1696 	fprintf (FILE, ".extern ");		\
1697 	assemble_name (FILE, XSTR (FUN, 0));	\
1698 	fprintf (FILE, "\n");			\
1699 }
1700 
1701 /* The prefix to add to user-visible assembler symbols.  */
1702 
1703 #define USER_LABEL_PREFIX "_"
1704 
1705 /* This is how to output an internal numbered label where
1706    PREFIX is the class of label and NUM is the number within the class.  */
1707 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM)	\
1708   fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1709 
1710 /* This is how to store into the string LABEL
1711    the symbol_ref name of an internal numbered label where
1712    PREFIX is the class of label and NUM is the number within the class.
1713    This is suitable for output with `assemble_name'.  */
1714 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)	\
1715   sprintf (LABEL, "*%s%d", PREFIX, NUM)
1716 
1717 
1718 /* OUTPUT OF ASSEMBLER INSTRUCTIONS */
1719 
1720 /* How to refer to registers in assembler output.
1721    This sequence is indexed by compiler's hard-register-number (see above).  */
1722 
1723 #define REGISTER_NAMES \
1724 {"a0", "a0l", "a1", "a1l", "x", "y", "yl", "p", "pl",  \
1725  "r0", "r1", "r2",  "r3", "j", "k", "ybase", "pt",     \
1726  "ar0", "ar1", "ar2", "ar3",                           \
1727  "c0", "c1", "c2", "pr", "rb",                         \
1728  "*(0)", "*(1)", "*(2)", "*(3)", "*(4)", "*(5)",       \
1729  "*(6)", "*(7)", "*(8)", "*(9)", "*(10)", "*(11)",     \
1730  "*(12)", "*(13)", "*(14)", "*(15)", "*(16)", "*(17)", \
1731  "*(18)", "*(19)", "*(20)", "*(21)", "*(22)", "*(23)", \
1732  "*(24)", "*(25)", "*(26)", "*(27)", "*(28)", "*(29)", \
1733  "*(30)", "*(31)" }
1734 
1735 #define HIMODE_REGISTER_NAMES \
1736 {"a0", "a0", "a1", "a1", "x", "y", "y", "p", "p",  \
1737  "r0", "r1", "r2",  "r3", "j", "k", "ybase", "pt",     \
1738  "ar0", "ar1", "ar2", "ar3",                           \
1739  "c0", "c1", "c2", "pr", "rb",                         \
1740  "*(0)", "*(1)", "*(2)", "*(3)", "*(4)", "*(5)",       \
1741  "*(6)", "*(7)", "*(8)", "*(9)", "*(10)", "*(11)",     \
1742  "*(12)", "*(13)", "*(14)", "*(15)", "*(16)", "*(17)", \
1743  "*(18)", "*(19)", "*(20)", "*(21)", "*(22)", "*(23)", \
1744  "*(24)", "*(25)", "*(26)", "*(27)", "*(28)", "*(29)", \
1745  "*(30)", "*(31)" }
1746 
1747 #define PRINT_OPERAND_PUNCT_VALID_P(CODE)  0
1748 
1749 /* Print operand X (an rtx) in assembler syntax to file FILE.
1750    CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1751    For `%' followed by punctuation, CODE is the punctuation and X is null.
1752 
1753    DSP1610 extensions for operand codes:
1754 
1755    %H - print lower 16 bits of constant
1756    %U - print upper 16 bits of constant
1757    %w - print low half of register (e.g 'a0l')
1758    %u - print upper half of register (e.g 'a0')
1759    %b - print high half of accumulator for F3 ALU instructions
1760    %h - print constant in decimal   */
1761 
1762 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
1763 
1764 
1765 /* Print a memory address as an operand to reference that memory location.  */
1766 
1767 #define PRINT_OPERAND_ADDRESS(FILE, ADDR)  print_operand_address (FILE, ADDR)
1768 
1769 /* This is how to output an insn to push a register on the stack.
1770    It need not be very fast code since it is used only for profiling  */
1771 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)    \
1772   internal_error ("profiling not implemented yet");
1773 
1774 /* This is how to output an insn to pop a register from the stack.
1775    It need not be very fast code since it is used only for profiling  */
1776 #define ASM_OUTPUT_REG_POP(FILE,REGNO)     \
1777   internal_error ("profiling not implemented yet");
1778 
1779 /* OUTPUT OF DISPATCH TABLES */
1780 
1781 /* This macro should be provided on machines where the addresses in a dispatch
1782    table are relative to the table's own address.  */
1783 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)  \
1784   fprintf (FILE, "\tint L%d-L%d\n", VALUE, REL)
1785 
1786 /* This macro should be provided on machines where the addresses in a dispatch
1787    table are absolute.  */
1788 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)  \
1789   fprintf (FILE, "\tint L%d\n", VALUE)
1790 
1791 /* ASSEMBLER COMMANDS FOR ALIGNMENT */
1792 
1793 /* This is how to output an assembler line that says to advance
1794    the location counter to a multiple of 2**LOG bytes. We should
1795    not have to do any alignment since the 1610 is a word machine.  */
1796 #define ASM_OUTPUT_ALIGN(FILE,LOG)
1797 
1798 /* Define this macro if ASM_OUTPUT_SKIP should not be used in the text section
1799    because it fails to put zero1 in the bytes that are skipped.  */
1800 #define ASM_NO_SKIP_IN_TEXT 1
1801 
1802 #define ASM_OUTPUT_SKIP(FILE,SIZE)  \
1803   fprintf (FILE, "\t%d * int 0\n", (SIZE))
1804 
1805 /* CONTROLLING DEBUGGING INFORMATION FORMAT */
1806 
1807 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
1808 
1809 #define ASM_OUTPUT_DEF(asm_out_file, LABEL1, LABEL2) \
1810          do {						\
1811 	 fprintf (asm_out_file, ".alias " ); \
1812          ASM_OUTPUT_LABELREF(asm_out_file, LABEL1);  \
1813 	 fprintf (asm_out_file, "=" ); \
1814          ASM_OUTPUT_LABELREF(asm_out_file, LABEL2); \
1815 	 fprintf (asm_out_file, "\n" );			\
1816 	 } while (0)
1817 
1818 
1819 /* MISCELLANEOUS PARAMETERS */
1820 
1821 /* Specify the machine mode that this machine uses
1822    for the index in the tablejump instruction.  */
1823 #define CASE_VECTOR_MODE QImode
1824 
1825 /* Define as C expression which evaluates to nonzero if the tablejump
1826    instruction expects the table to contain offsets from the address of the
1827    table.
1828    Do not define this if the table should contain absolute addresses.  */
1829 /* #define CASE_VECTOR_PC_RELATIVE 1 */
1830 
1831 /* Max number of bytes we can move from memory to memory
1832    in one reasonably fast instruction.  */
1833 #define MOVE_MAX 1
1834 
1835 /* Defining this macro causes the compiler to omit a sign-extend, zero-extend,
1836    or bitwise 'and' instruction that truncates the count of a shift operation
1837    to a width equal to the number of bits needed to represent the size of the
1838    object being shifted. Do not define this macro unless the truncation applies
1839    to both shift operations and bit-field operations (if any).  */
1840 /* #define SHIFT_COUNT_TRUNCATED */
1841 
1842 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1843    is done just by pretending it is already truncated.  */
1844 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1845 
1846 /* When a prototype says `char' or `short', really pass an `int'.  */
1847 #define PROMOTE_PROTOTYPES 1
1848 
1849 /* An alias for the machine mode used for pointers */
1850 #define Pmode  QImode
1851 
1852 /* A function address in a call instruction
1853    is a byte address (for indexing purposes)
1854    so give the MEM rtx a byte's mode.  */
1855 #define FUNCTION_MODE  QImode
1856 
1857 #if !defined(__DATE__)
1858 #define TARGET_VERSION fprintf (stderr, " (%s)", VERSION_INFO1)
1859 #else
1860 #define TARGET_VERSION fprintf (stderr, " (%s, %s)", VERSION_INFO1, __DATE__)
1861 #endif
1862 
1863 #define VERSION_INFO1 "Lucent DSP16xx C Cross Compiler, version 1.3.0b"
1864 
1865 
1866 /* Define this as 1 if `char' should by default be signed; else as 0.  */
1867 #define DEFAULT_SIGNED_CHAR 1
1868 
1869 /* Define this so gcc does not output a call to __main, since we
1870    are not currently supporting c++.  */
1871 #define INIT_SECTION_ASM_OP  1
1872 
1873