1 /* 2 * Copyright (c) 1986 Regents of the University of California. 3 * All rights reserved. The Berkeley software License Agreement 4 * specifies the terms and conditions for redistribution. 5 * 6 * @(#)dmxreg.h 7.1 (Berkeley) 09/04/89 7 * 8 * Common structures and definitions 9 * for merged DMF and DMZ drivers. 10 */ 11 12 /* 13 * Hardware registers per octet of asynchronous lines 14 */ 15 struct dmx_octet { 16 short csr; /* control-status register */ 17 short lpr; /* line parameter register */ 18 short rbuf; /* receiver buffer (ro) */ 19 union { 20 u_short irw; /* indirect register word */ 21 u_char irc[2]; /* " " bytes */ 22 } octun; 23 }; 24 25 #define rsp rbuf /* receive silo parameter register (wo) */ 26 #define tbuf octun.irc[0] /* transmit buffer */ 27 #define tsc octun.irc[0] /* transmit silo count */ 28 #define rmstsc octun.irw /* rcv modem status, xmit silo count */ 29 #define rms octun.irc[1] /* receive modem status */ 30 #define lctms octun.irw /* line control, transmit modem status */ 31 #define tba octun.irw /* transmit buffer address */ 32 #define tcc octun.irw /* transmit character count */ 33 34 /* bits in dmfcsr */ 35 #define DMF_TI 0100000 /* transmit interrupt */ 36 #define DMF_TIE 0040000 /* transmit interrupt enable */ 37 #define DMF_NXM 0030000 /* non-existent memory (which bit?) */ 38 #define DMF_LIN 0003400 /* transmit line number */ 39 #define DMF_RI 0000200 /* receiver interrupt */ 40 #define DMF_RIE 0000100 /* receiver interrupt enable */ 41 #define DMF_CLR 0000040 /* master reset */ 42 #define DMF_IAD 0000037 /* indirect address register */ 43 44 #define DMF_IE (DMF_TIE|DMF_RIE) 45 46 #define DMFIR_RMSTSC 000 /* select rmstsc indirect register */ 47 #define DMFIR_TBUF 000 /* select tbuf indirect register */ 48 #define DMFIR_LCR 010 /* select lcr indirect register */ 49 #define DMFIR_TBA 020 /* select tba indirect register */ 50 #define DMFIR_TCC 030 /* select tcc indirect register */ 51 52 /* bits in dmflpr */ 53 #define BITS6 0010 /* 6 bits per character */ 54 #define BITS7 0020 /* 7 bits per character */ 55 #define BITS8 0030 /* 8 bits per character */ 56 #define PENABLE 0040 /* parity enable */ 57 #define EPAR 0100 /* even parity */ 58 #define TWOSB 0200 /* two stop bits */ 59 60 #define DMF_SILOCNT 32 /* size of DMF output silo (per line) */ 61 62 /* bits in dmfrbuf */ 63 #define DMF_DSC 0004000 /* data set change */ 64 #define DMF_PE 0010000 /* parity error */ 65 #define DMF_FE 0020000 /* framing error */ 66 #define DMF_DO 0040000 /* data overrun */ 67 68 /* bits in dmfrmstsc */ 69 #define DMF_TSC 0x00ff /* transmit silo count */ 70 #define DMF_USRR 0x0400 /* user modem signal (pin 25) */ 71 #define DMF_SR 0x0800 /* secondary receive */ 72 #define DMF_CTS 0x1000 /* clear to send */ 73 #define DMF_CAR 0x2000 /* carrier detect */ 74 #define DMF_RNG 0x4000 /* ring */ 75 #define DMF_DSR 0x8000 /* data set ready */ 76 77 /* bits in dmflctms (tms half) */ 78 #define DMF_USRW 0x0100 /* user modem signal (pin 18) */ 79 #define DMF_DTR 0x0200 /* data terminal ready */ 80 #define DMF_RATE 0x0400 /* data signal rate select */ 81 #define DMF_SRTS 0x0800 /* secondary request to send (dmf) */ 82 #define DMF_RTS 0x1000 /* request to send */ 83 #define DMF_PREEMPT 0x8000 /* preempt output */ 84 85 /* bits in dmflctms (lc half) */ 86 #define DMF_MIE 0040 /* modem interrupt enable */ 87 #define DMF_FLUSH 0020 /* flush transmit silo */ 88 #define DMF_BRK 0010 /* send break bit */ 89 #define DMF_RE 0004 /* receive enable */ 90 #define DMF_AUTOX 0002 /* auto XON/XOFF */ 91 #define DMF_TE 0001 /* transmit enable */ 92 93 #define DMF_ENA (DMF_MIE|DMF_RE|DMF_TE) 94 95 /* flags for modem control */ 96 #define DMF_ON (DMF_DTR|DMF_RTS|DMF_ENA) 97 #define DMF_OFF 0 98 99 /* bits added to dm lsr for DMGET/DMSET */ 100 #define DML_USR 0001000 /* usr modem sig, not a real DM bit */ 101 #define DML_DSR 0000400 /* data set ready, not a real DM bit */ 102