1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2007-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2007-2009 Marvell Semiconductor, Inc.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer,
13 * without modification.
14 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
15 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
16 * redistribution must be conditioned upon including a substantially
17 * similar Disclaimer requirement for further binary redistribution.
18 *
19 * NO WARRANTY
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
23 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
24 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
25 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
28 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGES.
31 */
32
33 #ifndef _MWL_HAL_H_
34 #define _MWL_HAL_H_
35 /*
36 * Hardware Access Layer for Marvell Wireless Devices.
37 */
38
39 #define MWL_MBSS_SUPPORT /* enable multi-bss support */
40
41 /*
42 * Define total number of TX queues in the shared memory.
43 * This count includes the EDCA queues, Block Ack queues, and HCCA queues
44 * In addition to this, there could be a management packet queue some
45 * time in the future
46 */
47 #define MWL_NUM_EDCA_QUEUES 4
48 #define MWL_NUM_HCCA_QUEUES 0
49 #define MWL_NUM_BA_QUEUES 0
50 #define MWL_NUM_MGMT_QUEUES 0
51 #define MWL_NUM_ACK_QUEUES 0
52 #define MWL_NUM_TX_QUEUES \
53 (MWL_NUM_EDCA_QUEUES + MWL_NUM_HCCA_QUEUES + MWL_NUM_BA_QUEUES + \
54 MWL_NUM_MGMT_QUEUES + MWL_NUM_ACK_QUEUES)
55 #define MWL_MAX_RXWCB_QUEUES 1
56
57 #define MWL_MAX_SUPPORTED_RATES 12
58 #define MWL_MAX_SUPPORTED_MCS 32
59
60 typedef enum {
61 MWL_HAL_OK
62 } MWL_HAL_STATUS;
63
64 /*
65 * Transmit queue assignment.
66 */
67 enum {
68 MWL_WME_AC_BK = 0, /* background access category */
69 MWL_WME_AC_BE = 1, /* best effort access category*/
70 MWL_WME_AC_VI = 2, /* video access category */
71 MWL_WME_AC_VO = 3, /* voice access category */
72 };
73
74 struct mwl_hal {
75 bus_space_handle_t mh_ioh; /* BAR 1 copied from softc */
76 bus_space_tag_t mh_iot;
77 uint32_t mh_imask; /* interrupt mask */
78 /* remainder is opaque to driver */
79 };
80 struct mwl_hal *mwl_hal_attach(device_t dev, uint16_t devid,
81 bus_space_handle_t ioh, bus_space_tag_t iot, bus_dma_tag_t tag);
82 void mwl_hal_detach(struct mwl_hal *);
83
84 /*
85 * Query whether multi-bss support is available/enabled.
86 */
87 int mwl_hal_ismbsscapable(struct mwl_hal *);
88
89 typedef enum {
90 MWL_HAL_AP,
91 MWL_HAL_STA, /* infrastructure mode */
92 MWL_HAL_IBSS /* ibss/adhoc mode */
93 } MWL_HAL_BSSTYPE;
94 struct mwl_hal_vap;
95
96 struct mwl_hal_vap *mwl_hal_newvap(struct mwl_hal *, MWL_HAL_BSSTYPE,
97 const uint8_t mac[6]);
98 void mwl_hal_delvap(struct mwl_hal_vap *);
99
100 enum {
101 MWL_HAL_DEBUG_SENDCMD = 0x00000001,
102 MWL_HAL_DEBUG_CMDDONE = 0x00000002,
103 MWL_HAL_DEBUG_IGNHANG = 0x00000004,
104 };
105 void mwl_hal_setdebug(struct mwl_hal *, int);
106 int mwl_hal_getdebug(struct mwl_hal *);
107
108 typedef struct {
109 uint16_t freqLow, freqHigh;
110 int nchannels;
111 struct mwl_hal_channel {
112 uint16_t freq; /* channel center */
113 uint8_t ieee; /* channel number */
114 int8_t maxTxPow; /* max tx power (dBm) */
115 uint8_t targetPowers[4];/* target powers (dBm) */
116 #define MWL_HAL_MAXCHAN 40
117 } channels[MWL_HAL_MAXCHAN];
118 } MWL_HAL_CHANNELINFO;
119 int mwl_hal_getchannelinfo(struct mwl_hal *, int band, int chw,
120 const MWL_HAL_CHANNELINFO **);
121
122 /*
123 * Return the current ISR setting and clear the cause.
124 */
125 static __inline void
mwl_hal_getisr(struct mwl_hal * mh,uint32_t * status)126 mwl_hal_getisr(struct mwl_hal *mh, uint32_t *status)
127 {
128 #define MACREG_REG_A2H_INTERRUPT_CAUSE 0x00000C30 // (From ARM to host)
129 #define MACREG_REG_INT_CODE 0x00000C14
130 uint32_t cause;
131
132 cause = bus_space_read_4(mh->mh_iot, mh->mh_ioh,
133 MACREG_REG_A2H_INTERRUPT_CAUSE);
134 if (cause == 0xffffffff) { /* card removed */
135 cause = 0;
136 } else if (cause != 0) {
137 /* clear cause bits */
138 bus_space_write_4(mh->mh_iot, mh->mh_ioh,
139 MACREG_REG_A2H_INTERRUPT_CAUSE, cause &~ mh->mh_imask);
140 (void) bus_space_read_4(mh->mh_iot, mh->mh_ioh,
141 MACREG_REG_INT_CODE);
142 cause &= mh->mh_imask;
143 }
144 *status = cause;
145 #undef MACREG_REG_INT_CODE
146 #undef MACREG_REG_A2H_INTERRUPT_CAUSE
147 }
148
149 void mwl_hal_intrset(struct mwl_hal *mh, uint32_t mask);
150
151 /*
152 * Kick the firmware to tell it there are new tx descriptors
153 * for processing. The driver says what h/w q has work in
154 * case the f/w ever gets smarter.
155 */
156 static __inline void
mwl_hal_txstart(struct mwl_hal * mh,int qnum)157 mwl_hal_txstart(struct mwl_hal *mh, int qnum)
158 {
159 #define MACREG_REG_H2A_INTERRUPT_EVENTS 0x00000C18 // (From host to ARM)
160 #define MACREG_H2ARIC_BIT_PPA_READY 0x00000001 // bit 0
161 #define MACREG_REG_INT_CODE 0x00000C14
162
163 bus_space_write_4(mh->mh_iot, mh->mh_ioh,
164 MACREG_REG_H2A_INTERRUPT_EVENTS, MACREG_H2ARIC_BIT_PPA_READY);
165 (void) bus_space_read_4(mh->mh_iot, mh->mh_ioh, MACREG_REG_INT_CODE);
166 #undef MACREG_REG_INT_CODE
167 #undef MACREG_H2ARIC_BIT_PPA_READY
168 #undef MACREG_REG_H2A_INTERRUPT_EVENTS
169 }
170
171 void mwl_hal_cmddone(struct mwl_hal *mh);
172
173 typedef struct {
174 uint32_t FreqBand : 6,
175 #define MWL_FREQ_BAND_2DOT4GHZ 0x1
176 #define MWL_FREQ_BAND_5GHZ 0x4
177 ChnlWidth: 5,
178 #define MWL_CH_10_MHz_WIDTH 0x1
179 #define MWL_CH_20_MHz_WIDTH 0x2
180 #define MWL_CH_40_MHz_WIDTH 0x4
181 ExtChnlOffset: 2,
182 #define MWL_EXT_CH_NONE 0x0
183 #define MWL_EXT_CH_ABOVE_CTRL_CH 0x1
184 #define MWL_EXT_CH_BELOW_CTRL_CH 0x3
185 : 19; /* reserved */
186 } MWL_HAL_CHANNEL_FLAGS;
187
188 typedef struct {
189 uint32_t channel;
190 MWL_HAL_CHANNEL_FLAGS channelFlags;
191 } MWL_HAL_CHANNEL;
192
193 /*
194 * Get Hardware/Firmware capabilities.
195 */
196 struct mwl_hal_hwspec {
197 uint8_t hwVersion; /* version of the HW */
198 uint8_t hostInterface; /* host interface */
199 uint16_t maxNumWCB; /* max # of WCB FW handles */
200 uint16_t maxNumMCAddr; /* max # of mcast addresses FW handles*/
201 uint16_t maxNumTxWcb; /* max # of tx descs per WCB */
202 uint8_t macAddr[6]; /* MAC address programmed in HW */
203 uint16_t regionCode; /* EEPROM region code */
204 uint16_t numAntennas; /* Number of antenna used */
205 uint32_t fwReleaseNumber; /* firmware release number */
206 uint32_t wcbBase0;
207 uint32_t rxDescRead;
208 uint32_t rxDescWrite;
209 uint32_t ulFwAwakeCookie;
210 uint32_t wcbBase[MWL_NUM_TX_QUEUES - MWL_NUM_ACK_QUEUES];
211 };
212 int mwl_hal_gethwspecs(struct mwl_hal *mh, struct mwl_hal_hwspec *);
213
214 /*
215 * Supply tx/rx dma-related settings to the firmware.
216 */
217 struct mwl_hal_txrxdma {
218 uint32_t maxNumWCB; /* max # of WCB FW handles */
219 uint32_t maxNumTxWcb; /* max # of tx descs per WCB */
220 uint32_t rxDescRead;
221 uint32_t rxDescWrite;
222 uint32_t wcbBase[MWL_NUM_TX_QUEUES - MWL_NUM_ACK_QUEUES];
223 };
224 int mwl_hal_sethwdma(struct mwl_hal *mh, const struct mwl_hal_txrxdma *);
225
226 /*
227 * Get Hardware Statistics.
228 *
229 * Items marked with ! are deprecated and not ever updated. In
230 * some cases this is because work has been moved to the host (e.g.
231 * rx defragmentation).
232 */
233 struct mwl_hal_hwstats {
234 uint32_t TxRetrySuccesses; /* tx success w/ 1 retry */
235 uint32_t TxMultipleRetrySuccesses;/* tx success w/ >1 retry */
236 uint32_t TxFailures; /* tx fail due to no ACK */
237 uint32_t RTSSuccesses; /* CTS rx'd for RTS */
238 uint32_t RTSFailures; /* CTS not rx'd for RTS */
239 uint32_t AckFailures; /* same as TxFailures */
240 uint32_t RxDuplicateFrames; /* rx discard for dup seqno */
241 uint32_t FCSErrorCount; /* rx discard for bad FCS */
242 uint32_t TxWatchDogTimeouts; /* MAC tx hang (f/w recovery) */
243 uint32_t RxOverflows; /* no f/w buffer for rx data */
244 uint32_t RxFragErrors; /* !rx fail due to defrag */
245 uint32_t RxMemErrors; /* out of mem or desc corrupted
246 in some way */
247 uint32_t RxPointerErrors; /* MAC internal ptr problem */
248 uint32_t TxUnderflows; /* !tx underflow on dma */
249 uint32_t TxDone; /* MAC tx ops completed
250 (possibly w/ error) */
251 uint32_t TxDoneBufTryPut; /* ! */
252 uint32_t TxDoneBufPut; /* same as TxDone */
253 uint32_t Wait4TxBuf; /* !no f/w buf avail when
254 supplied a tx descriptor */
255 uint32_t TxAttempts; /* tx descriptors processed */
256 uint32_t TxSuccesses; /* tx attempts successful */
257 uint32_t TxFragments; /* tx with fragmentation */
258 uint32_t TxMulticasts; /* tx multicast frames */
259 uint32_t RxNonCtlPkts; /* rx non-control frames */
260 uint32_t RxMulticasts; /* rx multicast frames */
261 uint32_t RxUndecryptableFrames; /* rx failed due to crypto */
262 uint32_t RxICVErrors; /* rx failed due to ICV check */
263 uint32_t RxExcludedFrames; /* rx discarded, e.g. bssid */
264 };
265 int mwl_hal_gethwstats(struct mwl_hal *mh, struct mwl_hal_hwstats *);
266
267 /*
268 * Set HT Guard Interval.
269 *
270 * GIType = 0: enable long and short GI
271 * GIType = 1: enable short GI
272 * GIType = 2: enable long GI
273 */
274 int mwl_hal_sethtgi(struct mwl_hal_vap *, int GIType);
275
276 /*
277 * Set Radio Configuration.
278 *
279 * onoff != 0 turns radio on; otherwise off.
280 * if radio is enabled, the preamble is set too.
281 */
282 typedef enum {
283 WL_LONG_PREAMBLE = 1,
284 WL_SHORT_PREAMBLE = 3,
285 WL_AUTO_PREAMBLE = 5,
286 } MWL_HAL_PREAMBLE;
287 int mwl_hal_setradio(struct mwl_hal *mh, int onoff, MWL_HAL_PREAMBLE preamble);
288
289 /*
290 * Set Antenna Configuration (legacy operation).
291 *
292 * The RX antenna can be selected using the bitmask
293 * ant (bit 0 = antenna 1, bit 1 = antenna 2, etc.)
294 * (diversity?XXX)
295 */
296 typedef enum {
297 WL_ANTENNATYPE_RX = 1,
298 WL_ANTENNATYPE_TX = 2,
299 } MWL_HAL_ANTENNA;
300 int mwl_hal_setantenna(struct mwl_hal *mh, MWL_HAL_ANTENNA dirSet, int ant);
301
302 /*
303 * Set the threshold for using RTS on TX.
304 */
305 int mwl_hal_setrtsthreshold(struct mwl_hal_vap *, int threshold);
306
307 /*
308 * Set the adapter to operate in infrastructure mode.
309 */
310 int mwl_hal_setinframode(struct mwl_hal_vap *);
311
312 /*
313 * Set Radar Detection Configuration.
314 */
315 typedef enum {
316 DR_DFS_DISABLE = 0,
317 DR_CHK_CHANNEL_AVAILABLE_START = 1,
318 DR_CHK_CHANNEL_AVAILABLE_STOP = 2,
319 DR_IN_SERVICE_MONITOR_START = 3
320 } MWL_HAL_RADAR;
321 int mwl_hal_setradardetection(struct mwl_hal *mh, MWL_HAL_RADAR action);
322 /*
323 * Set the region code that selects the radar bin'ing agorithm.
324 */
325 int mwl_hal_setregioncode(struct mwl_hal *mh, int regionCode);
326
327 /*
328 * Initiate an 802.11h-based channel switch. The CSA ie
329 * is included in the next beacon(s) using the specified
330 * information and the firmware counts down until switch
331 * time after which it notifies the driver by delivering
332 * an interrupt with MACREG_A2HRIC_BIT_CHAN_SWITCH set in
333 * the cause register.
334 */
335 int mwl_hal_setchannelswitchie(struct mwl_hal *,
336 const MWL_HAL_CHANNEL *nextchan, uint32_t mode, uint32_t count);
337
338 /*
339 * Set regdomain code (IEEE SKU).
340 */
341 enum {
342 DOMAIN_CODE_FCC = 0x10, /* USA */
343 DOMAIN_CODE_IC = 0x20, /* Canda */
344 DOMAIN_CODE_ETSI = 0x30, /* Europe */
345 DOMAIN_CODE_SPAIN = 0x31, /* Spain */
346 DOMAIN_CODE_FRANCE = 0x32, /* France */
347 DOMAIN_CODE_ETSI_131 = 0x130,/* ETSI w/ 1.3.1 radar type */
348 DOMAIN_CODE_MKK = 0x40, /* Japan */
349 DOMAIN_CODE_MKK2 = 0x41, /* Japan w/ 10MHz chan spacing */
350 DOMAIN_CODE_DGT = 0x80, /* Taiwan */
351 DOMAIN_CODE_AUS = 0x81, /* Australia */
352 };
353
354 /*
355 * Transmit rate control. Rate codes with bit 0x80 set are
356 * interpreted as MCS codes (this limits us to 0-127). The
357 * transmit rate can be set to a single fixed rate or can
358 * be configured to start at an initial rate and drop based
359 * on retry counts.
360 */
361 typedef enum {
362 RATE_AUTO = 0, /* rate selected by firmware */
363 RATE_FIXED = 2, /* rate fixed */
364 RATE_FIXED_DROP = 1, /* rate starts fixed but may drop */
365 } MWL_HAL_TXRATE_HANDLING;
366
367 typedef struct {
368 uint8_t McastRate; /* rate for multicast frames */
369 #define RATE_MCS 0x80 /* rate is an MCS index */
370 uint8_t MgtRate; /* rate for management frames */
371 struct {
372 uint8_t TryCount; /* try this many times */
373 uint8_t Rate; /* use this tx rate */
374 } RateSeries[4]; /* rate series */
375 } MWL_HAL_TXRATE;
376
377 int mwl_hal_settxrate(struct mwl_hal_vap *,
378 MWL_HAL_TXRATE_HANDLING handling, const MWL_HAL_TXRATE *rate);
379 /* NB: hack for setting rates while scanning */
380 int mwl_hal_settxrate_auto(struct mwl_hal *, const MWL_HAL_TXRATE *rate);
381
382 /*
383 * Set the Slot Time Configuration.
384 * NB: usecs must either be 9 or 20 for now.
385 */
386 int mwl_hal_setslottime(struct mwl_hal *mh, int usecs);
387
388 /*
389 * Adjust current transmit power settings according to powerLevel.
390 * This translates to low/medium/high use of the current tx power rate tables.
391 */
392 int mwl_hal_adjusttxpower(struct mwl_hal *, uint32_t powerLevel);
393 /*
394 * Set the transmit power for the specified channel; the power
395 * is taken from the calibration data and capped according to
396 * the specified max tx power (in dBm).
397 */
398 int mwl_hal_settxpower(struct mwl_hal *, const MWL_HAL_CHANNEL *,
399 uint8_t maxtxpow);
400
401 /*
402 * Set the Multicast Address Filter.
403 * A packed array addresses is specified.
404 */
405 #define MWL_HAL_MCAST_MAX 32
406 int mwl_hal_setmcast(struct mwl_hal *mh, int nmc, const uint8_t macs[]);
407
408 /*
409 * Crypto Configuration.
410 */
411 typedef struct {
412 uint16_t pad;
413 uint16_t keyTypeId;
414 #define KEY_TYPE_ID_WEP 0
415 #define KEY_TYPE_ID_TKIP 1
416 #define KEY_TYPE_ID_AES 2 /* AES-CCMP */
417 uint32_t keyFlags;
418 #define KEY_FLAG_INUSE 0x00000001 /* indicate key is in use */
419 #define KEY_FLAG_RXGROUPKEY 0x00000002 /* Group key for RX only */
420 #define KEY_FLAG_TXGROUPKEY 0x00000004 /* Group key for TX */
421 #define KEY_FLAG_PAIRWISE 0x00000008 /* pairwise */
422 #define KEY_FLAG_RXONLY 0x00000010 /* only used for RX */
423 #define KEY_FLAG_AUTHENTICATOR 0x00000020 /* Key is for Authenticator */
424 #define KEY_FLAG_TSC_VALID 0x00000040 /* Sequence counters valid */
425 #define KEY_FLAG_WEP_TXKEY 0x01000000 /* Tx key for WEP */
426 #define KEY_FLAG_MICKEY_VALID 0x02000000 /* Tx/Rx MIC keys are valid */
427 uint32_t keyIndex; /* for WEP only; actual key index */
428 uint16_t keyLen; /* key size in bytes */
429 union { /* key material, keyLen gives size */
430 uint8_t wep[16]; /* enough for 128 bits */
431 uint8_t aes[16];
432 struct {
433 /* NB: group or pairwise key is determined by keyFlags */
434 uint8_t keyMaterial[16];
435 uint8_t txMic[8];
436 uint8_t rxMic[8];
437 struct {
438 uint16_t low;
439 uint32_t high;
440 } rsc;
441 struct {
442 uint16_t low;
443 uint32_t high;
444 } tsc;
445 } __packed tkip;
446 }__packed key;
447 } __packed MWL_HAL_KEYVAL;
448
449 /*
450 * Plumb a unicast/group key. The mac address identifies
451 * the station, use the broadcast address for group keys.
452 */
453 int mwl_hal_keyset(struct mwl_hal_vap *, const MWL_HAL_KEYVAL *kv,
454 const uint8_t mac[6]);
455
456 /*
457 * Plumb a unicast/group key. The mac address identifies
458 * the station, use the broadcast address for group keys.
459 */
460 int mwl_hal_keyreset(struct mwl_hal_vap *, const MWL_HAL_KEYVAL *kv,
461 const uint8_t mac[6]);
462
463 /*
464 * Set the MAC address.
465 */
466 int mwl_hal_setmac(struct mwl_hal_vap *, const uint8_t addr[6]);
467
468 /*
469 * Set the beacon frame contents. The firmware will modify the
470 * frame only to add CSA and WME ie's and to fill in dynamic fields
471 * such as the sequence #..
472 */
473 int mwl_hal_setbeacon(struct mwl_hal_vap *, const void *, size_t);
474
475 /*
476 * Handle power save operation for AP operation when offloaded to
477 * the host (SET_HW_SPEC_HOST_POWERSAVE). mwl_hal_setbss_powersave
478 * informs the firmware whether 1+ associated stations are in power
479 * save mode (it will then buffer mcast traffic). mwl_hal_setsta_powersave
480 * specifies a change in power save state for an associated station.
481 */
482 int mwl_hal_setpowersave_bss(struct mwl_hal_vap *, uint8_t nsta);
483 int mwl_hal_setpowersave_sta(struct mwl_hal_vap *, uint16_t aid, int ena);
484
485 /*
486 * Set Association Configuration for station operation.
487 */
488 int mwl_hal_setassocid(struct mwl_hal_vap *, const uint8_t bssId[6],
489 uint16_t assocId);
490
491 /*
492 * Set the current channel.
493 */
494 int mwl_hal_setchannel(struct mwl_hal *mh, const MWL_HAL_CHANNEL *c);
495
496 /*
497 * A-MPDU Block Ack (BA) stream support. There are several
498 * streams that the driver must multiplex. Once assigned
499 * to a station the driver queues frames to a corresponding
500 * transmit queue and the firmware handles all the work.
501 *
502 * XXX no way to find out how many streams are supported
503 */
504 typedef struct {
505 void *data[2]; /* opaque data */
506 int txq;
507 } MWL_HAL_BASTREAM;
508
509 const MWL_HAL_BASTREAM *mwl_hal_bastream_alloc(struct mwl_hal_vap *,
510 int ba_type, const uint8_t Macaddr[6], uint8_t Tid,
511 uint8_t ParamInfo, void *, void *);
512 const MWL_HAL_BASTREAM *mwl_hal_bastream_lookup(struct mwl_hal *mh, int s);
513 int mwl_hal_bastream_create(struct mwl_hal_vap *, const MWL_HAL_BASTREAM *,
514 int BarThrs, int WindowSize, uint16_t seqno);
515 int mwl_hal_bastream_destroy(struct mwl_hal *mh, const MWL_HAL_BASTREAM *);
516 int mwl_hal_getwatchdogbitmap(struct mwl_hal *mh, uint8_t bitmap[1]);
517 int mwl_hal_bastream_get_seqno(struct mwl_hal *mh, const MWL_HAL_BASTREAM *,
518 const uint8_t Macaddr[6], uint16_t *pseqno);
519 /* for sysctl hookup for debugging */
520 void mwl_hal_setbastreams(struct mwl_hal *mh, int mask);
521 int mwl_hal_getbastreams(struct mwl_hal *mh);
522
523 /*
524 * Set/get A-MPDU aggregation parameters.
525 */
526 int mwl_hal_setaggampduratemode(struct mwl_hal *, int mode, int thresh);
527 int mwl_hal_getaggampduratemode(struct mwl_hal *, int *mode, int *thresh);
528
529 /*
530 * Inform the firmware of a new association station.
531 * The address is the MAC address of the peer station.
532 * The AID is supplied sans the 0xc000 bits. The station
533 * ID is defined by the caller. The peer information must
534 * be supplied.
535 *
536 * NB: All values are in host byte order; any byte swapping
537 * is handled by the hal.
538 */
539 typedef struct {
540 uint32_t LegacyRateBitMap;
541 uint32_t HTRateBitMap;
542 uint16_t CapInfo;
543 uint16_t HTCapabilitiesInfo;
544 uint8_t MacHTParamInfo;
545 uint8_t Rev;
546 struct {
547 uint8_t ControlChan;
548 uint8_t AddChan;
549 uint8_t OpMode;
550 uint8_t stbc;
551 } __packed AddHtInfo;
552 } __packed MWL_HAL_PEERINFO;
553 int mwl_hal_newstation(struct mwl_hal_vap *, const uint8_t addr[6],
554 uint16_t aid, uint16_t sid, const MWL_HAL_PEERINFO *,
555 int isQosSta, int wmeInfo);
556 int mwl_hal_delstation(struct mwl_hal_vap *, const uint8_t addr[6]);
557
558 /*
559 * Prod the firmware to age packets on station power
560 * save queues and reap frames on the tx aggregation q's.
561 */
562 int mwl_hal_setkeepalive(struct mwl_hal *mh);
563
564 typedef enum {
565 AP_MODE_B_ONLY = 1,
566 AP_MODE_G_ONLY = 2,
567 AP_MODE_MIXED = 3,
568 AP_MODE_N_ONLY = 4,
569 AP_MODE_BandN = 5,
570 AP_MODE_GandN = 6,
571 AP_MODE_BandGandN = 7,
572 AP_MODE_A_ONLY = 8,
573 AP_MODE_AandG = 10,
574 AP_MODE_AandN = 12,
575 } MWL_HAL_APMODE;
576 int mwl_hal_setapmode(struct mwl_hal_vap *, MWL_HAL_APMODE);
577
578 /*
579 * Enable/disable firmware operation. mwl_hal_start is
580 * also used to sync state updates, e.g. beacon frame
581 * reconstruction after content changes.
582 */
583 int mwl_hal_stop(struct mwl_hal_vap *);
584 int mwl_hal_start(struct mwl_hal_vap *);
585
586 /*
587 * Add/Remove station from Power Save TIM handling.
588 *
589 * If set is non-zero the AID is enabled, if zero it is removed.
590 */
591 int mwl_hal_updatetim(struct mwl_hal_vap *, uint16_t aid, int set);
592
593 /*
594 * Enable/disable 11g protection use. This call specifies
595 * the ERP information element flags to use.
596 */
597 int mwl_hal_setgprot(struct mwl_hal *, int);
598
599 /*
600 * Enable/disable WMM support.
601 */
602 int mwl_hal_setwmm(struct mwl_hal *mh, int onoff);
603
604 /*
605 * Configure WMM EDCA parameters for the specified h/w ring.
606 */
607 int mwl_hal_setedcaparams(struct mwl_hal *mh, uint8_t qnum,
608 uint32_t CWmin, uint32_t CWmax, uint8_t AIFSN, uint16_t TXOPLimit);
609
610 /*
611 * Configure rate adaptation for indooor/outdoor operation.
612 * XXX wtf?
613 */
614 int mwl_hal_setrateadaptmode(struct mwl_hal *mh, uint16_t mode);
615
616 typedef enum {
617 CSMODE_CONSERVATIVE = 0,
618 CSMODE_AGGRESSIVE = 1,
619 CSMODE_AUTO_ENA = 2,
620 CSMODE_AUTO_DIS = 3,
621 } MWL_HAL_CSMODE;
622 int mwl_hal_setcsmode(struct mwl_hal *mh, MWL_HAL_CSMODE csmode);
623
624 /*
625 * Configure 11n protection on/off.
626 */
627 typedef enum {
628 HTPROTECT_NONE = 0, /* disable */
629 HTPROTECT_OPT = 1, /* optional */
630 HTPROTECT_HT20 = 2, /* protect only HT20 */
631 HTPROTECT_HT2040 = 3, /* protect HT20/40 */
632 HTPROTECT_AUTO = 4, /* automatic */
633 } MWL_HAL_HTPROTECT;
634 int mwl_hal_setnprot(struct mwl_hal_vap *, MWL_HAL_HTPROTECT mode);
635 /*
636 * Configure 11n protection mechanism for when protection is enabled.
637 */
638 int mwl_hal_setnprotmode(struct mwl_hal_vap *, uint8_t mode);
639
640 /*
641 * Enable/disable Marvell "turbo mode"".
642 */
643 int mwl_hal_setoptimizationlevel(struct mwl_hal *mh, int onoff);
644
645 /*
646 * Set MIMO Power Save handling for a station; the enable and mode
647 * values come directly from the Action frame.
648 */
649 int mwl_hal_setmimops(struct mwl_hal *mh, const uint8_t addr[6],
650 uint8_t enable, uint8_t mode);
651
652 /*
653 * Retrieve the region/country code from the EEPROM.
654 */
655 int mwl_hal_getregioncode(struct mwl_hal *mh, uint8_t *countryCode);
656 int mwl_hal_GetBeacon(struct mwl_hal *mh, uint8_t *pBcn, uint16_t *pLen);
657 int mwl_hal_SetRifs(struct mwl_hal *mh, uint8_t QNum);
658
659 /*
660 * Set/get promiscuous mode.
661 */
662 int mwl_hal_setpromisc(struct mwl_hal *, int ena);
663 int mwl_hal_getpromisc(struct mwl_hal *);
664
665 /*
666 * Enable/disable CF-End use.
667 */
668 int mwl_hal_setcfend(struct mwl_hal *, int ena);
669
670 /*
671 * Enable/disable sta-mode DWDS use/operation.
672 */
673 int mwl_hal_setdwds(struct mwl_hal *, int ena);
674
675 /*
676 * Diagnostic interface. This is an open-ended interface that
677 * is opaque to applications. Diagnostic programs use this to
678 * retrieve internal data structures, etc. There is no guarantee
679 * that calling conventions for calls other than MWL_DIAG_REVS
680 * are stable between HAL releases; a diagnostic application must
681 * use the HAL revision information to deal with ABI/API differences.
682 */
683 int mwl_hal_getdiagstate(struct mwl_hal *mh, int request,
684 const void *args, uint32_t argsize,
685 void **result, uint32_t *resultsize);
686
687 int mwl_hal_fwload(struct mwl_hal *mh, void *fwargs);
688 #endif /* _MWL_HAL_H_ */
689