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Searched defs:DPM_TABLE_300__MemoryLevel_5_EdcReadEnable_MASK (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_1_sh_mask.h1837 #define DPM_TABLE_300__MemoryLevel_5_EdcReadEnable_MASK 0xff000000 macro
H A Dsmu_7_1_0_sh_mask.h1839 #define DPM_TABLE_300__MemoryLevel_5_EdcReadEnable_MASK 0xff000000 macro