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Searched defs:DPM_TABLE_385__UvdLevel_6_DclkDivider__SHIFT (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_7_0_1_sh_mask.h2148 #define DPM_TABLE_385__UvdLevel_6_DclkDivider__SHIFT 0x18 macro
H A Dsmu_7_1_0_sh_mask.h2150 #define DPM_TABLE_385__UvdLevel_6_DclkDivider__SHIFT 0x18 macro