| /dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-pine-h64/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-pcduino3/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-pine64/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-pinebook/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 __REG(0x400002c8) /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-orangepi-plus-2e/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-orangepi-pc2/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-orangepi-one/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-orangepi-pc/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
|
| /dports/sysutils/u-boot-orangepi-pc-plus/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
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| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 273 #define DTADR12 0x400002c8 /* DMA Target Address Register Channel 12 */ macro
|