1 /////////////////////////////////////////////////////////////////////////
2 // $Id: cpu.h 14318 2021-07-23 09:30:17Z sshwarts $
3 /////////////////////////////////////////////////////////////////////////
4 //
5 // Copyright (C) 2001-2020 The Bochs Project
6 //
7 // This library is free software; you can redistribute it and/or
8 // modify it under the terms of the GNU Lesser General Public
9 // License as published by the Free Software Foundation; either
10 // version 2 of the License, or (at your option) any later version.
11 //
12 // This library is distributed in the hope that it will be useful,
13 // but WITHOUT ANY WARRANTY; without even the implied warranty of
14 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 // Lesser General Public License for more details.
16 //
17 // You should have received a copy of the GNU Lesser General Public
18 // License along with this library; if not, write to the Free Software
19 // Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
20 /////////////////////////////////////////////////////////////////////////
21
22 #ifndef BX_CPU_H
23 #define BX_CPU_H
24
25 #include <setjmp.h>
26
27 #include "bx_debug/debug.h"
28
29 #include "decoder/decoder.h"
30
31 #if defined(NEED_CPU_REG_SHORTCUTS)
32
33 /* WARNING:
34 Only BX_CPU_C member functions can use these shortcuts safely!
35 Functions that use the shortcuts outside of BX_CPU_C might work
36 when BX_USE_CPU_SMF=1 but will fail when BX_USE_CPU_SMF=0
37 (for example in SMP mode).
38 */
39
40 // access to 8 bit general registers
41 #define AL (BX_CPU_THIS_PTR gen_reg[0].word.byte.rl)
42 #define CL (BX_CPU_THIS_PTR gen_reg[1].word.byte.rl)
43 #define DL (BX_CPU_THIS_PTR gen_reg[2].word.byte.rl)
44 #define BL (BX_CPU_THIS_PTR gen_reg[3].word.byte.rl)
45 #define AH (BX_CPU_THIS_PTR gen_reg[0].word.byte.rh)
46 #define CH (BX_CPU_THIS_PTR gen_reg[1].word.byte.rh)
47 #define DH (BX_CPU_THIS_PTR gen_reg[2].word.byte.rh)
48 #define BH (BX_CPU_THIS_PTR gen_reg[3].word.byte.rh)
49
50 #define TMP8L (BX_CPU_THIS_PTR gen_reg[BX_TMP_REGISTER].word.byte.rl)
51
52 // access to 16 bit general registers
53 #define AX (BX_CPU_THIS_PTR gen_reg[0].word.rx)
54 #define CX (BX_CPU_THIS_PTR gen_reg[1].word.rx)
55 #define DX (BX_CPU_THIS_PTR gen_reg[2].word.rx)
56 #define BX (BX_CPU_THIS_PTR gen_reg[3].word.rx)
57 #define SP (BX_CPU_THIS_PTR gen_reg[4].word.rx)
58 #define BP (BX_CPU_THIS_PTR gen_reg[5].word.rx)
59 #define SI (BX_CPU_THIS_PTR gen_reg[6].word.rx)
60 #define DI (BX_CPU_THIS_PTR gen_reg[7].word.rx)
61
62 // access to 16 bit instruction pointer
63 #define IP (BX_CPU_THIS_PTR gen_reg[BX_16BIT_REG_IP].word.rx)
64
65 #define TMP16 (BX_CPU_THIS_PTR gen_reg[BX_TMP_REGISTER].word.rx)
66
67 // accesss to 32 bit general registers
68 #define EAX (BX_CPU_THIS_PTR gen_reg[0].dword.erx)
69 #define ECX (BX_CPU_THIS_PTR gen_reg[1].dword.erx)
70 #define EDX (BX_CPU_THIS_PTR gen_reg[2].dword.erx)
71 #define EBX (BX_CPU_THIS_PTR gen_reg[3].dword.erx)
72 #define ESP (BX_CPU_THIS_PTR gen_reg[4].dword.erx)
73 #define EBP (BX_CPU_THIS_PTR gen_reg[5].dword.erx)
74 #define ESI (BX_CPU_THIS_PTR gen_reg[6].dword.erx)
75 #define EDI (BX_CPU_THIS_PTR gen_reg[7].dword.erx)
76
77 // access to 32 bit instruction pointer
78 #define EIP (BX_CPU_THIS_PTR gen_reg[BX_32BIT_REG_EIP].dword.erx)
79
80 #define TMP32 (BX_CPU_THIS_PTR gen_reg[BX_TMP_REGISTER].dword.erx)
81
82 #if BX_SUPPORT_X86_64
83
84 // accesss to 64 bit general registers
85 #define RAX (BX_CPU_THIS_PTR gen_reg[0].rrx)
86 #define RCX (BX_CPU_THIS_PTR gen_reg[1].rrx)
87 #define RDX (BX_CPU_THIS_PTR gen_reg[2].rrx)
88 #define RBX (BX_CPU_THIS_PTR gen_reg[3].rrx)
89 #define RSP (BX_CPU_THIS_PTR gen_reg[4].rrx)
90 #define RBP (BX_CPU_THIS_PTR gen_reg[5].rrx)
91 #define RSI (BX_CPU_THIS_PTR gen_reg[6].rrx)
92 #define RDI (BX_CPU_THIS_PTR gen_reg[7].rrx)
93 #define R8 (BX_CPU_THIS_PTR gen_reg[8].rrx)
94 #define R9 (BX_CPU_THIS_PTR gen_reg[9].rrx)
95 #define R10 (BX_CPU_THIS_PTR gen_reg[10].rrx)
96 #define R11 (BX_CPU_THIS_PTR gen_reg[11].rrx)
97 #define R12 (BX_CPU_THIS_PTR gen_reg[12].rrx)
98 #define R13 (BX_CPU_THIS_PTR gen_reg[13].rrx)
99 #define R14 (BX_CPU_THIS_PTR gen_reg[14].rrx)
100 #define R15 (BX_CPU_THIS_PTR gen_reg[15].rrx)
101
102 // access to 64 bit instruction pointer
103 #define RIP (BX_CPU_THIS_PTR gen_reg[BX_64BIT_REG_RIP].rrx)
104
105 #define SSP (BX_CPU_THIS_PTR gen_reg[BX_64BIT_REG_SSP].rrx)
106
107 #define TMP64 (BX_CPU_THIS_PTR gen_reg[BX_TMP_REGISTER].rrx)
108
109 // access to 64 bit MSR registers
110 #define MSR_FSBASE (BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.u.segment.base)
111 #define MSR_GSBASE (BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.u.segment.base)
112
113 #else // simplify merge between 32-bit and 64-bit mode
114
115 #define RAX EAX
116 #define RCX ECX
117 #define RDX EDX
118 #define RBX EBX
119 #define RSP ESP
120 #define RBP EBP
121 #define RSI ESI
122 #define RDI EDI
123 #define RIP EIP
124
125 #endif // BX_SUPPORT_X86_64 == 0
126
127 #define PREV_RIP (BX_CPU_THIS_PTR prev_rip)
128
129 #if BX_SUPPORT_X86_64
130 #define BX_READ_8BIT_REGx(index,extended) ((((index) & 4) == 0 || (extended)) ? \
131 (BX_CPU_THIS_PTR gen_reg[index].word.byte.rl) : \
132 (BX_CPU_THIS_PTR gen_reg[(index)-4].word.byte.rh))
133 #define BX_READ_64BIT_REG(index) (BX_CPU_THIS_PTR gen_reg[index].rrx)
134 #define BX_READ_64BIT_REG_HIGH(index) (BX_CPU_THIS_PTR gen_reg[index].dword.hrx)
135 #else
136 #define BX_READ_8BIT_REG(index) (((index) & 4) ? \
137 (BX_CPU_THIS_PTR gen_reg[(index)-4].word.byte.rh) : \
138 (BX_CPU_THIS_PTR gen_reg[index].word.byte.rl))
139 #define BX_READ_8BIT_REGx(index,ext) BX_READ_8BIT_REG(index)
140 #endif
141
142 #define BX_READ_8BIT_REGL(index) (BX_CPU_THIS_PTR gen_reg[index].word.byte.rl)
143 #define BX_READ_16BIT_REG(index) (BX_CPU_THIS_PTR gen_reg[index].word.rx)
144 #define BX_READ_32BIT_REG(index) (BX_CPU_THIS_PTR gen_reg[index].dword.erx)
145
146 #define BX_WRITE_8BIT_REGH(index, val) {\
147 BX_CPU_THIS_PTR gen_reg[index].word.byte.rh = val; \
148 }
149
150 #define BX_WRITE_16BIT_REG(index, val) {\
151 BX_CPU_THIS_PTR gen_reg[index].word.rx = val; \
152 }
153
154 #if BX_SUPPORT_X86_64
155
156 #define BX_WRITE_8BIT_REGx(index, extended, val) {\
157 if (((index) & 4) == 0 || (extended)) \
158 BX_CPU_THIS_PTR gen_reg[index].word.byte.rl = val; \
159 else \
160 BX_CPU_THIS_PTR gen_reg[(index)-4].word.byte.rh = val; \
161 }
162
163 #define BX_WRITE_32BIT_REGZ(index, val) {\
164 BX_CPU_THIS_PTR gen_reg[index].rrx = (Bit32u) val; \
165 }
166
167 #define BX_WRITE_64BIT_REG(index, val) {\
168 BX_CPU_THIS_PTR gen_reg[index].rrx = val; \
169 }
170 #define BX_CLEAR_64BIT_HIGH(index) {\
171 BX_CPU_THIS_PTR gen_reg[index].dword.hrx = 0; \
172 }
173
174 #else
175
176 #define BX_WRITE_8BIT_REG(index, val) {\
177 if ((index) & 4) \
178 BX_CPU_THIS_PTR gen_reg[(index)-4].word.byte.rh = val; \
179 else \
180 BX_CPU_THIS_PTR gen_reg[index].word.byte.rl = val; \
181 }
182 #define BX_WRITE_8BIT_REGx(index, ext, val) BX_WRITE_8BIT_REG(index, val)
183
184 // For x86-32, I just pretend this one is like the macro above,
185 // so common code can be used.
186 #define BX_WRITE_32BIT_REGZ(index, val) {\
187 BX_CPU_THIS_PTR gen_reg[index].dword.erx = (Bit32u) val; \
188 }
189
190 #define BX_CLEAR_64BIT_HIGH(index)
191
192 #endif
193
194 #define CPL (BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.rpl)
195
196 #define USER_PL (BX_CPU_THIS_PTR user_pl) /* CPL == 3 */
197
198 #if BX_SUPPORT_SMP
199 #define BX_CPU_ID (BX_CPU_THIS_PTR bx_cpuid)
200 #else
201 #define BX_CPU_ID (0)
202 #endif
203
204 #if BX_SUPPORT_AVX
205
206 #define BX_READ_8BIT_OPMASK(index) (BX_CPU_THIS_PTR opmask[index].word.byte.rl)
207 #define BX_READ_16BIT_OPMASK(index) (BX_CPU_THIS_PTR opmask[index].word.rx)
208 #define BX_READ_32BIT_OPMASK(index) (BX_CPU_THIS_PTR opmask[index].dword.erx)
209 #define BX_READ_OPMASK(index) (BX_CPU_THIS_PTR opmask[index].rrx)
210
211 #define BX_SCALAR_ELEMENT_MASK(index) ((index) == 0 || (BX_READ_32BIT_OPMASK(index) & 0x1))
212
213 #define BX_WRITE_OPMASK(index, val_64) { \
214 BX_CPU_THIS_PTR opmask[index].rrx = val_64; \
215 }
216
CUT_OPMASK_TO(unsigned nelements)217 BX_CPP_INLINE Bit64u CUT_OPMASK_TO(unsigned nelements) { return (BX_CONST64(1) << (nelements)) - 1; }
218
219 #endif
220
221 #endif // defined(NEED_CPU_REG_SHORTCUTS)
222
223 // <TAG-INSTRUMENTATION_COMMON-BEGIN>
224
225 // possible types passed to BX_INSTR_TLB_CNTRL()
226 enum BX_Instr_TLBControl {
227 BX_INSTR_MOV_CR0 = 10,
228 BX_INSTR_MOV_CR3 = 11,
229 BX_INSTR_MOV_CR4 = 12,
230 BX_INSTR_TASK_SWITCH = 13,
231 BX_INSTR_CONTEXT_SWITCH = 14,
232 BX_INSTR_INVLPG = 15,
233 BX_INSTR_INVEPT = 16,
234 BX_INSTR_INVVPID = 17,
235 BX_INSTR_INVPCID = 18
236 };
237
238 // possible types passed to BX_INSTR_CACHE_CNTRL()
239 enum BX_Instr_CacheControl {
240 BX_INSTR_INVD = 10,
241 BX_INSTR_WBINVD = 11
242 };
243
244 // possible types passed to BX_INSTR_FAR_BRANCH() and BX_INSTR_UCNEAR_BRANCH()
245 enum BX_Instr_Branch {
246 BX_INSTR_IS_JMP = 10,
247 BX_INSTR_IS_JMP_INDIRECT = 11,
248 BX_INSTR_IS_CALL = 12,
249 BX_INSTR_IS_CALL_INDIRECT = 13,
250 BX_INSTR_IS_RET = 14,
251 BX_INSTR_IS_IRET = 15,
252 BX_INSTR_IS_INT = 16,
253 BX_INSTR_IS_SYSCALL = 17,
254 BX_INSTR_IS_SYSRET = 18,
255 BX_INSTR_IS_SYSENTER = 19,
256 BX_INSTR_IS_SYSEXIT = 20
257 };
258
259 // possible types passed to BX_INSTR_PREFETCH_HINT()
260 enum BX_Instr_PrefetchHINT {
261 BX_INSTR_PREFETCH_NTA = 0,
262 BX_INSTR_PREFETCH_T0 = 1,
263 BX_INSTR_PREFETCH_T1 = 2,
264 BX_INSTR_PREFETCH_T2 = 3
265 };
266
267 // <TAG-INSTRUMENTATION_COMMON-END>
268
269 // passed to internal debugger together with BX_READ/BX_WRITE/BX_EXECUTE/BX_RW
270 enum {
271 BX_PDPTR0_ACCESS = 1,
272 BX_PDPTR1_ACCESS,
273 BX_PDPTR2_ACCESS,
274 BX_PDPTR3_ACCESS,
275 BX_PTE_ACCESS,
276 BX_PDE_ACCESS,
277 BX_PDTE_ACCESS,
278 BX_PML4E_ACCESS,
279 BX_EPT_PTE_ACCESS,
280 BX_EPT_PDE_ACCESS,
281 BX_EPT_PDTE_ACCESS,
282 BX_EPT_PML4E_ACCESS,
283 BX_EPT_SPP_PTE_ACCESS,
284 BX_EPT_SPP_PDE_ACCESS,
285 BX_EPT_SPP_PDTE_ACCESS,
286 BX_EPT_SPP_PML4E_ACCESS,
287 BX_VMCS_ACCESS,
288 BX_SHADOW_VMCS_ACCESS,
289 BX_MSR_BITMAP_ACCESS,
290 BX_IO_BITMAP_ACCESS,
291 BX_VMREAD_BITMAP_ACCESS,
292 BX_VMWRITE_BITMAP_ACCESS,
293 BX_VMX_LOAD_MSR_ACCESS,
294 BX_VMX_STORE_MSR_ACCESS,
295 BX_VMX_VAPIC_ACCESS,
296 BX_VMX_PML_WRITE,
297 BX_SMRAM_ACCESS
298 };
299
300 struct BxExceptionInfo {
301 unsigned exception_type;
302 unsigned exception_class;
303 bool push_error;
304 };
305
306 enum BX_Exception {
307 BX_DE_EXCEPTION = 0, // Divide Error (fault)
308 BX_DB_EXCEPTION = 1, // Debug (fault/trap)
309 BX_BP_EXCEPTION = 3, // Breakpoint (trap)
310 BX_OF_EXCEPTION = 4, // Overflow (trap)
311 BX_BR_EXCEPTION = 5, // BOUND (fault)
312 BX_UD_EXCEPTION = 6,
313 BX_NM_EXCEPTION = 7,
314 BX_DF_EXCEPTION = 8,
315 BX_TS_EXCEPTION = 10,
316 BX_NP_EXCEPTION = 11,
317 BX_SS_EXCEPTION = 12,
318 BX_GP_EXCEPTION = 13,
319 BX_PF_EXCEPTION = 14,
320 BX_MF_EXCEPTION = 16,
321 BX_AC_EXCEPTION = 17,
322 BX_MC_EXCEPTION = 18,
323 BX_XM_EXCEPTION = 19,
324 BX_VE_EXCEPTION = 20,
325 BX_CP_EXCEPTION = 21 // Control Protection (fault)
326 };
327
328 enum CP_Exception_Error_Code {
329 BX_CP_NEAR_RET = 1,
330 BX_CP_FAR_RET_IRET = 2,
331 BX_CP_ENDBRANCH = 3,
332 BX_CP_RSTORSSP = 4,
333 BX_CP_SETSSBSY = 5
334 };
335
336 const unsigned BX_CPU_HANDLED_EXCEPTIONS = 32;
337
338 enum BxCpuMode {
339 BX_MODE_IA32_REAL = 0, // CR0.PE=0 |
340 BX_MODE_IA32_V8086 = 1, // CR0.PE=1, EFLAGS.VM=1 | EFER.LMA=0
341 BX_MODE_IA32_PROTECTED = 2, // CR0.PE=1, EFLAGS.VM=0 |
342 BX_MODE_LONG_COMPAT = 3, // EFER.LMA = 1, CR0.PE=1, CS.L=0
343 BX_MODE_LONG_64 = 4 // EFER.LMA = 1, CR0.PE=1, CS.L=1
344 };
345
346 const unsigned BX_MSR_MAX_INDEX = 0x1000;
347
348 extern const char* cpu_mode_string(unsigned cpu_mode);
349
350 #if BX_SUPPORT_X86_64
IsCanonical(bx_address offset)351 BX_CPP_INLINE bool IsCanonical(bx_address offset)
352 {
353 return ((Bit64u)((((Bit64s)(offset)) >> (BX_LIN_ADDRESS_WIDTH-1)) + 1) < 2);
354 }
355 #endif
356
IsValidPhyAddr(bx_phy_address addr)357 BX_CPP_INLINE bool IsValidPhyAddr(bx_phy_address addr)
358 {
359 return ((addr & BX_PHY_ADDRESS_RESERVED_BITS) == 0);
360 }
361
IsValidPageAlignedPhyAddr(bx_phy_address addr)362 BX_CPP_INLINE bool IsValidPageAlignedPhyAddr(bx_phy_address addr)
363 {
364 return ((addr & (BX_PHY_ADDRESS_RESERVED_BITS | 0xfff)) == 0);
365 }
366
367 const Bit32u CACHE_LINE_SIZE = 64;
368
369 class BX_CPU_C;
370 class BX_MEM_C;
371 class bxInstruction_c;
372
373 // <TAG-TYPE-EXECUTEPTR-START>
374 #if BX_USE_CPU_SMF
375 typedef void (BX_CPP_AttrRegparmN(1) *BxRepIterationPtr_tR)(bxInstruction_c *);
376 #else
377 typedef void (BX_CPU_C::*BxRepIterationPtr_tR)(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
378 #endif
379 // <TAG-TYPE-EXECUTEPTR-END>
380
381 #if BX_USE_CPU_SMF == 0
382 // normal member functions. This can ONLY be used within BX_CPU_C classes.
383 // Anyone on the outside should use the BX_CPU macro (defined in bochs.h)
384 // instead.
385 # define BX_CPU_THIS_PTR this->
386 # define BX_CPU_THIS this
387 # define BX_SMF
388 // with normal member functions, calling a member fn pointer looks like
389 // object->*(fnptr)(arg, ...);
390 // Since this is different from when SMF=1, encapsulate it in a macro.
391 # define BX_CPU_CALL_METHOD(func, args) \
392 (this->*((BxExecutePtr_tR) (func))) args
393 # define BX_CPU_CALL_REP_ITERATION(func, args) \
394 (this->*((BxRepIterationPtr_tR) (func))) args
395 #else
396 // static member functions. With SMF, there is only one CPU by definition.
397 # define BX_CPU_THIS_PTR BX_CPU(0)->
398 # define BX_CPU_THIS BX_CPU(0)
399 # define BX_SMF static
400 # define BX_CPU_CALL_METHOD(func, args) \
401 ((BxExecutePtr_tR) (func)) args
402 # define BX_CPU_CALL_REP_ITERATION(func, args) \
403 ((BxRepIterationPtr_tR) (func)) args
404 #endif
405
406 //
407 // BX_CPU_RESOLVE_ADDR:
408 // Resolve virtual address of the instruction's memory reference without any
409 // assumptions about instruction's operand size, address size or execution
410 // mode
411 //
412 // BX_CPU_RESOLVE_ADDR_64:
413 // Resolve virtual address of the instruction memory reference assuming
414 // the instruction is executed in 64-bit long mode with possible 64-bit
415 // or 32-bit address size.
416 //
417 // BX_CPU_RESOLVE_ADDR_32:
418 // Resolve virtual address of the instruction memory reference assuming
419 // the instruction is executed in legacy or compatibility mode with
420 // possible 32-bit or 16-bit address size.
421 //
422 //
423 #if BX_SUPPORT_X86_64
424 # define BX_CPU_RESOLVE_ADDR(i) \
425 ((i)->as64L() ? BxResolve64(i) : BxResolve32(i))
426 # define BX_CPU_RESOLVE_ADDR_64(i) \
427 ((i)->as64L() ? BxResolve64(i) : BxResolve32(i))
428 #else
429 # define BX_CPU_RESOLVE_ADDR(i) \
430 (BxResolve32(i))
431 #endif
432 # define BX_CPU_RESOLVE_ADDR_32(i) \
433 (BxResolve32(i))
434
435
436 #if BX_SUPPORT_SMP
437 // multiprocessor simulation, we need an array of cpus and memories
438 BOCHSAPI extern BX_CPU_C **bx_cpu_array;
439 #else
440 // single processor simulation, so there's one of everything
441 BOCHSAPI extern BX_CPU_C bx_cpu;
442 #endif
443
444 // notify internal debugger/instrumentation about memory access
445 #define BX_NOTIFY_LIN_MEMORY_ACCESS(laddr, paddr, size, memtype, rw, dataptr) { \
446 BX_INSTR_LIN_ACCESS(BX_CPU_ID, (laddr), (paddr), (size), (memtype), (rw)); \
447 BX_DBG_LIN_MEMORY_ACCESS(BX_CPU_ID, (laddr), (paddr), (size), (memtype), (rw), (dataptr)); \
448 }
449
450 #define BX_NOTIFY_PHY_MEMORY_ACCESS(paddr, size, memtype, rw, why, dataptr) { \
451 BX_INSTR_PHY_ACCESS(BX_CPU_ID, (paddr), (size), (memtype), (rw)); \
452 BX_DBG_PHY_MEMORY_ACCESS(BX_CPU_ID, (paddr), (size), (memtype), (rw), (why), (dataptr)); \
453 }
454
455 // accessors for all eflags in bx_flags_reg_t
456 // The macro is used once for each flag bit
457 // Do not use for arithmetic flags !
458 #define DECLARE_EFLAG_ACCESSOR(name,bitnum) \
459 BX_SMF BX_CPP_INLINE unsigned get_##name (); \
460 BX_SMF BX_CPP_INLINE unsigned getB_##name (); \
461 BX_SMF BX_CPP_INLINE void assert_##name (); \
462 BX_SMF BX_CPP_INLINE void clear_##name (); \
463 BX_SMF BX_CPP_INLINE void set_##name (bool val);
464
465 #define IMPLEMENT_EFLAG_ACCESSOR(name,bitnum) \
466 BX_CPP_INLINE unsigned BX_CPU_C::getB_##name () { \
467 return 1 & (BX_CPU_THIS_PTR eflags >> bitnum); \
468 } \
469 BX_CPP_INLINE unsigned BX_CPU_C::get_##name () { \
470 return BX_CPU_THIS_PTR eflags & (1 << bitnum); \
471 }
472
473 #define IMPLEMENT_EFLAG_SET_ACCESSOR(name,bitnum) \
474 BX_CPP_INLINE void BX_CPU_C::assert_##name () { \
475 BX_CPU_THIS_PTR eflags |= (1<<bitnum); \
476 } \
477 BX_CPP_INLINE void BX_CPU_C::clear_##name () { \
478 BX_CPU_THIS_PTR eflags &= ~(1<<bitnum); \
479 } \
480 BX_CPP_INLINE void BX_CPU_C::set_##name (bool val) { \
481 BX_CPU_THIS_PTR eflags = \
482 (BX_CPU_THIS_PTR eflags&~(1<<bitnum))|(Bit32u(val)<<bitnum); \
483 }
484
485 #if BX_CPU_LEVEL >= 4
486
487 #define IMPLEMENT_EFLAG_SET_ACCESSOR_AC(bitnum) \
488 BX_CPP_INLINE void BX_CPU_C::assert_AC() { \
489 BX_CPU_THIS_PTR eflags |= (1<<bitnum); \
490 handleAlignmentCheck(); \
491 } \
492 BX_CPP_INLINE void BX_CPU_C::clear_AC() { \
493 BX_CPU_THIS_PTR eflags &= ~(1<<bitnum); \
494 handleAlignmentCheck(); \
495 } \
496 BX_CPP_INLINE void BX_CPU_C::set_AC(bool val) { \
497 BX_CPU_THIS_PTR eflags = \
498 (BX_CPU_THIS_PTR eflags&~(1<<bitnum))|(Bit32u(val)<<bitnum); \
499 handleAlignmentCheck(); \
500 }
501
502 #endif
503
504 #define IMPLEMENT_EFLAG_SET_ACCESSOR_VM(bitnum) \
505 BX_CPP_INLINE void BX_CPU_C::assert_VM() { \
506 set_VM(1); \
507 } \
508 BX_CPP_INLINE void BX_CPU_C::clear_VM() { \
509 set_VM(0); \
510 } \
511 BX_CPP_INLINE void BX_CPU_C::set_VM(bool val) { \
512 if (!long_mode()) { \
513 BX_CPU_THIS_PTR eflags = \
514 (BX_CPU_THIS_PTR eflags&~(1<<bitnum))|(Bit32u(val)<<bitnum); \
515 handleCpuModeChange(); \
516 } \
517 }
518
519 // need special handling when IF is set
520 #define IMPLEMENT_EFLAG_SET_ACCESSOR_IF(bitnum) \
521 BX_CPP_INLINE void BX_CPU_C::assert_IF() { \
522 BX_CPU_THIS_PTR eflags |= (1<<bitnum); \
523 handleInterruptMaskChange(); \
524 } \
525 BX_CPP_INLINE void BX_CPU_C::clear_IF() { \
526 BX_CPU_THIS_PTR eflags &= ~(1<<bitnum); \
527 handleInterruptMaskChange(); \
528 } \
529 BX_CPP_INLINE void BX_CPU_C::set_IF(bool val) { \
530 if (val) assert_IF(); \
531 else clear_IF(); \
532 }
533
534 // assert async_event when TF is set
535 #define IMPLEMENT_EFLAG_SET_ACCESSOR_TF(bitnum) \
536 BX_CPP_INLINE void BX_CPU_C::assert_TF() { \
537 BX_CPU_THIS_PTR async_event = 1; \
538 BX_CPU_THIS_PTR eflags |= (1<<bitnum); \
539 } \
540 BX_CPP_INLINE void BX_CPU_C::clear_TF() { \
541 BX_CPU_THIS_PTR eflags &= ~(1<<bitnum); \
542 } \
543 BX_CPP_INLINE void BX_CPU_C::set_TF(bool val) { \
544 if (val) BX_CPU_THIS_PTR async_event = 1; \
545 BX_CPU_THIS_PTR eflags = \
546 (BX_CPU_THIS_PTR eflags&~(1<<bitnum))|(Bit32u(val)<<bitnum); \
547 }
548
549 // invalidate prefetch queue and call prefetch() when RF is set
550 #define IMPLEMENT_EFLAG_SET_ACCESSOR_RF(bitnum) \
551 BX_CPP_INLINE void BX_CPU_C::assert_RF() { \
552 invalidate_prefetch_q(); \
553 BX_CPU_THIS_PTR eflags |= (1<<bitnum); \
554 } \
555 BX_CPP_INLINE void BX_CPU_C::clear_RF() { \
556 BX_CPU_THIS_PTR eflags &= ~(1<<bitnum); \
557 } \
558 BX_CPP_INLINE void BX_CPU_C::set_RF(bool val) { \
559 if (val) invalidate_prefetch_q(); \
560 BX_CPU_THIS_PTR eflags = \
561 (BX_CPU_THIS_PTR eflags&~(1<<bitnum))|(Bit32u(val)<<bitnum); \
562 }
563
564 #define DECLARE_EFLAG_ACCESSOR_IOPL(bitnum) \
565 BX_SMF BX_CPP_INLINE void set_IOPL(Bit32u val); \
566 BX_SMF BX_CPP_INLINE Bit32u get_IOPL(void);
567
568 #define IMPLEMENT_EFLAG_ACCESSOR_IOPL(bitnum) \
569 BX_CPP_INLINE void BX_CPU_C::set_IOPL(Bit32u val) { \
570 BX_CPU_THIS_PTR eflags &= ~(3<<bitnum); \
571 BX_CPU_THIS_PTR eflags |= ((3&val) << bitnum); \
572 } \
573 BX_CPP_INLINE Bit32u BX_CPU_C::get_IOPL() { \
574 return 3 & (BX_CPU_THIS_PTR eflags >> bitnum); \
575 }
576
577 const Bit32u EFlagsCFMask = (1 << 0);
578 const Bit32u EFlagsPFMask = (1 << 2);
579 const Bit32u EFlagsAFMask = (1 << 4);
580 const Bit32u EFlagsZFMask = (1 << 6);
581 const Bit32u EFlagsSFMask = (1 << 7);
582 const Bit32u EFlagsTFMask = (1 << 8);
583 const Bit32u EFlagsIFMask = (1 << 9);
584 const Bit32u EFlagsDFMask = (1 << 10);
585 const Bit32u EFlagsOFMask = (1 << 11);
586 const Bit32u EFlagsIOPLMask = (3 << 12);
587 const Bit32u EFlagsNTMask = (1 << 14);
588 const Bit32u EFlagsRFMask = (1 << 16);
589 const Bit32u EFlagsVMMask = (1 << 17);
590 const Bit32u EFlagsACMask = (1 << 18);
591 const Bit32u EFlagsVIFMask = (1 << 19);
592 const Bit32u EFlagsVIPMask = (1 << 20);
593 const Bit32u EFlagsIDMask = (1 << 21);
594
595 const Bit32u EFlagsOSZAPCMask = \
596 (EFlagsCFMask | EFlagsPFMask | EFlagsAFMask | EFlagsZFMask | EFlagsSFMask | EFlagsOFMask);
597
598 const Bit32u EFlagsOSZAPMask = \
599 (EFlagsPFMask | EFlagsAFMask | EFlagsZFMask | EFlagsSFMask | EFlagsOFMask);
600
601 const Bit32u EFlagsValidMask = 0x003f7fd5; // only supported bits for EFLAGS
602
603 #if BX_SUPPORT_FPU
604 #include "i387.h"
605 #endif
606
607 #if BX_CPU_LEVEL >= 5
608 typedef struct
609 {
610 #if BX_SUPPORT_APIC
611 bx_phy_address apicbase;
612 #endif
613
614 // SYSCALL/SYSRET instruction msr's
615 Bit64u star;
616 #if BX_SUPPORT_X86_64
617 Bit64u lstar;
618 Bit64u cstar;
619 Bit32u fmask;
620 Bit64u kernelgsbase;
621 Bit32u tsc_aux;
622 #endif
623
624 #if BX_CPU_LEVEL >= 6
625 // SYSENTER/SYSEXIT instruction msr's
626 Bit32u sysenter_cs_msr;
627 bx_address sysenter_esp_msr;
628 bx_address sysenter_eip_msr;
629
630 BxPackedRegister pat;
631 Bit64u mtrrphys[16];
632 BxPackedRegister mtrrfix64k;
633 BxPackedRegister mtrrfix16k[2];
634 BxPackedRegister mtrrfix4k[8];
635 Bit32u mtrr_deftype;
636 #endif
637
638 #if BX_SUPPORT_VMX
639 Bit32u ia32_feature_ctrl;
640 #endif
641
642 #if BX_SUPPORT_SVM
643 Bit64u svm_hsave_pa;
644 #endif
645
646 #if BX_CPU_LEVEL >= 6
647 Bit64u ia32_xss;
648 #endif
649
650 // CET
651 #if BX_SUPPORT_CET
652 Bit64u ia32_cet_control[2]; // indexed by CPL==3
653 Bit64u ia32_pl_ssp[4];
654 Bit64u ia32_interrupt_ssp_table;
655 #endif
656
657 Bit32u ia32_spec_ctrl; // SCA
658
659 /* TODO finish of the others */
660 } bx_regs_msr_t;
661 #endif
662
663 #include "crregs.h"
664 #include "descriptor.h"
665 #include "decoder/instr.h"
666 #include "lazy_flags.h"
667 #include "tlb.h"
668 #include "icache.h"
669
670 // general purpose register
671 #if BX_SUPPORT_X86_64
672
673 #ifdef BX_BIG_ENDIAN
674 typedef struct {
675 union {
676 struct {
677 Bit32u dword_filler;
678 Bit16u word_filler;
679 union {
680 Bit16u rx;
681 struct {
682 Bit8u rh;
683 Bit8u rl;
684 } byte;
685 };
686 } word;
687 Bit64u rrx;
688 struct {
689 Bit32u hrx; // hi 32 bits
690 Bit32u erx; // lo 32 bits
691 } dword;
692 };
693 } bx_gen_reg_t;
694 #else
695 typedef struct {
696 union {
697 struct {
698 union {
699 Bit16u rx;
700 struct {
701 Bit8u rl;
702 Bit8u rh;
703 } byte;
704 };
705 Bit16u word_filler;
706 Bit32u dword_filler;
707 } word;
708 Bit64u rrx;
709 struct {
710 Bit32u erx; // lo 32 bits
711 Bit32u hrx; // hi 32 bits
712 } dword;
713 };
714 } bx_gen_reg_t;
715
716 #endif
717
718 #else // #if BX_SUPPORT_X86_64
719
720 #ifdef BX_BIG_ENDIAN
721 typedef struct {
722 union {
723 struct {
724 Bit32u erx;
725 } dword;
726 struct {
727 Bit16u word_filler;
728 union {
729 Bit16u rx;
730 struct {
731 Bit8u rh;
732 Bit8u rl;
733 } byte;
734 };
735 } word;
736 };
737 } bx_gen_reg_t;
738 #else
739 typedef struct {
740 union {
741 struct {
742 Bit32u erx;
743 } dword;
744 struct {
745 union {
746 Bit16u rx;
747 struct {
748 Bit8u rl;
749 Bit8u rh;
750 } byte;
751 };
752 Bit16u word_filler;
753 } word;
754 };
755 } bx_gen_reg_t;
756 #endif
757
758 #endif // #if BX_SUPPORT_X86_64
759
760 #if BX_SUPPORT_APIC
761 #include "apic.h"
762 #endif
763
764 #if BX_SUPPORT_FPU
765 #include "xmm.h"
766 #endif
767
768 #if BX_SUPPORT_VMX
769 #include "vmx.h"
770 #endif
771
772 #if BX_SUPPORT_SVM
773 #include "svm.h"
774 #endif
775
776 #if BX_SUPPORT_MONITOR_MWAIT
777 struct monitor_addr_t {
778
779 bx_phy_address monitor_addr;
780 bool armed;
781
monitor_addr_tmonitor_addr_t782 monitor_addr_t(): monitor_addr(0xffffffff), armed(0) {}
783
armmonitor_addr_t784 BX_CPP_INLINE void arm(bx_phy_address addr) {
785 // align to cache line
786 monitor_addr = addr & ~((bx_phy_address)(CACHE_LINE_SIZE - 1));
787 armed = 1;
788 }
789
reset_monitormonitor_addr_t790 BX_CPP_INLINE void reset_monitor(void) { armed = 0; }
791 };
792 #endif
793
794 struct BX_SMM_State;
795 struct BxOpcodeInfo_t;
796 struct bx_cpu_statistics;
797
798 #include "cpuid.h"
799
800 class BOCHSAPI BX_CPU_C : public logfunctions {
801
802 public: // for now...
803
804 unsigned bx_cpuid;
805
806 #if BX_CPU_LEVEL >= 4
807 bx_cpuid_t *cpuid;
808 #endif
809
810 Bit32u ia_extensions_bitmask[BX_ISA_EXTENSIONS_ARRAY_SIZE];
811
812 #define BX_CPUID_SUPPORT_ISA_EXTENSION(feature) \
813 (BX_CPU_THIS_PTR ia_extensions_bitmask[feature/32] & (1<<(feature%32)))
814
815 #if BX_SUPPORT_VMX
816 Bit32u vmx_extensions_bitmask;
817 #endif
818 #if BX_SUPPORT_SVM
819 Bit32u svm_extensions_bitmask;
820 #endif
821
822 #define BX_SUPPORT_VMX_EXTENSION(feature_mask) \
823 (BX_CPU_THIS_PTR vmx_extensions_bitmask & (feature_mask))
824
825 #define BX_SUPPORT_SVM_EXTENSION(feature_mask) \
826 (BX_CPU_THIS_PTR svm_extensions_bitmask & (feature_mask))
827
828 // General register set
829 // rax: accumulator
830 // rbx: base
831 // rcx: count
832 // rdx: data
833 // rbp: base pointer
834 // rsi: source index
835 // rdi: destination index
836 // esp: stack pointer
837 // r8..r15 x86-64 extended registers
838 // rip: instruction pointer
839 // ssp: shadow stack pointer
840 // tmp: temp register
841 // nil: null register
842 bx_gen_reg_t gen_reg[BX_GENERAL_REGISTERS+4];
843
844 /* 31|30|29|28| 27|26|25|24| 23|22|21|20| 19|18|17|16
845 * ==|==|=====| ==|==|==|==| ==|==|==|==| ==|==|==|==
846 * 0| 0| 0| 0| 0| 0| 0| 0| 0| 0|ID|VP| VF|AC|VM|RF
847 *
848 * 15|14|13|12| 11|10| 9| 8| 7| 6| 5| 4| 3| 2| 1| 0
849 * ==|==|=====| ==|==|==|==| ==|==|==|==| ==|==|==|==
850 * 0|NT| IOPL| OF|DF|IF|TF| SF|ZF| 0|AF| 0|PF| 1|CF
851 */
852 Bit32u eflags; // Raw 32-bit value in x86 bit position.
853
854 // lazy arithmetic flags state
855 bx_lazyflags_entry oszapc;
856
857 // so that we can back up when handling faults, exceptions, etc.
858 // we need to store the value of the instruction pointer, before
859 // each fetch/execute cycle.
860 bx_address prev_rip;
861 bx_address prev_rsp;
862 #if BX_SUPPORT_CET
863 bx_address prev_ssp;
864 #endif
865 bool speculative_rsp;
866
867 Bit64u icount;
868 Bit64u icount_last_sync;
869
870 #define BX_INHIBIT_INTERRUPTS 0x01
871 #define BX_INHIBIT_DEBUG 0x02
872
873 #define BX_INHIBIT_INTERRUPTS_BY_MOVSS \
874 (BX_INHIBIT_INTERRUPTS | BX_INHIBIT_DEBUG)
875
876 // What events to inhibit at any given time. Certain instructions
877 // inhibit interrupts, some debug exceptions and single-step traps.
878 unsigned inhibit_mask;
879 Bit64u inhibit_icount;
880
881 /* user segment register set */
882 bx_segment_reg_t sregs[6];
883
884 /* system segment registers */
885 bx_global_segment_reg_t gdtr; /* global descriptor table register */
886 bx_global_segment_reg_t idtr; /* interrupt descriptor table register */
887 bx_segment_reg_t ldtr; /* local descriptor table register */
888 bx_segment_reg_t tr; /* task register */
889
890 /* debug registers DR0-DR7 */
891 bx_address dr[4]; /* DR0-DR3 */
892 bx_dr6_t dr6;
893 bx_dr7_t dr7;
894
895 Bit32u debug_trap; // holds DR6 value (16bit) to be set
896
897 /* Control registers */
898 bx_cr0_t cr0;
899 bx_address cr2;
900 bx_address cr3;
901 #if BX_CPU_LEVEL >= 5
902 bx_cr4_t cr4;
903 Bit32u cr4_suppmask;
904
905 bx_efer_t efer;
906 Bit32u efer_suppmask;
907 #endif
908
909 #if BX_CPU_LEVEL >= 5
910 // TSC: Time Stamp Counter
911 // Instead of storing a counter and incrementing it every instruction, we
912 // remember the time in ticks that it was reset to zero. With a little
913 // algebra, we can also support setting it to something other than zero.
914 // Don't read this directly; use get_TSC and set_TSC to access the TSC.
915 Bit64s tsc_adjust;
916 #if BX_SUPPORT_VMX || BX_SUPPORT_SVM
917 Bit64s tsc_offset;
918 #endif
919 #endif
920
921 #if BX_CPU_LEVEL >= 6
922 xcr0_t xcr0;
923 Bit32u xcr0_suppmask;
924 #endif
925
926 #if BX_SUPPORT_PKEYS
927 // protection keys
928 Bit32u pkru;
929 Bit32u pkrs;
930
931 // unpacked protection keys to be tested together with accessBits from TLB
932 // the unpacked key is stored in the accessBits format:
933 // bit 5: Execute from User privilege is OK
934 // bit 4: Execute from System privilege is OK
935 // bit 3: Write from User privilege is OK
936 // bit 2: Write from System privilege is OK
937 // bit 1: Read from User privilege is OK
938 // bit 0: Read from System privilege is OK
939 // But only bits 1 and 3 are relevant, all others should be set to '1
940 // When protection key prevents all accesses to the page both bits 1 and 3 are cleared
941 // When protection key prevents writes to the page bit 1 will be set and 3 cleared
942 // When no protection keys are enabled all bits should be set for all keys
943 Bit32u rd_pkey[16];
944 Bit32u wr_pkey[16];
945 #endif
946
947 #if BX_SUPPORT_FPU
948 i387_t the_i387;
949 #endif
950
951 #if BX_CPU_LEVEL >= 6
952
953 // Vector register set
954 // vmm0-vmmN: up to 32 vector registers
955 // vtmp: temp register
956 #if BX_SUPPORT_EVEX
957 bx_zmm_reg_t vmm[BX_XMM_REGISTERS+1] BX_CPP_AlignN(64);
958 #else
959 #if BX_SUPPORT_AVX
960 bx_ymm_reg_t vmm[BX_XMM_REGISTERS+1] BX_CPP_AlignN(32);
961 #else
962 bx_xmm_reg_t vmm[BX_XMM_REGISTERS+1] BX_CPP_AlignN(16);
963 #endif
964 #endif
965
966 bx_mxcsr_t mxcsr;
967 Bit32u mxcsr_mask;
968
969 #if BX_SUPPORT_EVEX
970 bx_gen_reg_t opmask[8];
971 #endif
972
973 #endif
974
975 #if BX_SUPPORT_MONITOR_MWAIT
976 monitor_addr_t monitor;
977 #endif
978
979 #if BX_SUPPORT_APIC
980 bx_local_apic_c lapic;
981 #endif
982
983 /* SMM base register */
984 Bit32u smbase;
985
986 #if BX_CPU_LEVEL >= 5
987 bx_regs_msr_t msr;
988 #endif
989
990 #if BX_CONFIGURE_MSRS
991 MSR *msrs[BX_MSR_MAX_INDEX];
992 #endif
993
994 #if BX_SUPPORT_VMX
995 bool in_vmx;
996 bool in_vmx_guest;
997 bool in_smm_vmx; // save in_vmx and in_vmx_guest flags when in SMM mode
998 bool in_smm_vmx_guest;
999 Bit64u vmcsptr;
1000 bx_hostpageaddr_t vmcshostptr;
1001 #if BX_SUPPORT_MEMTYPE
1002 BxMemtype vmcs_memtype;
1003 #endif
1004 Bit64u vmxonptr;
1005
1006 VMCS_CACHE vmcs;
1007 VMX_CAP vmx_cap;
1008 VMCS_Mapping *vmcs_map;
1009 #endif
1010
1011 #if BX_SUPPORT_SVM
1012 bool in_svm_guest;
1013 bool svm_gif; /* global interrupt enable flag, when zero all external interrupt disabled */
1014 bx_phy_address vmcbptr;
1015 bx_hostpageaddr_t vmcbhostptr;
1016 #if BX_SUPPORT_MEMTYPE
1017 BxMemtype vmcb_memtype;
1018 #endif
1019 VMCB_CACHE vmcb;
1020
1021 // make SVM integration easier
1022 #define SVM_GIF (BX_CPU_THIS_PTR svm_gif)
1023
1024 #else
1025
1026 #define SVM_GIF (1)
1027
1028 #endif
1029
1030 #if BX_SUPPORT_VMX || BX_SUPPORT_SVM
1031 bool in_event;
1032 #endif
1033
1034 #if BX_SUPPORT_VMX
1035 bool nmi_unblocking_iret;
1036 #endif
1037
1038 bool EXT; /* 1 if processing external interrupt or exception
1039 * or if not related to current instruction,
1040 * 0 if current CS:IP caused exception */
1041
1042 enum CPU_Activity_State {
1043 BX_ACTIVITY_STATE_ACTIVE = 0,
1044 BX_ACTIVITY_STATE_HLT,
1045 BX_ACTIVITY_STATE_SHUTDOWN,
1046 BX_ACTIVITY_STATE_WAIT_FOR_SIPI,
1047 BX_ACTIVITY_STATE_MWAIT,
1048 BX_ACTIVITY_STATE_MWAIT_IF
1049 };
1050
1051 #define BX_VMX_LAST_ACTIVITY_STATE (BX_ACTIVITY_STATE_WAIT_FOR_SIPI)
1052
1053 unsigned activity_state;
1054
1055 #define BX_EVENT_NMI (1 << 0)
1056 #define BX_EVENT_SMI (1 << 1)
1057 #define BX_EVENT_INIT (1 << 2)
1058 #define BX_EVENT_CODE_BREAKPOINT_ASSIST (1 << 3)
1059 #define BX_EVENT_VMX_MONITOR_TRAP_FLAG (1 << 4)
1060 #define BX_EVENT_VMX_PREEMPTION_TIMER_EXPIRED (1 << 5)
1061 #define BX_EVENT_VMX_INTERRUPT_WINDOW_EXITING (1 << 6)
1062 #define BX_EVENT_VMX_VIRTUAL_NMI (1 << 7)
1063 #define BX_EVENT_SVM_VIRQ_PENDING (1 << 8)
1064 #define BX_EVENT_PENDING_VMX_VIRTUAL_INTR (1 << 9)
1065 #define BX_EVENT_PENDING_INTR (1 << 10)
1066 #define BX_EVENT_PENDING_LAPIC_INTR (1 << 11)
1067 #define BX_EVENT_VMX_VTPR_UPDATE (1 << 12)
1068 #define BX_EVENT_VMX_VEOI_UPDATE (1 << 13)
1069 #define BX_EVENT_VMX_VIRTUAL_APIC_WRITE (1 << 14)
1070 Bit32u pending_event;
1071 Bit32u event_mask;
1072 Bit32u async_event;
1073
signal_event(Bit32u event)1074 BX_SMF BX_CPP_INLINE void signal_event(Bit32u event) {
1075 BX_CPU_THIS_PTR pending_event |= event;
1076 if (! is_masked_event(event)) BX_CPU_THIS_PTR async_event = 1;
1077 }
1078
clear_event(Bit32u event)1079 BX_SMF BX_CPP_INLINE void clear_event(Bit32u event) {
1080 BX_CPU_THIS_PTR pending_event &= ~event;
1081 }
1082
mask_event(Bit32u event)1083 BX_SMF BX_CPP_INLINE void mask_event(Bit32u event) {
1084 BX_CPU_THIS_PTR event_mask |= event;
1085 }
unmask_event(Bit32u event)1086 BX_SMF BX_CPP_INLINE void unmask_event(Bit32u event) {
1087 BX_CPU_THIS_PTR event_mask &= ~event;
1088 if (is_pending(event)) BX_CPU_THIS_PTR async_event = 1;
1089 }
1090
is_masked_event(Bit32u event)1091 BX_SMF BX_CPP_INLINE bool is_masked_event(Bit32u event) {
1092 return (BX_CPU_THIS_PTR event_mask & event) != 0;
1093 }
1094
is_pending(Bit32u event)1095 BX_SMF BX_CPP_INLINE bool is_pending(Bit32u event) {
1096 return (BX_CPU_THIS_PTR pending_event & event) != 0;
1097 }
is_unmasked_event_pending(Bit32u event)1098 BX_SMF BX_CPP_INLINE bool is_unmasked_event_pending(Bit32u event) {
1099 return (BX_CPU_THIS_PTR pending_event & ~BX_CPU_THIS_PTR event_mask & event) != 0;
1100 }
1101
unmasked_events_pending(void)1102 BX_SMF BX_CPP_INLINE Bit32u unmasked_events_pending(void) {
1103 return (BX_CPU_THIS_PTR pending_event & ~BX_CPU_THIS_PTR event_mask);
1104 }
1105
1106 #define BX_ASYNC_EVENT_STOP_TRACE (1<<31)
1107
1108 #if BX_X86_DEBUGGER
1109 bool in_repeat;
1110 #endif
1111 bool in_smm;
1112 unsigned cpu_mode;
1113 bool user_pl;
1114 #if BX_CPU_LEVEL >= 5
1115 bool ignore_bad_msrs;
1116 #endif
1117 #if BX_CPU_LEVEL >= 6
1118 unsigned sse_ok;
1119 #if BX_SUPPORT_AVX
1120 unsigned avx_ok;
1121 #endif
1122 #if BX_SUPPORT_EVEX
1123 unsigned opmask_ok;
1124 unsigned evex_ok;
1125 #endif
1126 #endif
1127
1128 // for exceptions
1129 static jmp_buf jmp_buf_env;
1130 unsigned last_exception_type;
1131
1132 // Boundaries of current code page, based on EIP
1133 bx_address eipPageBias;
1134 Bit32u eipPageWindowSize;
1135 const Bit8u *eipFetchPtr;
1136 bx_phy_address pAddrFetchPage; // Guest physical address of current instruction page
1137
1138 // Boundaries of current stack page, based on ESP
1139 bx_address espPageBias; // Linear address of current stack page
1140 Bit32u espPageWindowSize;
1141 const Bit8u *espHostPtr;
1142 bx_phy_address pAddrStackPage; // Guest physical address of current stack page
1143 #if BX_SUPPORT_MEMTYPE
1144 BxMemtype espPageMemtype;
1145 #endif
1146 #if BX_SUPPORT_SMP == 0
1147 Bit32u espPageFineGranularityMapping;
1148 #endif
1149
1150 #if BX_CPU_LEVEL >= 4 && BX_SUPPORT_ALIGNMENT_CHECK
1151 unsigned alignment_check_mask;
1152 #endif
1153
1154 // statistics
1155 bx_cpu_statistics *stats;
1156
1157 #if BX_DEBUGGER
1158 bx_phy_address watchpoint;
1159 Bit8u break_point;
1160 Bit8u magic_break;
1161 Bit8u stop_reason;
1162 bool trace;
1163 bool trace_reg;
1164 bool trace_mem;
1165 bool mode_break;
1166 #if BX_SUPPORT_VMX || BX_SUPPORT_SVM
1167 bool vmexit_break;
1168 #endif
1169 unsigned show_flag;
1170 bx_guard_found_t guard_found;
1171 #endif
1172
1173 #if BX_INSTRUMENTATION
1174 // store far branch CS:EIP pair for instrumentation purposes
1175 // unfortunatelly prev_rip CPU field cannot be used as is because it
1176 // could be overwritten by task switch which could happen as result
1177 // of the far branch
1178 struct {
1179 Bit16u prev_cs;
1180 bx_address prev_rip;
1181 } far_branch;
1182
1183 #define FAR_BRANCH_PREV_CS (BX_CPU_THIS_PTR far_branch.prev_cs)
1184 #define FAR_BRANCH_PREV_RIP (BX_CPU_THIS_PTR far_branch.prev_rip)
1185
1186 #define BX_INSTR_FAR_BRANCH_ORIGIN() { \
1187 BX_CPU_THIS_PTR far_branch.prev_cs = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value; \
1188 BX_CPU_THIS_PTR far_branch.prev_rip = PREV_RIP; \
1189 }
1190
1191 #else
1192 #define BX_INSTR_FAR_BRANCH_ORIGIN()
1193 #endif
1194
1195 #define BX_DTLB_SIZE 2048
1196 #define BX_ITLB_SIZE 1024
1197 TLB<BX_DTLB_SIZE> DTLB BX_CPP_AlignN(32);
1198 TLB<BX_ITLB_SIZE> ITLB BX_CPP_AlignN(32);
1199
1200 #if BX_CPU_LEVEL >= 6
1201 struct {
1202 Bit64u entry[4];
1203 } PDPTR_CACHE;
1204 #endif
1205
1206 // An instruction cache. Each entry should be exactly 32 bytes, and
1207 // this structure should be aligned on a 32-byte boundary to be friendly
1208 // with the host cache lines.
1209 bxICache_c iCache BX_CPP_AlignN(32);
1210 Bit32u fetchModeMask;
1211
1212 struct {
1213 bx_address rm_addr; // The address offset after resolution
1214 bx_phy_address paddress1; // physical address after translation of 1st len1 bytes of data
1215 bx_phy_address paddress2; // physical address after translation of 2nd len2 bytes of data
1216 Bit32u len1; // Number of bytes in page 1
1217 Bit32u len2; // Number of bytes in page 2
1218 bx_ptr_equiv_t pages; // Number of pages access spans (1 or 2). Also used
1219 // for the case when a native host pointer is
1220 // available for the R-M-W instructions. The host
1221 // pointer is stuffed here. Since this field has
1222 // to be checked anyways (and thus cached), if it
1223 // is greated than 2 (the maximum possible for
1224 // normal cases) it is a native pointer and is used
1225 // for a direct write access.
1226 #if BX_SUPPORT_MEMTYPE
1227 BxMemtype memtype1; // memory type of the page 1
1228 BxMemtype memtype2; // memory type of the page 2
1229 #endif
1230 } address_xlation;
1231
1232 BX_SMF void setEFlags(Bit32u val) BX_CPP_AttrRegparmN(1);
1233
setEFlagsOSZAPC(Bit32u flags32)1234 BX_SMF BX_CPP_INLINE void setEFlagsOSZAPC(Bit32u flags32) {
1235 set_OF(1 & ((flags32) >> 11));
1236 set_SF(1 & ((flags32) >> 7));
1237 set_ZF(1 & ((flags32) >> 6));
1238 set_AF(1 & ((flags32) >> 4));
1239 set_PF(1 & ((flags32) >> 2));
1240 set_CF(1 & ((flags32) >> 0));
1241 }
1242
clearEFlagsOSZAPC(void)1243 BX_SMF BX_CPP_INLINE void clearEFlagsOSZAPC(void) {
1244 SET_FLAGS_OSZAPC_LOGIC_32(1);
1245 }
1246
getB_OF(void)1247 BX_SMF BX_CPP_INLINE unsigned getB_OF(void) { return BX_CPU_THIS_PTR oszapc.getB_OF(); }
get_OF(void)1248 BX_SMF BX_CPP_INLINE unsigned get_OF(void) { return BX_CPU_THIS_PTR oszapc.get_OF(); }
set_OF(bool val)1249 BX_SMF BX_CPP_INLINE void set_OF(bool val) { BX_CPU_THIS_PTR oszapc.set_OF(val); }
clear_OF(void)1250 BX_SMF BX_CPP_INLINE void clear_OF(void) { BX_CPU_THIS_PTR oszapc.clear_OF(); }
assert_OF(void)1251 BX_SMF BX_CPP_INLINE void assert_OF(void) { BX_CPU_THIS_PTR oszapc.assert_OF(); }
1252
getB_SF(void)1253 BX_SMF BX_CPP_INLINE unsigned getB_SF(void) { return BX_CPU_THIS_PTR oszapc.getB_SF(); }
get_SF(void)1254 BX_SMF BX_CPP_INLINE unsigned get_SF(void) { return BX_CPU_THIS_PTR oszapc.get_SF(); }
set_SF(bool val)1255 BX_SMF BX_CPP_INLINE void set_SF(bool val) { BX_CPU_THIS_PTR oszapc.set_SF(val); }
clear_SF(void)1256 BX_SMF BX_CPP_INLINE void clear_SF(void) { BX_CPU_THIS_PTR oszapc.clear_SF(); }
assert_SF(void)1257 BX_SMF BX_CPP_INLINE void assert_SF(void) { BX_CPU_THIS_PTR oszapc.assert_SF(); }
1258
getB_ZF(void)1259 BX_SMF BX_CPP_INLINE unsigned getB_ZF(void) { return BX_CPU_THIS_PTR oszapc.getB_ZF(); }
get_ZF(void)1260 BX_SMF BX_CPP_INLINE unsigned get_ZF(void) { return BX_CPU_THIS_PTR oszapc.get_ZF(); }
set_ZF(bool val)1261 BX_SMF BX_CPP_INLINE void set_ZF(bool val) { BX_CPU_THIS_PTR oszapc.set_ZF(val); }
clear_ZF(void)1262 BX_SMF BX_CPP_INLINE void clear_ZF(void) { BX_CPU_THIS_PTR oszapc.clear_ZF(); }
assert_ZF(void)1263 BX_SMF BX_CPP_INLINE void assert_ZF(void) { BX_CPU_THIS_PTR oszapc.assert_ZF(); }
1264
getB_AF(void)1265 BX_SMF BX_CPP_INLINE unsigned getB_AF(void) { return BX_CPU_THIS_PTR oszapc.getB_AF(); }
get_AF(void)1266 BX_SMF BX_CPP_INLINE unsigned get_AF(void) { return BX_CPU_THIS_PTR oszapc.get_AF(); }
set_AF(bool val)1267 BX_SMF BX_CPP_INLINE void set_AF(bool val) { BX_CPU_THIS_PTR oszapc.set_AF(val); }
clear_AF(void)1268 BX_SMF BX_CPP_INLINE void clear_AF(void) { BX_CPU_THIS_PTR oszapc.clear_AF(); }
assert_AF(void)1269 BX_SMF BX_CPP_INLINE void assert_AF(void) { BX_CPU_THIS_PTR oszapc.assert_AF(); }
1270
getB_PF(void)1271 BX_SMF BX_CPP_INLINE unsigned getB_PF(void) { return BX_CPU_THIS_PTR oszapc.getB_PF(); }
get_PF(void)1272 BX_SMF BX_CPP_INLINE unsigned get_PF(void) { return BX_CPU_THIS_PTR oszapc.get_PF(); }
set_PF(bool val)1273 BX_SMF BX_CPP_INLINE void set_PF(bool val) { BX_CPU_THIS_PTR oszapc.set_PF(val); }
clear_PF(void)1274 BX_SMF BX_CPP_INLINE void clear_PF(void) { BX_CPU_THIS_PTR oszapc.clear_PF(); }
assert_PF(void)1275 BX_SMF BX_CPP_INLINE void assert_PF(void) { BX_CPU_THIS_PTR oszapc.assert_PF(); }
1276
getB_CF(void)1277 BX_SMF BX_CPP_INLINE unsigned getB_CF(void) { return BX_CPU_THIS_PTR oszapc.getB_CF(); }
get_CF(void)1278 BX_SMF BX_CPP_INLINE unsigned get_CF(void) { return BX_CPU_THIS_PTR oszapc.get_CF(); }
set_CF(bool val)1279 BX_SMF BX_CPP_INLINE void set_CF(bool val) { BX_CPU_THIS_PTR oszapc.set_CF(val); }
clear_CF(void)1280 BX_SMF BX_CPP_INLINE void clear_CF(void) { BX_CPU_THIS_PTR oszapc.clear_CF(); }
assert_CF(void)1281 BX_SMF BX_CPP_INLINE void assert_CF(void) { BX_CPU_THIS_PTR oszapc.assert_CF(); }
1282
1283 // constructors & destructors...
1284 BX_CPU_C(unsigned id = 0);
1285 ~BX_CPU_C();
1286
1287 void initialize(void);
1288 void init_statistics(void);
1289 void after_restore_state(void);
1290 void register_state(void);
1291 static Bit64s param_save_handler(void *devptr, bx_param_c *param);
1292 static void param_restore_handler(void *devptr, bx_param_c *param, Bit64s val);
1293 #if !BX_USE_CPU_SMF
1294 Bit64s param_save(bx_param_c *param);
1295 void param_restore(bx_param_c *param, Bit64s val);
1296 #endif
1297
1298 // <TAG-CLASS-CPU-START>
1299 // prototypes for CPU instructions...
1300 BX_SMF void PUSH16_Sw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1301 BX_SMF void POP16_Sw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1302 BX_SMF void PUSH32_Sw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1303 BX_SMF void POP32_Sw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1304
1305 BX_SMF void DAA(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1306 BX_SMF void DAS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1307 BX_SMF void AAA(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1308 BX_SMF void AAS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1309 BX_SMF void AAM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1310 BX_SMF void AAD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1311
1312 BX_SMF void PUSHA32(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1313 BX_SMF void PUSHA16(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1314 BX_SMF void POPA32(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1315 BX_SMF void POPA16(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1316 BX_SMF void ARPL_EwGw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1317 BX_SMF void PUSH_Id(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1318 BX_SMF void PUSH_Iw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1319
1320 BX_SMF void INSB32_YbDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1321 BX_SMF void INSB16_YbDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1322 BX_SMF void INSW32_YwDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1323 BX_SMF void INSW16_YwDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1324 BX_SMF void INSD32_YdDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1325 BX_SMF void INSD16_YdDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1326 BX_SMF void OUTSB32_DXXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1327 BX_SMF void OUTSB16_DXXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1328 BX_SMF void OUTSW32_DXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1329 BX_SMF void OUTSW16_DXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1330 BX_SMF void OUTSD32_DXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1331 BX_SMF void OUTSD16_DXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1332
1333 BX_SMF void REP_INSB_YbDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1334 BX_SMF void REP_INSW_YwDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1335 BX_SMF void REP_INSD_YdDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1336 BX_SMF void REP_OUTSB_DXXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1337 BX_SMF void REP_OUTSW_DXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1338 BX_SMF void REP_OUTSD_DXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1339
1340 BX_SMF void BOUND_GwMa(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1341 BX_SMF void BOUND_GdMa(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1342
1343 BX_SMF void TEST_EbGbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1344 BX_SMF void TEST_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1345 BX_SMF void TEST_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1346
1347 BX_SMF void TEST_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1348 BX_SMF void TEST_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1349 BX_SMF void TEST_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1350
1351 BX_SMF void XCHG_EbGbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1352 BX_SMF void XCHG_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1353 BX_SMF void XCHG_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1354
1355 BX_SMF void XCHG_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1356 BX_SMF void XCHG_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1357 BX_SMF void XCHG_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1358
1359 BX_SMF void MOV_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1360 BX_SMF void MOV_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1361 BX_SMF void MOV_GbEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1362 BX_SMF void MOV_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1363 BX_SMF void MOV_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1364 BX_SMF void MOV_GwEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1365 BX_SMF void MOV_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1366
1367 BX_SMF void MOV32_GdEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1368 BX_SMF void MOV32_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1369
1370 BX_SMF void MOV32S_GdEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1371 BX_SMF void MOV32S_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1372
1373 BX_SMF void MOV_EwSwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1374 BX_SMF void MOV_EwSwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1375 BX_SMF void MOV_SwEw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1376
1377 BX_SMF void LEA_GdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1378 BX_SMF void LEA_GwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1379
1380 BX_SMF void CBW(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1381 BX_SMF void CWD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1382 BX_SMF void CALL32_Ap(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1383 BX_SMF void CALL16_Ap(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1384 BX_SMF void PUSHF_Fw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1385 BX_SMF void POPF_Fw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1386 BX_SMF void PUSHF_Fd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1387 BX_SMF void POPF_Fd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1388 BX_SMF void SAHF(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1389 BX_SMF void LAHF(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1390
1391 BX_SMF void MOV_ALOd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1392 BX_SMF void MOV_EAXOd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1393 BX_SMF void MOV_AXOd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1394 BX_SMF void MOV_OdAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1395 BX_SMF void MOV_OdEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1396 BX_SMF void MOV_OdAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1397
1398 // repeatable instructions
1399 BX_SMF void REP_MOVSB_YbXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1400 BX_SMF void REP_MOVSW_YwXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1401 BX_SMF void REP_MOVSD_YdXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1402 BX_SMF void REP_CMPSB_XbYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1403 BX_SMF void REP_CMPSW_XwYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1404 BX_SMF void REP_CMPSD_XdYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1405 BX_SMF void REP_STOSB_YbAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1406 BX_SMF void REP_LODSB_ALXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1407 BX_SMF void REP_SCASB_ALYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1408 BX_SMF void REP_STOSW_YwAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1409 BX_SMF void REP_LODSW_AXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1410 BX_SMF void REP_SCASW_AXYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1411 BX_SMF void REP_STOSD_YdEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1412 BX_SMF void REP_LODSD_EAXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1413 BX_SMF void REP_SCASD_EAXYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1414
1415 // qualified by address size
1416 BX_SMF void CMPSB16_XbYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1417 BX_SMF void CMPSW16_XwYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1418 BX_SMF void CMPSD16_XdYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1419 BX_SMF void CMPSB32_XbYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1420 BX_SMF void CMPSW32_XwYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1421 BX_SMF void CMPSD32_XdYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1422
1423 BX_SMF void SCASB16_ALYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1424 BX_SMF void SCASW16_AXYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1425 BX_SMF void SCASD16_EAXYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1426 BX_SMF void SCASB32_ALYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1427 BX_SMF void SCASW32_AXYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1428 BX_SMF void SCASD32_EAXYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1429
1430 BX_SMF void LODSB16_ALXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1431 BX_SMF void LODSW16_AXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1432 BX_SMF void LODSD16_EAXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1433 BX_SMF void LODSB32_ALXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1434 BX_SMF void LODSW32_AXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1435 BX_SMF void LODSD32_EAXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1436
1437 BX_SMF void STOSB16_YbAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1438 BX_SMF void STOSW16_YwAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1439 BX_SMF void STOSD16_YdEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1440 BX_SMF void STOSB32_YbAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1441 BX_SMF void STOSW32_YwAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1442 BX_SMF void STOSD32_YdEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1443
1444 BX_SMF void MOVSB16_YbXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1445 BX_SMF void MOVSW16_YwXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1446 BX_SMF void MOVSD16_YdXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1447 BX_SMF void MOVSB32_YbXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1448 BX_SMF void MOVSW32_YwXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1449 BX_SMF void MOVSD32_YdXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1450
1451 BX_SMF void MOV_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1452 BX_SMF void MOV_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1453 BX_SMF void MOV_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1454
1455 BX_SMF void ENTER16_IwIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1456 BX_SMF void ENTER32_IwIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1457 BX_SMF void LEAVE16(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1458 BX_SMF void LEAVE32(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1459
1460 BX_SMF void INT1(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1461 BX_SMF void INT3(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1462 BX_SMF void INT_Ib(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1463 BX_SMF void INTO(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1464 BX_SMF void IRET32(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1465 BX_SMF void IRET16(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1466
1467 BX_SMF void SALC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1468 BX_SMF void XLAT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1469
1470 BX_SMF void LOOPNE16_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1471 BX_SMF void LOOPE16_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1472 BX_SMF void LOOP16_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1473 BX_SMF void LOOPNE32_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1474 BX_SMF void LOOPE32_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1475 BX_SMF void LOOP32_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1476 BX_SMF void JCXZ_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1477 BX_SMF void JECXZ_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1478 BX_SMF void IN_ALIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1479 BX_SMF void IN_AXIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1480 BX_SMF void IN_EAXIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1481 BX_SMF void OUT_IbAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1482 BX_SMF void OUT_IbAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1483 BX_SMF void OUT_IbEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1484 BX_SMF void CALL_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1485 BX_SMF void CALL_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1486 BX_SMF void JMP_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1487 BX_SMF void JMP_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1488 BX_SMF void JMP_Ap(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1489 BX_SMF void IN_ALDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1490 BX_SMF void IN_AXDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1491 BX_SMF void IN_EAXDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1492 BX_SMF void OUT_DXAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1493 BX_SMF void OUT_DXAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1494 BX_SMF void OUT_DXEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1495
1496 BX_SMF void HLT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1497 BX_SMF void CMC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1498 BX_SMF void CLC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1499 BX_SMF void STC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1500 BX_SMF void CLI(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1501 BX_SMF void STI(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1502 BX_SMF void CLD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1503 BX_SMF void STD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1504
1505 BX_SMF void LAR_GvEw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1506 BX_SMF void LSL_GvEw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1507 BX_SMF void CLTS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1508 BX_SMF void INVD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1509 BX_SMF void WBINVD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1510 BX_SMF void CLFLUSH(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1511 BX_SMF void CLZERO(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1512
1513 BX_SMF void MOV_CR0Rd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1514 BX_SMF void MOV_CR2Rd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1515 BX_SMF void MOV_CR3Rd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1516 BX_SMF void MOV_CR4Rd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1517 BX_SMF void MOV_RdCR0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1518 BX_SMF void MOV_RdCR2(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1519 BX_SMF void MOV_RdCR3(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1520 BX_SMF void MOV_RdCR4(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1521 BX_SMF void MOV_DdRd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1522 BX_SMF void MOV_RdDd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1523
1524 BX_SMF void JO_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1525 BX_SMF void JNO_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1526 BX_SMF void JB_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1527 BX_SMF void JNB_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1528 BX_SMF void JZ_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1529 BX_SMF void JNZ_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1530 BX_SMF void JBE_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1531 BX_SMF void JNBE_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1532 BX_SMF void JS_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1533 BX_SMF void JNS_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1534 BX_SMF void JP_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1535 BX_SMF void JNP_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1536 BX_SMF void JL_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1537 BX_SMF void JNL_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1538 BX_SMF void JLE_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1539 BX_SMF void JNLE_Jw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1540
1541 BX_SMF void JO_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1542 BX_SMF void JNO_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1543 BX_SMF void JB_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1544 BX_SMF void JNB_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1545 BX_SMF void JZ_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1546 BX_SMF void JNZ_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1547 BX_SMF void JBE_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1548 BX_SMF void JNBE_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1549 BX_SMF void JS_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1550 BX_SMF void JNS_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1551 BX_SMF void JP_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1552 BX_SMF void JNP_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1553 BX_SMF void JL_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1554 BX_SMF void JNL_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1555 BX_SMF void JLE_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1556 BX_SMF void JNLE_Jd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1557
1558 BX_SMF void SETO_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1559 BX_SMF void SETNO_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1560 BX_SMF void SETB_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1561 BX_SMF void SETNB_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1562 BX_SMF void SETZ_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1563 BX_SMF void SETNZ_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1564 BX_SMF void SETBE_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1565 BX_SMF void SETNBE_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1566 BX_SMF void SETS_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1567 BX_SMF void SETNS_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1568 BX_SMF void SETP_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1569 BX_SMF void SETNP_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1570 BX_SMF void SETL_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1571 BX_SMF void SETNL_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1572 BX_SMF void SETLE_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1573 BX_SMF void SETNLE_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1574
1575 BX_SMF void SETO_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1576 BX_SMF void SETNO_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1577 BX_SMF void SETB_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1578 BX_SMF void SETNB_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1579 BX_SMF void SETZ_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1580 BX_SMF void SETNZ_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1581 BX_SMF void SETBE_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1582 BX_SMF void SETNBE_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1583 BX_SMF void SETS_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1584 BX_SMF void SETNS_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1585 BX_SMF void SETP_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1586 BX_SMF void SETNP_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1587 BX_SMF void SETL_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1588 BX_SMF void SETNL_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1589 BX_SMF void SETLE_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1590 BX_SMF void SETNLE_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1591
1592 BX_SMF void CPUID(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1593
1594 BX_SMF void SHRD_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1595 BX_SMF void SHRD_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1596 BX_SMF void SHLD_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1597 BX_SMF void SHLD_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1598 BX_SMF void SHRD_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1599 BX_SMF void SHRD_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1600 BX_SMF void SHLD_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1601 BX_SMF void SHLD_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1602
1603 BX_SMF void BSF_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1604 BX_SMF void BSF_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1605 BX_SMF void BSR_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1606 BX_SMF void BSR_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1607
1608 BX_SMF void BT_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1609 BX_SMF void BT_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1610 BX_SMF void BTS_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1611 BX_SMF void BTS_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1612 BX_SMF void BTR_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1613 BX_SMF void BTR_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1614 BX_SMF void BTC_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1615 BX_SMF void BTC_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1616
1617 BX_SMF void BT_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1618 BX_SMF void BT_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1619 BX_SMF void BTS_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1620 BX_SMF void BTS_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1621 BX_SMF void BTR_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1622 BX_SMF void BTR_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1623 BX_SMF void BTC_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1624 BX_SMF void BTC_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1625
1626 BX_SMF void BT_EwIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1627 BX_SMF void BT_EdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1628 BX_SMF void BTS_EwIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1629 BX_SMF void BTS_EdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1630 BX_SMF void BTR_EwIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1631 BX_SMF void BTR_EdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1632 BX_SMF void BTC_EwIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1633 BX_SMF void BTC_EdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1634
1635 BX_SMF void BT_EwIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1636 BX_SMF void BT_EdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1637 BX_SMF void BTS_EwIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1638 BX_SMF void BTS_EdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1639 BX_SMF void BTR_EwIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1640 BX_SMF void BTR_EdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1641 BX_SMF void BTC_EwIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1642 BX_SMF void BTC_EdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1643
1644 BX_SMF void LES_GwMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1645 BX_SMF void LDS_GwMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1646 BX_SMF void LSS_GwMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1647 BX_SMF void LFS_GwMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1648 BX_SMF void LGS_GwMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1649 BX_SMF void LES_GdMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1650 BX_SMF void LDS_GdMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1651 BX_SMF void LSS_GdMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1652 BX_SMF void LFS_GdMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1653 BX_SMF void LGS_GdMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1654
1655 BX_SMF void MOVZX_GwEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1656 BX_SMF void MOVZX_GdEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1657 BX_SMF void MOVZX_GdEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1658 BX_SMF void MOVSX_GwEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1659 BX_SMF void MOVSX_GdEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1660 BX_SMF void MOVSX_GdEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1661
1662 BX_SMF void MOVZX_GwEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1663 BX_SMF void MOVZX_GdEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1664 BX_SMF void MOVZX_GdEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1665 BX_SMF void MOVSX_GwEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1666 BX_SMF void MOVSX_GdEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1667 BX_SMF void MOVSX_GdEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1668
1669 BX_SMF void BSWAP_RX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1670 BX_SMF void BSWAP_ERX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1671
1672 BX_SMF void ZERO_IDIOM_GwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1673 BX_SMF void ZERO_IDIOM_GdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1674
1675 BX_SMF void ADD_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1676 BX_SMF void OR_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1677 BX_SMF void ADC_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1678 BX_SMF void SBB_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1679 BX_SMF void AND_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1680 BX_SMF void SUB_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1681 BX_SMF void XOR_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1682 BX_SMF void CMP_GbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1683
1684 BX_SMF void ADD_GbEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1685 BX_SMF void OR_GbEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1686 BX_SMF void ADC_GbEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1687 BX_SMF void SBB_GbEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1688 BX_SMF void AND_GbEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1689 BX_SMF void SUB_GbEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1690 BX_SMF void XOR_GbEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1691 BX_SMF void CMP_GbEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1692
1693 BX_SMF void ADD_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1694 BX_SMF void OR_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1695 BX_SMF void ADC_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1696 BX_SMF void SBB_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1697 BX_SMF void AND_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1698 BX_SMF void SUB_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1699 BX_SMF void XOR_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1700 BX_SMF void CMP_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1701
1702 BX_SMF void ADD_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1703 BX_SMF void OR_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1704 BX_SMF void ADC_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1705 BX_SMF void SBB_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1706 BX_SMF void AND_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1707 BX_SMF void SUB_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1708 BX_SMF void XOR_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1709 BX_SMF void CMP_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1710
1711 BX_SMF void ADD_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1712 BX_SMF void OR_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1713 BX_SMF void ADC_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1714 BX_SMF void SBB_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1715 BX_SMF void AND_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1716 BX_SMF void SUB_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1717 BX_SMF void XOR_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1718 BX_SMF void CMP_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1719
1720 BX_SMF void ADD_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1721 BX_SMF void OR_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1722 BX_SMF void ADC_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1723 BX_SMF void SBB_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1724 BX_SMF void AND_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1725 BX_SMF void SUB_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1726 BX_SMF void XOR_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1727 BX_SMF void CMP_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1728
1729 BX_SMF void ADD_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1730 BX_SMF void OR_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1731 BX_SMF void ADC_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1732 BX_SMF void SBB_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1733 BX_SMF void AND_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1734 BX_SMF void SUB_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1735 BX_SMF void XOR_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1736 BX_SMF void CMP_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1737
1738 BX_SMF void ADD_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1739 BX_SMF void OR_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1740 BX_SMF void ADC_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1741 BX_SMF void SBB_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1742 BX_SMF void AND_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1743 BX_SMF void SUB_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1744 BX_SMF void XOR_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1745 BX_SMF void CMP_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1746
1747 BX_SMF void ADD_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1748 BX_SMF void OR_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1749 BX_SMF void ADC_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1750 BX_SMF void SBB_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1751 BX_SMF void AND_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1752 BX_SMF void SUB_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1753 BX_SMF void XOR_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1754 BX_SMF void CMP_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1755
1756 BX_SMF void ADD_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1757 BX_SMF void OR_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1758 BX_SMF void ADC_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1759 BX_SMF void SBB_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1760 BX_SMF void AND_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1761 BX_SMF void SUB_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1762 BX_SMF void XOR_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1763 BX_SMF void CMP_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1764
1765 BX_SMF void ADD_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1766 BX_SMF void OR_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1767 BX_SMF void ADC_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1768 BX_SMF void SBB_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1769 BX_SMF void AND_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1770 BX_SMF void SUB_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1771 BX_SMF void XOR_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1772 BX_SMF void CMP_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1773
1774 BX_SMF void ADD_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1775 BX_SMF void OR_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1776 BX_SMF void ADC_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1777 BX_SMF void SBB_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1778 BX_SMF void AND_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1779 BX_SMF void SUB_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1780 BX_SMF void XOR_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1781 BX_SMF void CMP_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1782
1783 BX_SMF void ADD_GwEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1784 BX_SMF void OR_GwEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1785 BX_SMF void ADC_GwEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1786 BX_SMF void SBB_GwEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1787 BX_SMF void AND_GwEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1788 BX_SMF void SUB_GwEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1789 BX_SMF void XOR_GwEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1790 BX_SMF void CMP_GwEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1791
1792 BX_SMF void ADD_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1793 BX_SMF void OR_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1794 BX_SMF void ADC_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1795 BX_SMF void SBB_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1796 BX_SMF void AND_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1797 BX_SMF void SUB_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1798 BX_SMF void CMP_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1799 BX_SMF void XOR_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1800
1801 BX_SMF void ADD_GdEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1802 BX_SMF void OR_GdEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1803 BX_SMF void ADC_GdEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1804 BX_SMF void SBB_GdEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1805 BX_SMF void AND_GdEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1806 BX_SMF void SUB_GdEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1807 BX_SMF void CMP_GdEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1808 BX_SMF void XOR_GdEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1809
1810 BX_SMF void NOT_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1811 BX_SMF void NOT_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1812 BX_SMF void NOT_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1813
1814 BX_SMF void NOT_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1815 BX_SMF void NOT_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1816 BX_SMF void NOT_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1817
1818 BX_SMF void NEG_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1819 BX_SMF void NEG_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1820 BX_SMF void NEG_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1821
1822 BX_SMF void NEG_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1823 BX_SMF void NEG_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1824 BX_SMF void NEG_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1825
1826 BX_SMF void ROL_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1827 BX_SMF void ROR_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1828 BX_SMF void RCL_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1829 BX_SMF void RCR_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1830 BX_SMF void SHL_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1831 BX_SMF void SHR_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1832 BX_SMF void SAR_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1833
1834 BX_SMF void ROL_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1835 BX_SMF void ROR_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1836 BX_SMF void RCL_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1837 BX_SMF void RCR_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1838 BX_SMF void SHL_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1839 BX_SMF void SHR_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1840 BX_SMF void SAR_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1841
1842 BX_SMF void ROL_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1843 BX_SMF void ROR_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1844 BX_SMF void RCL_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1845 BX_SMF void RCR_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1846 BX_SMF void SHL_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1847 BX_SMF void SHR_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1848 BX_SMF void SAR_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1849
1850 BX_SMF void ROL_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1851 BX_SMF void ROR_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1852 BX_SMF void RCL_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1853 BX_SMF void RCR_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1854 BX_SMF void SHL_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1855 BX_SMF void SHR_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1856 BX_SMF void SAR_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1857
1858 BX_SMF void ROL_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1859 BX_SMF void ROR_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1860 BX_SMF void RCL_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1861 BX_SMF void RCR_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1862 BX_SMF void SHL_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1863 BX_SMF void SHR_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1864 BX_SMF void SAR_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1865
1866 BX_SMF void ROL_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1867 BX_SMF void ROR_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1868 BX_SMF void RCL_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1869 BX_SMF void RCR_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1870 BX_SMF void SHL_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1871 BX_SMF void SHR_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1872 BX_SMF void SAR_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1873
1874 BX_SMF void TEST_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1875 BX_SMF void TEST_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1876 BX_SMF void TEST_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1877
1878 BX_SMF void TEST_EbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1879 BX_SMF void TEST_EwIwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1880 BX_SMF void TEST_EdIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1881
1882 BX_SMF void IMUL_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1883 BX_SMF void IMUL_GdEdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1884
1885 BX_SMF void MUL_ALEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1886 BX_SMF void IMUL_ALEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1887 BX_SMF void DIV_ALEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1888 BX_SMF void IDIV_ALEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1889
1890 BX_SMF void MUL_EAXEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1891 BX_SMF void IMUL_EAXEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1892 BX_SMF void DIV_EAXEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1893 BX_SMF void IDIV_EAXEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1894
1895 BX_SMF void INC_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1896 BX_SMF void INC_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1897 BX_SMF void INC_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1898 BX_SMF void DEC_EbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1899 BX_SMF void DEC_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1900 BX_SMF void DEC_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1901
1902 BX_SMF void INC_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1903 BX_SMF void INC_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1904 BX_SMF void INC_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1905 BX_SMF void DEC_EbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1906 BX_SMF void DEC_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1907 BX_SMF void DEC_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1908
1909 BX_SMF void CALL_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1910 BX_SMF void CALL_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1911
1912 BX_SMF void CALL32_Ep(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1913 BX_SMF void CALL16_Ep(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1914 BX_SMF void JMP32_Ep(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1915 BX_SMF void JMP16_Ep(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1916
1917 BX_SMF void JMP_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1918 BX_SMF void JMP_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1919
1920 BX_SMF void SLDT_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1921 BX_SMF void STR_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1922 BX_SMF void LLDT_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1923 BX_SMF void LTR_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1924 BX_SMF void VERR_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1925 BX_SMF void VERW_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1926
1927 BX_SMF void SGDT_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1928 BX_SMF void SIDT_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1929 BX_SMF void LGDT_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1930 BX_SMF void LIDT_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1931 BX_SMF void SMSW_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1932 BX_SMF void SMSW_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1933 BX_SMF void LMSW_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1934
1935 // LOAD methods
1936 BX_SMF void LOAD_Eb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1937 BX_SMF void LOAD_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1938 BX_SMF void LOAD_Ed(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1939 #if BX_SUPPORT_X86_64
1940 BX_SMF void LOAD_Eq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1941 #endif
1942 BX_SMF void LOADU_Wdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1943 BX_SMF void LOAD_Wdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1944 BX_SMF void LOAD_Wss(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1945 BX_SMF void LOAD_Wsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1946 BX_SMF void LOAD_Ww(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1947 BX_SMF void LOAD_Wb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1948 #if BX_SUPPORT_AVX
1949 BX_SMF void LOAD_Vector(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1950 BX_SMF void LOAD_Half_Vector(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1951 BX_SMF void LOAD_Quarter_Vector(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1952 BX_SMF void LOAD_Eighth_Vector(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1953 #endif
1954 #if BX_SUPPORT_EVEX
1955 BX_SMF void LOAD_MASK_Wss(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
1956 BX_SMF void LOAD_MASK_Wsd(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
1957 BX_SMF void LOAD_MASK_VectorB(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1958 BX_SMF void LOAD_MASK_VectorW(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1959 BX_SMF void LOAD_MASK_VectorD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1960 BX_SMF void LOAD_MASK_VectorQ(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1961 BX_SMF void LOAD_BROADCAST_VectorD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1962 BX_SMF void LOAD_BROADCAST_MASK_VectorD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1963 BX_SMF void LOAD_BROADCAST_VectorQ(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1964 BX_SMF void LOAD_BROADCAST_MASK_VectorQ(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1965 BX_SMF void LOAD_BROADCAST_Half_VectorD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1966 BX_SMF void LOAD_BROADCAST_MASK_Half_VectorD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1967 #endif
1968
1969 #if BX_SUPPORT_FPU == 0 // if FPU is disabled
1970 BX_SMF void FPU_ESC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1971 #endif
1972
1973 BX_SMF void FWAIT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1974
1975 #if BX_SUPPORT_FPU
1976 // load/store
1977 BX_SMF void FLD_STi(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1978 BX_SMF void FLD_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1979 BX_SMF void FLD_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1980 BX_SMF void FLD_EXTENDED_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1981 BX_SMF void FILD_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1982 BX_SMF void FILD_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1983 BX_SMF void FILD_QWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1984 BX_SMF void FBLD_PACKED_BCD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1985
1986 BX_SMF void FST_STi(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1987 BX_SMF void FST_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1988 BX_SMF void FST_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1989 BX_SMF void FSTP_EXTENDED_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1990 BX_SMF void FIST_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1991 BX_SMF void FIST_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1992 BX_SMF void FISTP_QWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1993 BX_SMF void FBSTP_PACKED_BCD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1994
1995 BX_SMF void FISTTP16(bxInstruction_c *) BX_CPP_AttrRegparmN(1); // SSE3
1996 BX_SMF void FISTTP32(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1997 BX_SMF void FISTTP64(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
1998
1999 // control
2000 BX_SMF void FNINIT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2001 BX_SMF void FNCLEX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2002
2003 BX_SMF void FRSTOR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2004 BX_SMF void FNSAVE(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2005 BX_SMF void FLDENV(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2006 BX_SMF void FNSTENV(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2007
2008 BX_SMF void FLDCW(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2009 BX_SMF void FNSTCW(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2010 BX_SMF void FNSTSW(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2011 BX_SMF void FNSTSW_AX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2012
2013 // const
2014 BX_SMF void FLD1(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2015 BX_SMF void FLDL2T(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2016 BX_SMF void FLDL2E(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2017 BX_SMF void FLDPI(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2018 BX_SMF void FLDLG2(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2019 BX_SMF void FLDLN2(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2020 BX_SMF void FLDZ(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2021
2022 // add
2023 BX_SMF void FADD_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2024 BX_SMF void FADD_STi_ST0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2025 BX_SMF void FADD_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2026 BX_SMF void FADD_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2027 BX_SMF void FIADD_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2028 BX_SMF void FIADD_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2029
2030 // mul
2031 BX_SMF void FMUL_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2032 BX_SMF void FMUL_STi_ST0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2033 BX_SMF void FMUL_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2034 BX_SMF void FMUL_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2035 BX_SMF void FIMUL_WORD_INTEGER (bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2036 BX_SMF void FIMUL_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2037
2038 // sub
2039 BX_SMF void FSUB_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2040 BX_SMF void FSUBR_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2041 BX_SMF void FSUB_STi_ST0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2042 BX_SMF void FSUBR_STi_ST0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2043 BX_SMF void FSUB_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2044 BX_SMF void FSUBR_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2045 BX_SMF void FSUB_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2046 BX_SMF void FSUBR_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2047
2048 BX_SMF void FISUB_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2049 BX_SMF void FISUBR_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2050 BX_SMF void FISUB_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2051 BX_SMF void FISUBR_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2052
2053 // div
2054 BX_SMF void FDIV_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2055 BX_SMF void FDIVR_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2056 BX_SMF void FDIV_STi_ST0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2057 BX_SMF void FDIVR_STi_ST0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2058 BX_SMF void FDIV_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2059 BX_SMF void FDIVR_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2060 BX_SMF void FDIV_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2061 BX_SMF void FDIVR_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2062
2063 BX_SMF void FIDIV_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2064 BX_SMF void FIDIVR_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2065 BX_SMF void FIDIV_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2066 BX_SMF void FIDIVR_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2067
2068 // compare
2069 BX_SMF void FCOM_STi(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2070 BX_SMF void FUCOM_STi(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2071 BX_SMF void FCOMI_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2072 BX_SMF void FUCOMI_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2073 BX_SMF void FCOM_SINGLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2074 BX_SMF void FCOM_DOUBLE_REAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2075 BX_SMF void FICOM_WORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2076 BX_SMF void FICOM_DWORD_INTEGER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2077
2078 BX_SMF void FCOMPP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2079 BX_SMF void FUCOMPP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2080
2081 BX_SMF void FCMOVB_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2082 BX_SMF void FCMOVE_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2083 BX_SMF void FCMOVBE_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2084 BX_SMF void FCMOVU_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2085 BX_SMF void FCMOVNB_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2086 BX_SMF void FCMOVNE_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2087 BX_SMF void FCMOVNBE_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2088 BX_SMF void FCMOVNU_ST0_STj(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2089
2090 // misc
2091 BX_SMF void FXCH_STi(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2092 BX_SMF void FNOP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2093 BX_SMF void FPLEGACY(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2094 BX_SMF void FCHS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2095 BX_SMF void FABS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2096 BX_SMF void FTST(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2097 BX_SMF void FXAM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2098 BX_SMF void FDECSTP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2099 BX_SMF void FINCSTP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2100 BX_SMF void FFREE_STi(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2101 BX_SMF void FFREEP_STi(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2102
2103 BX_SMF void F2XM1(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2104 BX_SMF void FYL2X(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2105 BX_SMF void FPTAN(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2106 BX_SMF void FPATAN(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2107 BX_SMF void FXTRACT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2108 BX_SMF void FPREM1(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2109 BX_SMF void FPREM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2110 BX_SMF void FYL2XP1(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2111 BX_SMF void FSQRT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2112 BX_SMF void FSINCOS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2113 BX_SMF void FRNDINT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2114 #undef FSCALE // <sys/param.h> is #included on Mac OS X from bochs.h
2115 BX_SMF void FSCALE(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2116 BX_SMF void FSIN(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2117 BX_SMF void FCOS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2118 #endif
2119
2120 /* MMX */
2121 BX_SMF void PUNPCKLBW_PqQd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2122 BX_SMF void PUNPCKLWD_PqQd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2123 BX_SMF void PUNPCKLDQ_PqQd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2124 BX_SMF void PACKSSWB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2125 BX_SMF void PCMPGTB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2126 BX_SMF void PCMPGTW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2127 BX_SMF void PCMPGTD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2128 BX_SMF void PACKUSWB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2129 BX_SMF void PUNPCKHBW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2130 BX_SMF void PUNPCKHWD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2131 BX_SMF void PUNPCKHDQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2132 BX_SMF void PACKSSDW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2133 BX_SMF void MOVD_PqEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2134 BX_SMF void MOVD_PqEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2135 BX_SMF void MOVQ_PqQqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2136 BX_SMF void MOVQ_PqQqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2137 BX_SMF void PCMPEQB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2138 BX_SMF void PCMPEQW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2139 BX_SMF void PCMPEQD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2140 BX_SMF void EMMS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2141 BX_SMF void MOVD_EdPqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2142 BX_SMF void MOVD_EdPqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2143 BX_SMF void MOVQ_QqPqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2144 BX_SMF void PSRLW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2145 BX_SMF void PSRLD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2146 BX_SMF void PSRLQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2147 BX_SMF void PMULLW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2148 BX_SMF void PSUBUSB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2149 BX_SMF void PSUBUSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2150 BX_SMF void PAND_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2151 BX_SMF void PADDUSB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2152 BX_SMF void PADDUSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2153 BX_SMF void PANDN_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2154 BX_SMF void PSRAW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2155 BX_SMF void PSRAD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2156 BX_SMF void PMULHW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2157 BX_SMF void PSUBSB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2158 BX_SMF void PSUBSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2159 BX_SMF void POR_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2160 BX_SMF void PADDSB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2161 BX_SMF void PADDSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2162 BX_SMF void PXOR_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2163 BX_SMF void PSLLW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2164 BX_SMF void PSLLD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2165 BX_SMF void PSLLQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2166 BX_SMF void PMADDWD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2167 BX_SMF void PSUBB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2168 BX_SMF void PSUBW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2169 BX_SMF void PSUBD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2170 BX_SMF void PADDB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2171 BX_SMF void PADDW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2172 BX_SMF void PADDD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2173 BX_SMF void PSRLW_NqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2174 BX_SMF void PSRAW_NqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2175 BX_SMF void PSLLW_NqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2176 BX_SMF void PSRLD_NqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2177 BX_SMF void PSRAD_NqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2178 BX_SMF void PSLLD_NqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2179 BX_SMF void PSRLQ_NqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2180 BX_SMF void PSLLQ_NqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2181 /* MMX */
2182
2183 #if BX_SUPPORT_3DNOW
2184 BX_SMF void PFPNACC_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2185 BX_SMF void PI2FW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2186 BX_SMF void PI2FD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2187 BX_SMF void PF2IW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2188 BX_SMF void PF2ID_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2189 BX_SMF void PFNACC_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2190 BX_SMF void PFCMPGE_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2191 BX_SMF void PFMIN_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2192 BX_SMF void PFRCP_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2193 BX_SMF void PFRSQRT_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2194 BX_SMF void PFSUB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2195 BX_SMF void PFADD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2196 BX_SMF void PFCMPGT_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2197 BX_SMF void PFMAX_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2198 BX_SMF void PFRCPIT1_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2199 BX_SMF void PFRSQIT1_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2200 BX_SMF void PFSUBR_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2201 BX_SMF void PFACC_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2202 BX_SMF void PFCMPEQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2203 BX_SMF void PFMUL_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2204 BX_SMF void PFRCPIT2_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2205 BX_SMF void PMULHRW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2206 BX_SMF void PSWAPD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2207 #endif
2208
2209 BX_SMF void SYSCALL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2210 BX_SMF void SYSRET(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2211
2212 /* SSE */
2213 BX_SMF void FXSAVE(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2214 BX_SMF void FXRSTOR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2215 BX_SMF void LDMXCSR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2216 BX_SMF void STMXCSR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2217 BX_SMF void PREFETCH(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2218 /* SSE */
2219
2220 /* SSE */
2221 BX_SMF void ANDPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2222 BX_SMF void ORPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2223 BX_SMF void XORPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2224 BX_SMF void ANDNPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2225 BX_SMF void MOVUPS_VpsWpsM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2226 BX_SMF void MOVUPS_WpsVpsM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2227 BX_SMF void MOVSS_VssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2228 BX_SMF void MOVSS_VssWssM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2229 BX_SMF void MOVSS_WssVssM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2230 BX_SMF void MOVSD_VsdWsdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2231 BX_SMF void MOVSD_WsdVsdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2232 BX_SMF void MOVHLPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2233 BX_SMF void MOVLPS_VpsMq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2234 BX_SMF void MOVLHPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2235 BX_SMF void MOVHPS_VpsMq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2236 BX_SMF void MOVHPS_MqVps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2237 BX_SMF void MOVAPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2238 BX_SMF void MOVAPS_VpsWpsM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2239 BX_SMF void MOVAPS_WpsVpsM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2240 BX_SMF void CVTPI2PS_VpsQqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2241 BX_SMF void CVTPI2PS_VpsQqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2242 BX_SMF void CVTSI2SS_VssEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2243 BX_SMF void CVTTPS2PI_PqWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2244 BX_SMF void CVTTSS2SI_GdWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2245 BX_SMF void CVTPS2PI_PqWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2246 BX_SMF void CVTSS2SI_GdWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2247 BX_SMF void UCOMISS_VssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2248 BX_SMF void COMISS_VssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2249 BX_SMF void MOVMSKPS_GdUps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2250 BX_SMF void SQRTPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2251 BX_SMF void SQRTSS_VssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2252 BX_SMF void RSQRTPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2253 BX_SMF void RSQRTSS_VssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2254 BX_SMF void RCPPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2255 BX_SMF void RCPSS_VssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2256 BX_SMF void ADDPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2257 BX_SMF void ADDSS_VssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2258 BX_SMF void MULPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2259 BX_SMF void MULSS_VssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2260 BX_SMF void SUBPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2261 BX_SMF void SUBSS_VssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2262 BX_SMF void MINPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2263 BX_SMF void MINSS_VssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2264 BX_SMF void DIVPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2265 BX_SMF void DIVSS_VssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2266 BX_SMF void MAXPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2267 BX_SMF void MAXSS_VssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2268 BX_SMF void PSHUFW_PqQqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2269 BX_SMF void PSHUFLW_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2270 BX_SMF void CMPPS_VpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2271 BX_SMF void CMPSS_VssWssIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2272 BX_SMF void PINSRW_PqEwIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2273 BX_SMF void PEXTRW_GdNqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2274 BX_SMF void SHUFPS_VpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2275 BX_SMF void PMOVMSKB_GdNq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2276 BX_SMF void PMINUB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2277 BX_SMF void PMAXUB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2278 BX_SMF void PAVGB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2279 BX_SMF void PAVGW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2280 BX_SMF void PMULHUW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2281 BX_SMF void PMINSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2282 BX_SMF void PMAXSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2283 BX_SMF void PSADBW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2284 BX_SMF void MASKMOVQ_PqNq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2285 /* SSE */
2286
2287 /* SSE2 */
2288 BX_SMF void MOVSD_VsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2289 BX_SMF void CVTPI2PD_VpdQqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2290 BX_SMF void CVTPI2PD_VpdQqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2291 BX_SMF void CVTSI2SD_VsdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2292 BX_SMF void CVTTPD2PI_PqWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2293 BX_SMF void CVTTSD2SI_GdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2294 BX_SMF void CVTPD2PI_PqWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2295 BX_SMF void CVTSD2SI_GdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2296 BX_SMF void UCOMISD_VsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2297 BX_SMF void COMISD_VsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2298 BX_SMF void MOVMSKPD_GdUpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2299 BX_SMF void SQRTPD_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2300 BX_SMF void SQRTSD_VsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2301 BX_SMF void ADDPD_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2302 BX_SMF void ADDSD_VsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2303 BX_SMF void MULPD_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2304 BX_SMF void MULSD_VsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2305 BX_SMF void SUBPD_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2306 BX_SMF void SUBSD_VsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2307 BX_SMF void CVTPS2PD_VpdWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2308 BX_SMF void CVTPD2PS_VpsWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2309 BX_SMF void CVTSD2SS_VssWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2310 BX_SMF void CVTSS2SD_VsdWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2311 BX_SMF void CVTDQ2PS_VpsWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2312 BX_SMF void CVTPS2DQ_VdqWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2313 BX_SMF void CVTTPS2DQ_VdqWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2314 BX_SMF void MINPD_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2315 BX_SMF void MINSD_VsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2316 BX_SMF void DIVPD_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2317 BX_SMF void DIVSD_VsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2318 BX_SMF void MAXPD_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2319 BX_SMF void MAXSD_VsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2320 BX_SMF void PUNPCKLBW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2321 BX_SMF void PUNPCKLWD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2322 BX_SMF void UNPCKLPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2323 BX_SMF void PACKSSWB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2324 BX_SMF void PCMPGTB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2325 BX_SMF void PCMPGTW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2326 BX_SMF void PCMPGTD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2327 BX_SMF void PACKUSWB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2328 BX_SMF void PUNPCKHBW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2329 BX_SMF void PUNPCKHWD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2330 BX_SMF void UNPCKHPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2331 BX_SMF void PACKSSDW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2332 BX_SMF void PUNPCKLQDQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2333 BX_SMF void PUNPCKHQDQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2334 BX_SMF void MOVD_VdqEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2335 BX_SMF void PSHUFD_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2336 BX_SMF void PSHUFHW_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2337 BX_SMF void PCMPEQB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2338 BX_SMF void PCMPEQW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2339 BX_SMF void PCMPEQD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2340 BX_SMF void MOVD_EdVdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2341 BX_SMF void MOVQ_VqWqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2342 BX_SMF void CMPPD_VpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2343 BX_SMF void CMPSD_VsdWsdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2344 BX_SMF void PINSRW_VdqEwIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2345 BX_SMF void PINSRW_VdqEwIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2346 BX_SMF void PEXTRW_GdUdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2347 BX_SMF void SHUFPD_VpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2348 BX_SMF void PSRLW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2349 BX_SMF void PSRLD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2350 BX_SMF void PSRLQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2351 BX_SMF void PADDQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2352 BX_SMF void PADDQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2353 BX_SMF void PMULLW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2354 BX_SMF void MOVDQ2Q_PqUdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2355 BX_SMF void MOVQ2DQ_VdqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2356 BX_SMF void PMOVMSKB_GdUdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2357 BX_SMF void PSUBUSB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2358 BX_SMF void PSUBUSW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2359 BX_SMF void PMINUB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2360 BX_SMF void PADDUSB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2361 BX_SMF void PADDUSW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2362 BX_SMF void PMAXUB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2363 BX_SMF void PAVGB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2364 BX_SMF void PSRAW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2365 BX_SMF void PSRAD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2366 BX_SMF void PAVGW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2367 BX_SMF void PMULHUW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2368 BX_SMF void PMULHW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2369 BX_SMF void CVTTPD2DQ_VqWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2370 BX_SMF void CVTPD2DQ_VqWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2371 BX_SMF void CVTDQ2PD_VpdWqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2372 BX_SMF void PSUBSB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2373 BX_SMF void PSUBSW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2374 BX_SMF void PMINSW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2375 BX_SMF void PADDSB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2376 BX_SMF void PADDSW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2377 BX_SMF void PMAXSW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2378 BX_SMF void PSLLW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2379 BX_SMF void PSLLD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2380 BX_SMF void PSLLQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2381 BX_SMF void PMULUDQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2382 BX_SMF void PMULUDQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2383 BX_SMF void PMADDWD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2384 BX_SMF void PSADBW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2385 BX_SMF void MASKMOVDQU_VdqUdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2386 BX_SMF void PSUBB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2387 BX_SMF void PSUBW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2388 BX_SMF void PSUBD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2389 BX_SMF void PSUBQ_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2390 BX_SMF void PSUBQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2391 BX_SMF void PADDB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2392 BX_SMF void PADDW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2393 BX_SMF void PADDD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2394 BX_SMF void PSRLW_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2395 BX_SMF void PSRLD_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2396 BX_SMF void PSRLQ_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2397 BX_SMF void PSRAW_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2398 BX_SMF void PSRAD_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2399 BX_SMF void PSLLW_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2400 BX_SMF void PSLLD_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2401 BX_SMF void PSLLQ_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2402 BX_SMF void PSRLDQ_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2403 BX_SMF void PSLLDQ_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2404 /* SSE2 */
2405
2406 /* SSE3 */
2407 BX_SMF void MOVDDUP_VpdWqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2408 BX_SMF void MOVSLDUP_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2409 BX_SMF void MOVSHDUP_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2410 BX_SMF void HADDPD_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2411 BX_SMF void HADDPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2412 BX_SMF void HSUBPD_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2413 BX_SMF void HSUBPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2414 BX_SMF void ADDSUBPD_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2415 BX_SMF void ADDSUBPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2416 /* SSE3 */
2417
2418 #if BX_CPU_LEVEL >= 6
2419 /* SSSE3 */
2420 BX_SMF void PSHUFB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2421 BX_SMF void PHADDW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2422 BX_SMF void PHADDD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2423 BX_SMF void PHADDSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2424 BX_SMF void PMADDUBSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2425 BX_SMF void PHSUBSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2426 BX_SMF void PHSUBW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2427 BX_SMF void PHSUBD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2428 BX_SMF void PSIGNB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2429 BX_SMF void PSIGNW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2430 BX_SMF void PSIGND_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2431 BX_SMF void PMULHRSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2432 BX_SMF void PABSB_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2433 BX_SMF void PABSW_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2434 BX_SMF void PABSD_PqQq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2435 BX_SMF void PALIGNR_PqQqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2436
2437 BX_SMF void PSHUFB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2438 BX_SMF void PHADDW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2439 BX_SMF void PHADDD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2440 BX_SMF void PHADDSW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2441 BX_SMF void PMADDUBSW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2442 BX_SMF void PHSUBSW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2443 BX_SMF void PHSUBW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2444 BX_SMF void PHSUBD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2445 BX_SMF void PSIGNB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2446 BX_SMF void PSIGNW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2447 BX_SMF void PSIGND_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2448 BX_SMF void PMULHRSW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2449 BX_SMF void PABSB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2450 BX_SMF void PABSW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2451 BX_SMF void PABSD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2452 BX_SMF void PALIGNR_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2453 /* SSSE3 */
2454
2455 /* SSE4.1 */
2456 BX_SMF void PBLENDVB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2457 BX_SMF void BLENDVPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2458 BX_SMF void BLENDVPD_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2459 BX_SMF void PTEST_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2460 BX_SMF void PMULDQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2461 BX_SMF void PCMPEQQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2462 BX_SMF void PACKUSDW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2463 BX_SMF void PMOVSXBW_VdqWqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2464 BX_SMF void PMOVSXBD_VdqWdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2465 BX_SMF void PMOVSXBQ_VdqWwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2466 BX_SMF void PMOVSXWD_VdqWqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2467 BX_SMF void PMOVSXWQ_VdqWdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2468 BX_SMF void PMOVSXDQ_VdqWqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2469 BX_SMF void PMOVZXBW_VdqWqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2470 BX_SMF void PMOVZXBD_VdqWdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2471 BX_SMF void PMOVZXBQ_VdqWwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2472 BX_SMF void PMOVZXWD_VdqWqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2473 BX_SMF void PMOVZXWQ_VdqWdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2474 BX_SMF void PMOVZXDQ_VdqWqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2475 BX_SMF void PMINSB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2476 BX_SMF void PMINSD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2477 BX_SMF void PMINUW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2478 BX_SMF void PMINUD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2479 BX_SMF void PMAXSB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2480 BX_SMF void PMAXSD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2481 BX_SMF void PMAXUW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2482 BX_SMF void PMAXUD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2483 BX_SMF void PMULLD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2484 BX_SMF void PHMINPOSUW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2485 BX_SMF void ROUNDPS_VpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2486 BX_SMF void ROUNDPD_VpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2487 BX_SMF void ROUNDSS_VssWssIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2488 BX_SMF void ROUNDSD_VsdWsdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2489 BX_SMF void BLENDPS_VpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2490 BX_SMF void BLENDPD_VpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2491 BX_SMF void PBLENDW_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2492 BX_SMF void PEXTRB_EbdVdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2493 BX_SMF void PEXTRB_EbdVdqIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2494 BX_SMF void PEXTRW_EwdVdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2495 BX_SMF void PEXTRW_EwdVdqIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2496 BX_SMF void PEXTRD_EdVdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2497 BX_SMF void PEXTRD_EdVdqIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2498 #if BX_SUPPORT_X86_64
2499 BX_SMF void PEXTRQ_EqVdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2500 BX_SMF void PEXTRQ_EqVdqIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2501 #endif
2502 BX_SMF void PINSRB_VdqEbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2503 BX_SMF void PINSRB_VdqEbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2504 BX_SMF void PINSRD_VdqEdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2505 BX_SMF void PINSRD_VdqEdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2506 #if BX_SUPPORT_X86_64
2507 BX_SMF void PINSRQ_VdqEqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2508 BX_SMF void PINSRQ_VdqEqIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2509 #endif
2510 BX_SMF void DPPS_VpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2511 BX_SMF void DPPD_VpdHpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2512 BX_SMF void MPSADBW_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2513
2514 BX_SMF void INSERTPS_VpsWssIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2515 BX_SMF void INSERTPS_VpsWssIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2516 /* SSE4.1 */
2517
2518 /* SSE4.2 */
2519 BX_SMF void CRC32_GdEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2520 BX_SMF void CRC32_GdEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2521 BX_SMF void CRC32_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2522 #if BX_SUPPORT_X86_64
2523 BX_SMF void CRC32_GdEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2524 #endif
2525 BX_SMF void PCMPGTQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2526 BX_SMF void PCMPESTRM_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2527 BX_SMF void PCMPESTRI_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2528 BX_SMF void PCMPISTRM_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2529 BX_SMF void PCMPISTRI_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2530 /* SSE4.2 */
2531
2532 /* MOVBE Intel Atom(R) instruction */
2533 BX_SMF void MOVBE_GwMw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2534 BX_SMF void MOVBE_GdMd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2535 BX_SMF void MOVBE_MwGw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2536 BX_SMF void MOVBE_MdGd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2537 #if BX_SUPPORT_X86_64
2538 BX_SMF void MOVBE_GqMq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2539 BX_SMF void MOVBE_MqGq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2540 #endif
2541 /* MOVBE Intel Atom(R) instruction */
2542 #endif
2543
2544 /* XSAVE/XRSTOR extensions */
2545 BX_SMF void XSAVE(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2546 BX_SMF void XSAVEC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2547 BX_SMF void XRSTOR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2548 BX_SMF void XGETBV(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2549 BX_SMF void XSETBV(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2550 /* XSAVE/XRSTOR extensions */
2551
2552 #if BX_CPU_LEVEL >= 6
2553 /* AES instructions */
2554 BX_SMF void AESIMC_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2555 BX_SMF void AESKEYGENASSIST_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2556 BX_SMF void AESENC_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2557 BX_SMF void AESENCLAST_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2558 BX_SMF void AESDEC_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2559 BX_SMF void AESDECLAST_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2560 BX_SMF void PCLMULQDQ_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2561 /* AES instructions */
2562
2563 /* SHA instructions */
2564 BX_SMF void SHA1NEXTE_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2565 BX_SMF void SHA1MSG1_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2566 BX_SMF void SHA1MSG2_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2567 BX_SMF void SHA256RNDS2_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2568 BX_SMF void SHA256MSG1_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2569 BX_SMF void SHA256MSG2_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2570 BX_SMF void SHA1RNDS4_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2571 /* SHA instructions */
2572
2573 /* GFNI instructions */
2574 BX_SMF void GF2P8AFFINEINVQB_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2575 BX_SMF void GF2P8AFFINEQB_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2576 BX_SMF void GF2P8MULB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2577 /* GFNI instructions */
2578 #endif
2579
2580 /* VMX instructions */
2581 BX_SMF void VMXON(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2582 BX_SMF void VMXOFF(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2583 BX_SMF void VMCALL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2584 BX_SMF void VMLAUNCH(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2585 BX_SMF void VMCLEAR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2586 BX_SMF void VMPTRLD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2587 BX_SMF void VMPTRST(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2588 BX_SMF void VMREAD_EdGd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2589 BX_SMF void VMWRITE_GdEd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2590 #if BX_SUPPORT_X86_64
2591 BX_SMF void VMREAD_EqGq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2592 BX_SMF void VMWRITE_GqEq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2593 #endif
2594 BX_SMF void VMFUNC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2595 /* VMX instructions */
2596
2597 /* SVM instructions */
2598 BX_SMF void VMRUN(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2599 BX_SMF void VMMCALL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2600 BX_SMF void VMLOAD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2601 BX_SMF void VMSAVE(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2602 BX_SMF void SKINIT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2603 BX_SMF void CLGI(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2604 BX_SMF void STGI(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2605 BX_SMF void INVLPGA(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2606 /* SVM instructions */
2607
2608 /* SMX instructions */
2609 BX_SMF void GETSEC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2610 /* SMX instructions */
2611
2612 #if BX_CPU_LEVEL >= 6
2613 /* VMXx2 */
2614 BX_SMF void INVEPT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2615 BX_SMF void INVVPID(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2616 /* VMXx2 */
2617
2618 BX_SMF void INVPCID(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2619 #endif
2620
2621 /* CET instructions */
2622 #if BX_SUPPORT_CET
2623 BX_SMF void INCSSPD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2624 BX_SMF void INCSSPQ(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2625 BX_SMF void RDSSPD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2626 BX_SMF void RDSSPQ(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2627 BX_SMF void SAVEPREVSSP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2628 BX_SMF void RSTORSSP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2629 BX_SMF void WRSSD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2630 BX_SMF void WRUSSD(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2631 BX_SMF void WRSSQ(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2632 BX_SMF void WRUSSQ(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2633 BX_SMF void SETSSBSY(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2634 BX_SMF void CLRSSBSY(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2635 BX_SMF void ENDBRANCH32(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2636 BX_SMF void ENDBRANCH64(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2637 #endif
2638 /* CET instructions */
2639
2640 #if BX_SUPPORT_AVX
2641 /* AVX */
2642 BX_SMF void VZEROUPPER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2643 BX_SMF void VZEROALL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2644
2645 BX_SMF void VMOVSS_VssHpsWssR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
2646 BX_SMF void VMOVSD_VsdHpdWsdR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
2647 BX_SMF void VMOVAPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2648 BX_SMF void VMOVAPS_VpsWpsM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2649 BX_SMF void VMOVUPS_VpsWpsM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2650 BX_SMF void VMOVAPS_WpsVpsM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2651 BX_SMF void VMOVUPS_WpsVpsM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2652 BX_SMF void VMOVLPD_VpdHpdMq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2653 BX_SMF void VMOVHPD_VpdHpdMq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2654 BX_SMF void VMOVLHPS_VpsHpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2655 BX_SMF void VMOVHLPS_VpsHpsWps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2656 BX_SMF void VMOVSHDUP_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2657 BX_SMF void VMOVSLDUP_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2658 BX_SMF void VMOVDDUP_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2659 BX_SMF void VUNPCKLPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2660 BX_SMF void VUNPCKHPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2661 BX_SMF void VUNPCKLPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2662 BX_SMF void VUNPCKHPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2663 BX_SMF void VMOVMSKPS_GdUps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2664 BX_SMF void VMOVMSKPD_GdUpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2665 BX_SMF void VPMOVMSKB_GdUdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2666 BX_SMF void VSQRTPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2667 BX_SMF void VSQRTPD_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2668 BX_SMF void VSQRTSS_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2669 BX_SMF void VSQRTSD_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2670 BX_SMF void VHADDPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2671 BX_SMF void VHADDPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2672 BX_SMF void VHSUBPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2673 BX_SMF void VHSUBPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2674 BX_SMF void VADDPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2675 BX_SMF void VADDPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2676 BX_SMF void VADDSS_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2677 BX_SMF void VADDSD_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2678 BX_SMF void VMULPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2679 BX_SMF void VMULPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2680 BX_SMF void VMULSS_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2681 BX_SMF void VMULSD_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2682 BX_SMF void VSUBPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2683 BX_SMF void VSUBPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2684 BX_SMF void VSUBSS_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2685 BX_SMF void VSUBSD_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2686 BX_SMF void VCVTSS2SD_VsdWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2687 BX_SMF void VCVTSD2SS_VssWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2688 BX_SMF void VCVTDQ2PS_VpsWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2689 BX_SMF void VCVTPS2DQ_VdqWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2690 BX_SMF void VCVTTPS2DQ_VdqWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2691 BX_SMF void VCVTPS2PD_VpdWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2692 BX_SMF void VCVTPD2PS_VpsWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2693 BX_SMF void VCVTPD2DQ_VdqWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2694 BX_SMF void VCVTDQ2PD_VpdWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2695 BX_SMF void VCVTTPD2DQ_VdqWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2696 BX_SMF void VCVTSI2SD_VsdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2697 BX_SMF void VCVTSI2SS_VssEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2698 BX_SMF void VCVTSI2SD_VsdEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2699 BX_SMF void VCVTSI2SS_VssEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2700 BX_SMF void VMINPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2701 BX_SMF void VMINPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2702 BX_SMF void VMINSS_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2703 BX_SMF void VMINSD_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2704 BX_SMF void VDIVPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2705 BX_SMF void VDIVPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2706 BX_SMF void VDIVSS_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2707 BX_SMF void VDIVSD_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2708 BX_SMF void VMAXPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2709 BX_SMF void VMAXPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2710 BX_SMF void VMAXSS_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2711 BX_SMF void VMAXSD_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2712 BX_SMF void VCMPPS_VpsHpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2713 BX_SMF void VCMPSS_VssHpsWssIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2714 BX_SMF void VCMPPD_VpdHpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2715 BX_SMF void VCMPSD_VsdHpdWsdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2716 BX_SMF void VADDSUBPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2717 BX_SMF void VADDSUBPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2718 BX_SMF void VROUNDPS_VpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2719 BX_SMF void VROUNDPD_VpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2720 BX_SMF void VROUNDSS_VssHpsWssIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2721 BX_SMF void VROUNDSD_VsdHpdWsdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2722 BX_SMF void VDPPS_VpsHpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2723 BX_SMF void VRSQRTPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2724 BX_SMF void VRSQRTSS_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2725 BX_SMF void VRCPPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2726 BX_SMF void VRCPSS_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2727 BX_SMF void VSHUFPS_VpsHpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2728 BX_SMF void VSHUFPD_VpdHpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2729 BX_SMF void VBLENDPS_VpsHpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2730 BX_SMF void VBLENDPD_VpdHpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2731 BX_SMF void VPBLENDVB_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2732 BX_SMF void VPTEST_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2733 BX_SMF void VTESTPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2734 BX_SMF void VTESTPD_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2735 BX_SMF void VANDPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2736 BX_SMF void VANDNPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2737 BX_SMF void VORPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2738 BX_SMF void VXORPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2739 BX_SMF void VBROADCASTF128_VdqMdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2740 BX_SMF void VBLENDVPS_VpsHpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2741 BX_SMF void VBLENDVPD_VpdHpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2742 BX_SMF void VINSERTF128_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2743 BX_SMF void VEXTRACTF128_WdqVdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2744 BX_SMF void VEXTRACTF128_WdqVdqIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2745 BX_SMF void VPERMILPS_VpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2746 BX_SMF void VPERMILPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2747 BX_SMF void VPERMILPD_VpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2748 BX_SMF void VPERMILPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2749 BX_SMF void VPERM2F128_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2750 BX_SMF void VMASKMOVPS_VpsHpsMps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2751 BX_SMF void VMASKMOVPD_VpdHpdMpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2752 BX_SMF void VMASKMOVPS_MpsHpsVps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2753 BX_SMF void VMASKMOVPD_MpdHpdVpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2754 BX_SMF void VPINSRB_VdqHdqEbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2755 BX_SMF void VPINSRB_VdqHdqEbIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2756 BX_SMF void VPINSRW_VdqHdqEwIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2757 BX_SMF void VPINSRW_VdqHdqEwIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2758 BX_SMF void VPINSRD_VdqHdqEdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2759 BX_SMF void VPINSRD_VdqHdqEdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2760 BX_SMF void VPINSRQ_VdqHdqEqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2761 BX_SMF void VPINSRQ_VdqHdqEqIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2762 BX_SMF void VINSERTPS_VpsHpsWssIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2763 BX_SMF void VINSERTPS_VpsHpsWssIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2764
2765 BX_SMF void VCVTPH2PS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2766 BX_SMF void VCVTPS2PH_WpsVpsIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2767 /* AVX */
2768
2769 /* AVX2 */
2770 BX_SMF void VPCMPEQB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2771 BX_SMF void VPCMPEQW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2772 BX_SMF void VPCMPEQD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2773 BX_SMF void VPCMPEQQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2774 BX_SMF void VPCMPGTB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2775 BX_SMF void VPCMPGTW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2776 BX_SMF void VPCMPGTD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2777 BX_SMF void VPCMPGTQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2778 BX_SMF void VPMINSB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2779 BX_SMF void VPMINSW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2780 BX_SMF void VPMINSD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2781 BX_SMF void VPMINSQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2782 BX_SMF void VPMINUB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2783 BX_SMF void VPMINUW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2784 BX_SMF void VPMINUD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2785 BX_SMF void VPMINUQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2786 BX_SMF void VPMAXSB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2787 BX_SMF void VPMAXSW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2788 BX_SMF void VPMAXSD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2789 BX_SMF void VPMAXSQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2790 BX_SMF void VPMAXUB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2791 BX_SMF void VPMAXUW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2792 BX_SMF void VPMAXUD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2793 BX_SMF void VPMAXUQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2794 BX_SMF void VPSIGNB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2795 BX_SMF void VPSIGNW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2796 BX_SMF void VPSIGND_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2797
2798 BX_SMF void VPADDB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2799 BX_SMF void VPADDW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2800 BX_SMF void VPADDD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2801 BX_SMF void VPADDQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2802 BX_SMF void VPSUBB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2803 BX_SMF void VPSUBW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2804 BX_SMF void VPSUBD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2805 BX_SMF void VPSUBQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2806 BX_SMF void VPABSB_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2807 BX_SMF void VPABSW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2808 BX_SMF void VPABSD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2809 BX_SMF void VPABSQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2810 BX_SMF void VPSUBSB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2811 BX_SMF void VPSUBSW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2812 BX_SMF void VPSUBUSB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2813 BX_SMF void VPSUBUSW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2814 BX_SMF void VPADDSB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2815 BX_SMF void VPADDSW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2816 BX_SMF void VPADDUSB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2817 BX_SMF void VPADDUSW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2818 BX_SMF void VPAVGB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2819 BX_SMF void VPAVGW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2820 BX_SMF void VPHADDW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2821 BX_SMF void VPHADDD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2822 BX_SMF void VPHADDSW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2823 BX_SMF void VPHSUBW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2824 BX_SMF void VPHSUBD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2825 BX_SMF void VPHSUBSW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2826 BX_SMF void VPSHUFHW_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2827 BX_SMF void VPSHUFLW_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2828 BX_SMF void VPACKUSWB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2829 BX_SMF void VPACKSSWB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2830 BX_SMF void VPACKUSDW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2831 BX_SMF void VPACKSSDW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2832 BX_SMF void VPUNPCKLBW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2833 BX_SMF void VPUNPCKHBW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2834 BX_SMF void VPUNPCKLWD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2835 BX_SMF void VPUNPCKHWD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2836 BX_SMF void VPMULLQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2837 BX_SMF void VPMULLD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2838 BX_SMF void VPMULLW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2839 BX_SMF void VPMULHW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2840 BX_SMF void VPMULHUW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2841 BX_SMF void VPMULDQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2842 BX_SMF void VPMULUDQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2843 BX_SMF void VPMULHRSW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2844 BX_SMF void VPMADDUBSW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2845 BX_SMF void VPMADDWD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2846 BX_SMF void VMPSADBW_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2847 BX_SMF void VPBLENDW_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2848 BX_SMF void VPSADBW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2849 BX_SMF void VPSHUFB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2850 BX_SMF void VPSRLW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2851 BX_SMF void VPSRLD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2852 BX_SMF void VPSRLQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2853 BX_SMF void VPSLLW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2854 BX_SMF void VPSLLD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2855 BX_SMF void VPSLLQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2856 BX_SMF void VPSRAW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2857 BX_SMF void VPSRAD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2858 BX_SMF void VPSRAQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2859 BX_SMF void VPSRLW_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2860 BX_SMF void VPSRLD_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2861 BX_SMF void VPSRLQ_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2862 BX_SMF void VPSLLW_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2863 BX_SMF void VPSLLD_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2864 BX_SMF void VPSLLQ_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2865 BX_SMF void VPSRAW_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2866 BX_SMF void VPSRAD_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2867 BX_SMF void VPSRAQ_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2868 BX_SMF void VPROLD_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2869 BX_SMF void VPROLQ_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2870 BX_SMF void VPRORD_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2871 BX_SMF void VPRORQ_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2872 BX_SMF void VPSRLDQ_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2873 BX_SMF void VPSLLDQ_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2874 BX_SMF void VPALIGNR_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2875
2876 BX_SMF void VPMOVSXBW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2877 BX_SMF void VPMOVSXBD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2878 BX_SMF void VPMOVSXBQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2879 BX_SMF void VPMOVSXWD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2880 BX_SMF void VPMOVSXWQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2881 BX_SMF void VPMOVSXDQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2882
2883 BX_SMF void VPMOVZXBW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2884 BX_SMF void VPMOVZXBD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2885 BX_SMF void VPMOVZXBQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2886 BX_SMF void VPMOVZXWD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2887 BX_SMF void VPMOVZXWQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2888 BX_SMF void VPMOVZXDQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2889
2890 BX_SMF void VPERMD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2891 BX_SMF void VPERMQ_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2892
2893 BX_SMF void VPSRAVW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2894 BX_SMF void VPSRAVD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2895 BX_SMF void VPSRAVQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2896 BX_SMF void VPSLLVW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2897 BX_SMF void VPSLLVD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2898 BX_SMF void VPSLLVQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2899 BX_SMF void VPSRLVW_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2900 BX_SMF void VPSRLVD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2901 BX_SMF void VPSRLVQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2902 BX_SMF void VPROLVD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2903 BX_SMF void VPROLVQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2904 BX_SMF void VPRORVD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2905 BX_SMF void VPRORVQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2906
2907 BX_SMF void VPBROADCASTB_VdqWbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2908 BX_SMF void VPBROADCASTW_VdqWwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2909 BX_SMF void VPBROADCASTD_VdqWdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2910 BX_SMF void VPBROADCASTQ_VdqWqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2911
2912 BX_SMF void VGATHERDPS_VpsHps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2913 BX_SMF void VGATHERQPS_VpsHps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2914 BX_SMF void VGATHERDPD_VpdHpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2915 BX_SMF void VGATHERQPD_VpdHpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2916 /* AVX2 */
2917
2918 /* AVX2 FMA */
2919 BX_SMF void VFMADDPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2920 BX_SMF void VFMADDPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2921 BX_SMF void VFMADDSD_VpdHsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2922 BX_SMF void VFMADDSS_VpsHssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2923 BX_SMF void VFMADDSUBPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2924 BX_SMF void VFMADDSUBPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2925 BX_SMF void VFMSUBADDPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2926 BX_SMF void VFMSUBADDPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2927 BX_SMF void VFMSUBPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2928 BX_SMF void VFMSUBPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2929 BX_SMF void VFMSUBSD_VpdHsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2930 BX_SMF void VFMSUBSS_VpsHssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2931 BX_SMF void VFNMADDPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2932 BX_SMF void VFNMADDPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2933 BX_SMF void VFNMADDSD_VpdHsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2934 BX_SMF void VFNMADDSS_VpsHssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2935 BX_SMF void VFNMSUBPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2936 BX_SMF void VFNMSUBPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2937 BX_SMF void VFNMSUBSD_VpdHsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2938 BX_SMF void VFNMSUBSS_VpsHssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2939 /* AVX2 FMA */
2940
2941 /* BMI */
2942 BX_SMF void ANDN_GdBdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2943 BX_SMF void MULX_GdBdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2944 BX_SMF void BLSI_BdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2945 BX_SMF void BLSMSK_BdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2946 BX_SMF void BLSR_BdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2947 BX_SMF void RORX_GdEdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2948 BX_SMF void SHLX_GdEdBdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2949 BX_SMF void SHRX_GdEdBdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2950 BX_SMF void SARX_GdEdBdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2951 BX_SMF void BEXTR_GdEdBdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2952 BX_SMF void BZHI_GdEdBdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2953 BX_SMF void PEXT_GdBdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2954 BX_SMF void PDEP_GdBdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2955
2956 BX_SMF void ANDN_GqBqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2957 BX_SMF void MULX_GqBqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2958 BX_SMF void BLSI_BqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2959 BX_SMF void BLSMSK_BqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2960 BX_SMF void BLSR_BqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2961 BX_SMF void RORX_GqEqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2962 BX_SMF void SHLX_GqEqBqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2963 BX_SMF void SHRX_GqEqBqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2964 BX_SMF void SARX_GqEqBqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2965 BX_SMF void BEXTR_GqEqBqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2966 BX_SMF void BZHI_GqEqBqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2967 BX_SMF void PEXT_GqBqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2968 BX_SMF void PDEP_GqBqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2969 /* BMI */
2970
2971 /* FMA4 specific handlers (AMD) */
2972 BX_SMF void VFMADDSS_VssHssWssVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2973 BX_SMF void VFMADDSD_VsdHsdWsdVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2974 BX_SMF void VFMSUBSS_VssHssWssVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2975 BX_SMF void VFMSUBSD_VsdHsdWsdVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2976 BX_SMF void VFNMADDSS_VssHssWssVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2977 BX_SMF void VFNMADDSD_VsdHsdWsdVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2978 BX_SMF void VFNMSUBSS_VssHssWssVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2979 BX_SMF void VFNMSUBSD_VsdHsdWsdVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2980 /* FMA4 specific handlers (AMD) */
2981
2982 /* XOP (AMD) */
2983 BX_SMF void VPCMOV_VdqHdqWdqVIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2984 BX_SMF void VPPERM_VdqHdqWdqVIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2985 BX_SMF void VPSHAB_VdqWdqHdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2986 BX_SMF void VPSHAW_VdqWdqHdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2987 BX_SMF void VPSHAD_VdqWdqHdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2988 BX_SMF void VPSHAQ_VdqWdqHdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2989 BX_SMF void VPROTB_VdqWdqHdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2990 BX_SMF void VPROTW_VdqWdqHdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2991 BX_SMF void VPROTD_VdqWdqHdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2992 BX_SMF void VPROTQ_VdqWdqHdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2993 BX_SMF void VPSHLB_VdqWdqHdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2994 BX_SMF void VPSHLW_VdqWdqHdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2995 BX_SMF void VPSHLD_VdqWdqHdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2996 BX_SMF void VPSHLQ_VdqWdqHdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2997 BX_SMF void VPMACSSWW_VdqHdqWdqVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2998 BX_SMF void VPMACSSWD_VdqHdqWdqVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
2999 BX_SMF void VPMACSSDQL_VdqHdqWdqVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3000 BX_SMF void VPMACSSDD_VdqHdqWdqVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3001 BX_SMF void VPMACSSDQH_VdqHdqWdqVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3002 BX_SMF void VPMACSWW_VdqHdqWdqVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3003 BX_SMF void VPMACSWD_VdqHdqWdqVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3004 BX_SMF void VPMACSDQL_VdqHdqWdqVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3005 BX_SMF void VPMACSDD_VdqHdqWdqVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3006 BX_SMF void VPMACSDQH_VdqHdqWdqVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3007 BX_SMF void VPMADCSSWD_VdqHdqWdqVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3008 BX_SMF void VPMADCSWD_VdqHdqWdqVIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3009 BX_SMF void VPROTB_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3010 BX_SMF void VPROTW_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3011 BX_SMF void VPROTD_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3012 BX_SMF void VPROTQ_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3013 BX_SMF void VPCOMB_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3014 BX_SMF void VPCOMW_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3015 BX_SMF void VPCOMD_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3016 BX_SMF void VPCOMQ_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3017 BX_SMF void VPCOMUB_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3018 BX_SMF void VPCOMUW_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3019 BX_SMF void VPCOMUD_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3020 BX_SMF void VPCOMUQ_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3021 BX_SMF void VFRCZPS_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3022 BX_SMF void VFRCZPD_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3023 BX_SMF void VFRCZSS_VssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3024 BX_SMF void VFRCZSD_VsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3025 BX_SMF void VPHADDBW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3026 BX_SMF void VPHADDBD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3027 BX_SMF void VPHADDBQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3028 BX_SMF void VPHADDWD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3029 BX_SMF void VPHADDWQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3030 BX_SMF void VPHADDDQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3031 BX_SMF void VPHADDUBW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3032 BX_SMF void VPHADDUBD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3033 BX_SMF void VPHADDUBQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3034 BX_SMF void VPHADDUWD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3035 BX_SMF void VPHADDUWQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3036 BX_SMF void VPHADDUDQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3037 BX_SMF void VPHSUBBW_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3038 BX_SMF void VPHSUBWD_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3039 BX_SMF void VPHSUBDQ_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3040 BX_SMF void VPERMIL2PS_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3041 BX_SMF void VPERMIL2PD_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3042 /* XOP (AMD) */
3043
3044 /* TBM (AMD) */
3045 BX_SMF void BEXTR_GdEdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3046 BX_SMF void BLCFILL_BdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3047 BX_SMF void BLCI_BdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3048 BX_SMF void BLCIC_BdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3049 BX_SMF void BLCMSK_BdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3050 BX_SMF void BLCS_BdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3051 BX_SMF void BLSFILL_BdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3052 BX_SMF void BLSIC_BdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3053 BX_SMF void T1MSKC_BdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3054 BX_SMF void TZMSK_BdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3055
3056 BX_SMF void BEXTR_GqEqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3057 BX_SMF void BLCFILL_BqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3058 BX_SMF void BLCI_BqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3059 BX_SMF void BLCIC_BqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3060 BX_SMF void BLCMSK_BqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3061 BX_SMF void BLCS_BqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3062 BX_SMF void BLSFILL_BqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3063 BX_SMF void BLSIC_BqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3064 BX_SMF void T1MSKC_BqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3065 BX_SMF void TZMSK_BqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3066 /* TBM (AMD) */
3067 #endif
3068
3069 #if BX_SUPPORT_AVX
3070 // VAES: VEX extended AES instructions
3071 BX_SMF void VAESENC_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3072 BX_SMF void VAESENCLAST_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3073 BX_SMF void VAESDEC_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3074 BX_SMF void VAESDECLAST_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3075 BX_SMF void VPCLMULQDQ_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3076
3077 /* GFNI instructions: VEX extended form */
3078 BX_SMF void VGF2P8AFFINEINVQB_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3079 BX_SMF void VGF2P8AFFINEQB_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3080 BX_SMF void VGF2P8MULB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3081
3082 /* AVX encoded VNNI instructions */
3083 BX_SMF void VPDPBUSD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3084 BX_SMF void VPDPBUSDS_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3085 BX_SMF void VPDPWSSD_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3086 BX_SMF void VPDPWSSDS_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3087
3088 // AVX512 OPMASK instructions (VEX encoded)
3089 BX_SMF void KADDB_KGbKHbKEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3090 BX_SMF void KANDB_KGbKHbKEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3091 BX_SMF void KANDNB_KGbKHbKEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3092 BX_SMF void KMOVB_KGbKEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3093 BX_SMF void KMOVB_KGbKEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3094 BX_SMF void KMOVB_KEbKGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3095 BX_SMF void KMOVB_KGbEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3096 BX_SMF void KMOVB_GdKEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3097 BX_SMF void KNOTB_KGbKEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3098 BX_SMF void KORB_KGbKHbKEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3099 BX_SMF void KORTESTB_KGbKEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3100 BX_SMF void KSHIFTLB_KGbKEbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3101 BX_SMF void KSHIFTRB_KGbKEbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3102 BX_SMF void KXNORB_KGbKHbKEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3103 BX_SMF void KXORB_KGbKHbKEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3104 BX_SMF void KTESTB_KGbKEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3105
3106 BX_SMF void KADDW_KGwKHwKEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3107 BX_SMF void KANDW_KGwKHwKEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3108 BX_SMF void KANDNW_KGwKHwKEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3109 BX_SMF void KMOVW_KGwKEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3110 BX_SMF void KMOVW_KGwKEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3111 BX_SMF void KMOVW_KEwKGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3112 BX_SMF void KMOVW_KGwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3113 BX_SMF void KMOVW_GdKEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3114 BX_SMF void KUNPCKBW_KGwKHbKEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3115 BX_SMF void KNOTW_KGwKEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3116 BX_SMF void KORW_KGwKHwKEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3117 BX_SMF void KORTESTW_KGwKEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3118 BX_SMF void KSHIFTLW_KGwKEwIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3119 BX_SMF void KSHIFTRW_KGwKEwIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3120 BX_SMF void KXNORW_KGwKHwKEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3121 BX_SMF void KXORW_KGwKHwKEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3122 BX_SMF void KTESTW_KGwKEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3123
3124 BX_SMF void KADDD_KGdKHdKEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3125 BX_SMF void KANDD_KGdKHdKEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3126 BX_SMF void KANDND_KGdKHdKEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3127 BX_SMF void KMOVD_KGdKEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3128 BX_SMF void KMOVD_KGdKEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3129 BX_SMF void KMOVD_KEdKGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3130 BX_SMF void KMOVD_KGdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3131 BX_SMF void KMOVD_GdKEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3132 BX_SMF void KUNPCKWD_KGdKHwKEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3133 BX_SMF void KNOTD_KGdKEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3134 BX_SMF void KORD_KGdKHdKEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3135 BX_SMF void KORTESTD_KGdKEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3136 BX_SMF void KSHIFTLD_KGdKEdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3137 BX_SMF void KSHIFTRD_KGdKEdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3138 BX_SMF void KXNORD_KGdKHdKEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3139 BX_SMF void KXORD_KGdKHdKEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3140 BX_SMF void KTESTD_KGdKEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3141
3142 BX_SMF void KADDQ_KGqKHqKEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3143 BX_SMF void KANDQ_KGqKHqKEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3144 BX_SMF void KANDNQ_KGqKHqKEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3145 BX_SMF void KMOVQ_KGqKEqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3146 BX_SMF void KMOVQ_KGqKEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3147 BX_SMF void KMOVQ_KEqKGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3148 BX_SMF void KMOVQ_KGqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3149 BX_SMF void KMOVQ_GqKEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3150 BX_SMF void KUNPCKDQ_KGqKHdKEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3151 BX_SMF void KNOTQ_KGqKEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3152 BX_SMF void KORQ_KGqKHqKEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3153 BX_SMF void KORTESTQ_KGqKEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3154 BX_SMF void KSHIFTLQ_KGqKEqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3155 BX_SMF void KSHIFTRQ_KGqKEqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3156 BX_SMF void KXNORQ_KGqKHqKEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3157 BX_SMF void KXORQ_KGqKHqKEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3158 BX_SMF void KTESTQ_KGqKEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3159 // AVX512 OPMASK instructions (VEX encoded)
3160 #endif
3161
3162 #if BX_SUPPORT_EVEX
3163 BX_SMF void VADDPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3164 BX_SMF void VADDPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3165 BX_SMF void VADDSS_MASK_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3166 BX_SMF void VADDSD_MASK_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3167 BX_SMF void VSUBPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3168 BX_SMF void VSUBPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3169 BX_SMF void VSUBSS_MASK_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3170 BX_SMF void VSUBSD_MASK_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3171 BX_SMF void VMULPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3172 BX_SMF void VMULPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3173 BX_SMF void VMULSS_MASK_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3174 BX_SMF void VMULSD_MASK_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3175 BX_SMF void VDIVPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3176 BX_SMF void VDIVPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3177 BX_SMF void VDIVSS_MASK_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3178 BX_SMF void VDIVSD_MASK_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3179 BX_SMF void VMINPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3180 BX_SMF void VMINPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3181 BX_SMF void VMINSS_MASK_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3182 BX_SMF void VMINSD_MASK_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3183 BX_SMF void VMAXPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3184 BX_SMF void VMAXPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3185 BX_SMF void VMAXSS_MASK_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3186 BX_SMF void VMAXSD_MASK_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3187 BX_SMF void VSQRTPS_MASK_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3188 BX_SMF void VSQRTPD_MASK_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3189 BX_SMF void VSQRTSS_MASK_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3190 BX_SMF void VSQRTSD_MASK_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3191
3192 BX_SMF void VFPCLASSPS_MASK_KGwWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3193 BX_SMF void VFPCLASSPD_MASK_KGbWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3194 BX_SMF void VFPCLASSSS_MASK_KGbWssIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3195 BX_SMF void VFPCLASSSD_MASK_KGbWsdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3196
3197 BX_SMF void VGETEXPPS_MASK_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3198 BX_SMF void VGETEXPPD_MASK_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3199 BX_SMF void VGETEXPSS_MASK_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3200 BX_SMF void VGETEXPSD_MASK_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3201
3202 BX_SMF void VGETMANTPS_MASK_VpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3203 BX_SMF void VGETMANTPD_MASK_VpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3204 BX_SMF void VGETMANTSS_MASK_VssHpsWssIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3205 BX_SMF void VGETMANTSD_MASK_VsdHpdWsdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3206
3207 BX_SMF void VRNDSCALEPS_MASK_VpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3208 BX_SMF void VRNDSCALEPD_MASK_VpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3209 BX_SMF void VRNDSCALESS_MASK_VssHpsWssIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3210 BX_SMF void VRNDSCALESD_MASK_VsdHpdWsdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3211
3212 BX_SMF void VREDUCEPS_MASK_VpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3213 BX_SMF void VREDUCEPD_MASK_VpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3214 BX_SMF void VREDUCESS_MASK_VssHpsWssIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3215 BX_SMF void VREDUCESD_MASK_VsdHpdWsdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3216
3217 BX_SMF void VSCALEFPS_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3218 BX_SMF void VSCALEFPD_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3219 BX_SMF void VSCALEFSS_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3220 BX_SMF void VSCALEFSD_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3221
3222 BX_SMF void VSCALEFPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3223 BX_SMF void VSCALEFPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3224 BX_SMF void VSCALEFSS_MASK_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3225 BX_SMF void VSCALEFSD_MASK_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3226
3227 BX_SMF void VRANGEPS_MASK_VpsHpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3228 BX_SMF void VRANGEPD_MASK_VpdHpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3229 BX_SMF void VRANGESS_MASK_VssHpsWssIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3230 BX_SMF void VRANGESD_MASK_VsdHpdWsdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3231
3232 BX_SMF void VRCP14PS_MASK_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3233 BX_SMF void VRCP14PD_MASK_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3234 BX_SMF void VRCP14SS_MASK_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3235 BX_SMF void VRCP14SD_MASK_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3236
3237 BX_SMF void VRSQRT14PS_MASK_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3238 BX_SMF void VRSQRT14PD_MASK_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3239 BX_SMF void VRSQRT14SS_MASK_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3240 BX_SMF void VRSQRT14SD_MASK_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3241
3242 BX_SMF void VCVTSS2USI_GdWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3243 BX_SMF void VCVTSS2USI_GqWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3244 BX_SMF void VCVTSD2USI_GdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3245 BX_SMF void VCVTSD2USI_GqWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3246
3247 BX_SMF void VCVTTSS2USI_GdWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3248 BX_SMF void VCVTTSS2USI_GqWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3249 BX_SMF void VCVTTSD2USI_GdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3250 BX_SMF void VCVTTSD2USI_GqWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3251
3252 BX_SMF void VCVTUSI2SD_VsdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3253 BX_SMF void VCVTUSI2SS_VssEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3254 BX_SMF void VCVTUSI2SD_VsdEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3255 BX_SMF void VCVTUSI2SS_VssEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3256
3257 BX_SMF void VCVTTPS2UDQ_VdqWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3258 BX_SMF void VCVTTPS2UDQ_MASK_VdqWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3259 BX_SMF void VCVTTPD2UDQ_VdqWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3260 BX_SMF void VCVTTPD2UDQ_MASK_VdqWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3261
3262 BX_SMF void VCVTPS2UDQ_VdqWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3263 BX_SMF void VCVTPS2UDQ_MASK_VdqWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3264 BX_SMF void VCVTPD2UDQ_VdqWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3265 BX_SMF void VCVTPD2UDQ_MASK_VdqWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3266
3267 BX_SMF void VCVTUDQ2PS_VpsWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3268 BX_SMF void VCVTUDQ2PS_MASK_VpsWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3269 BX_SMF void VCVTUDQ2PD_VpdWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3270 BX_SMF void VCVTUDQ2PD_MASK_VpdWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3271
3272 BX_SMF void VCVTQQ2PS_VpsWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3273 BX_SMF void VCVTQQ2PS_MASK_VpsWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3274 BX_SMF void VCVTUQQ2PS_VpsWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3275 BX_SMF void VCVTUQQ2PS_MASK_VpsWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3276
3277 BX_SMF void VCVTQQ2PD_VpdWdqR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3278 BX_SMF void VCVTQQ2PD_MASK_VpdWdqR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3279 BX_SMF void VCVTUQQ2PD_VpdWdqR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3280 BX_SMF void VCVTUQQ2PD_MASK_VpdWdqR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3281
3282 BX_SMF void VCVTPS2QQ_VdqWpsR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3283 BX_SMF void VCVTPS2QQ_MASK_VdqWpsR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3284 BX_SMF void VCVTTPS2QQ_VdqWpsR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3285 BX_SMF void VCVTTPS2QQ_MASK_VdqWpsR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3286 BX_SMF void VCVTPS2UQQ_VdqWpsR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3287 BX_SMF void VCVTPS2UQQ_MASK_VdqWpsR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3288 BX_SMF void VCVTTPS2UQQ_VdqWpsR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3289 BX_SMF void VCVTTPS2UQQ_MASK_VdqWpsR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3290
3291 BX_SMF void VCVTPD2QQ_VdqWpdR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3292 BX_SMF void VCVTPD2QQ_MASK_VdqWpdR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3293 BX_SMF void VCVTTPD2QQ_VdqWpdR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3294 BX_SMF void VCVTTPD2QQ_MASK_VdqWpdR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3295 BX_SMF void VCVTPD2UQQ_VdqWpdR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3296 BX_SMF void VCVTPD2UQQ_MASK_VdqWpdR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3297 BX_SMF void VCVTTPD2UQQ_VdqWpdR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3298 BX_SMF void VCVTTPD2UQQ_MASK_VdqWpdR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3299
3300 BX_SMF void VCVTPD2PS_MASK_VpsWpdR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3301 BX_SMF void VCVTPS2PD_MASK_VpdWpsR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3302 BX_SMF void VCVTSS2SD_MASK_VsdWssR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3303 BX_SMF void VCVTSD2SS_MASK_VssWsdR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3304
3305 BX_SMF void VCVTPS2DQ_MASK_VdqWpsR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3306 BX_SMF void VCVTTPS2DQ_MASK_VdqWpsR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3307 BX_SMF void VCVTDQ2PS_MASK_VpsWdqR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3308
3309 BX_SMF void VCVTPD2DQ_MASK_VdqWpdR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3310 BX_SMF void VCVTTPD2DQ_MASK_VdqWpdR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3311 BX_SMF void VCVTDQ2PD_MASK_VpdWdqR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3312
3313 BX_SMF void VCVTPH2PS_MASK_VpsWpsR(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3314 BX_SMF void VCVTPS2PH_MASK_WpsVpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3315 BX_SMF void VCVTPS2PH_MASK_WpsVpsIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3316
3317 BX_SMF void VPABSB_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3318 BX_SMF void VPABSW_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3319 BX_SMF void VPABSD_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3320 BX_SMF void VPABSQ_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3321
3322 BX_SMF void VPADDD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3323 BX_SMF void VPSUBD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3324 BX_SMF void VPANDD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3325 BX_SMF void VPANDND_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3326 BX_SMF void VPORD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3327 BX_SMF void VPXORD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3328 BX_SMF void VPMAXSD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3329 BX_SMF void VPMAXUD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3330 BX_SMF void VPMINSD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3331 BX_SMF void VPMINUD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3332 BX_SMF void VPMULLD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3333 BX_SMF void VUNPCKLPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3334 BX_SMF void VUNPCKHPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3335 BX_SMF void VPSRAVD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3336 BX_SMF void VPSRLVD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3337 BX_SMF void VPSLLVD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3338 BX_SMF void VPROLVD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3339 BX_SMF void VPRORVD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3340 BX_SMF void VPSRLD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3341 BX_SMF void VPSRAD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3342 BX_SMF void VPSLLD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3343 BX_SMF void VPMADDWD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3344
3345 BX_SMF void VPADDQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3346 BX_SMF void VPSUBQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3347 BX_SMF void VPANDQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3348 BX_SMF void VPANDNQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3349 BX_SMF void VPORQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3350 BX_SMF void VPXORQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3351 BX_SMF void VPMAXSQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3352 BX_SMF void VPMAXUQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3353 BX_SMF void VPMINSQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3354 BX_SMF void VPMINUQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3355 BX_SMF void VPMULLQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3356 BX_SMF void VUNPCKLPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3357 BX_SMF void VUNPCKHPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3358 BX_SMF void VPMULDQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3359 BX_SMF void VPMULUDQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3360 BX_SMF void VPSRAVQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3361 BX_SMF void VPSRLVQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3362 BX_SMF void VPSLLVQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3363 BX_SMF void VPROLVQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3364 BX_SMF void VPRORVQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3365 BX_SMF void VPSRLQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3366 BX_SMF void VPSRAQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3367 BX_SMF void VPSLLQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3368
3369 BX_SMF void VPROLD_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3370 BX_SMF void VPROLQ_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3371 BX_SMF void VPRORD_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3372 BX_SMF void VPRORQ_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3373 BX_SMF void VPSRLW_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3374 BX_SMF void VPSRLD_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3375 BX_SMF void VPSRLQ_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3376 BX_SMF void VPSRAW_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3377 BX_SMF void VPSRAD_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3378 BX_SMF void VPSRAQ_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3379 BX_SMF void VPSLLW_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3380 BX_SMF void VPSLLD_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3381 BX_SMF void VPSLLQ_MASK_UdqIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3382
3383 BX_SMF void VPSUBB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3384 BX_SMF void VPSUBSB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3385 BX_SMF void VPSUBUSB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3386 BX_SMF void VPSUBW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3387 BX_SMF void VPSUBSW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3388 BX_SMF void VPSUBUSW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3389 BX_SMF void VPADDB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3390 BX_SMF void VPADDSB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3391 BX_SMF void VPADDUSB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3392 BX_SMF void VPADDW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3393 BX_SMF void VPADDSW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3394 BX_SMF void VPADDUSW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3395
3396 BX_SMF void VPMINSB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3397 BX_SMF void VPMINUB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3398 BX_SMF void VPMAXUB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3399 BX_SMF void VPMAXSB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3400 BX_SMF void VPMINSW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3401 BX_SMF void VPMINUW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3402 BX_SMF void VPMAXSW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3403 BX_SMF void VPMAXUW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3404
3405 BX_SMF void VPSRLW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3406 BX_SMF void VPSRAW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3407 BX_SMF void VPSLLW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3408
3409 BX_SMF void VPSRAVW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3410 BX_SMF void VPSRLVW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3411 BX_SMF void VPSLLVW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3412
3413 BX_SMF void VPAVGB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3414 BX_SMF void VPAVGW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3415 BX_SMF void VPMADDUBSW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3416 BX_SMF void VPMULLW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3417 BX_SMF void VPMULHW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3418 BX_SMF void VPMULHUW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3419 BX_SMF void VPMULHRSW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3420
3421 BX_SMF void VPACKSSWB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3422 BX_SMF void VPACKUSWB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3423 BX_SMF void VPACKSSDW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3424 BX_SMF void VPACKUSDW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3425
3426 BX_SMF void VPUNPCKLBW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3427 BX_SMF void VPUNPCKHBW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3428 BX_SMF void VPUNPCKLWD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3429 BX_SMF void VPUNPCKHWD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3430
3431 BX_SMF void VMOVAPS_MASK_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3432 BX_SMF void VMOVAPS_MASK_VpsWpsM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3433 BX_SMF void VMOVAPS_MASK_WpsVpsM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3434 BX_SMF void VMOVAPD_MASK_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3435 BX_SMF void VMOVAPD_MASK_VpdWpdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3436 BX_SMF void VMOVAPD_MASK_WpdVpdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3437
3438 BX_SMF void VMOVUPS_MASK_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3439 BX_SMF void VMOVUPS_MASK_VpsWpsM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3440 BX_SMF void VMOVUPS_MASK_WpsVpsM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3441 BX_SMF void VMOVUPD_MASK_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3442 BX_SMF void VMOVUPD_MASK_VpdWpdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3443 BX_SMF void VMOVUPD_MASK_WpdVpdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3444
3445 BX_SMF void VMOVDQU8_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3446 BX_SMF void VMOVDQU8_MASK_VdqWdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3447 BX_SMF void VMOVDQU8_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3448
3449 BX_SMF void VMOVDQU16_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3450 BX_SMF void VMOVDQU16_MASK_VdqWdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3451 BX_SMF void VMOVDQU16_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3452
3453 BX_SMF void VMOVSD_MASK_VsdWsdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3454 BX_SMF void VMOVSS_MASK_VssWssM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3455 BX_SMF void VMOVSD_MASK_WsdVsdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3456 BX_SMF void VMOVSS_MASK_WssVssM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3457 BX_SMF void VMOVSD_MASK_VsdHpdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3458 BX_SMF void VMOVSS_MASK_VssHpsWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3459
3460 BX_SMF void VMOVSHDUP_MASK_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3461 BX_SMF void VMOVSLDUP_MASK_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3462 BX_SMF void VMOVDDUP_MASK_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3463
3464 BX_SMF void VFMADDPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3465 BX_SMF void VFMADDPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3466 BX_SMF void VFMADDSD_MASK_VpdHsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3467 BX_SMF void VFMADDSS_MASK_VpsHssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3468 BX_SMF void VFMADDSUBPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3469 BX_SMF void VFMADDSUBPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3470 BX_SMF void VFMSUBADDPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3471 BX_SMF void VFMSUBADDPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3472 BX_SMF void VFMSUBPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3473 BX_SMF void VFMSUBPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3474 BX_SMF void VFMSUBSD_MASK_VpdHsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3475 BX_SMF void VFMSUBSS_MASK_VpsHssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3476 BX_SMF void VFNMADDPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3477 BX_SMF void VFNMADDPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3478 BX_SMF void VFNMADDSD_MASK_VpdHsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3479 BX_SMF void VFNMADDSS_MASK_VpsHssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3480 BX_SMF void VFNMSUBPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3481 BX_SMF void VFNMSUBPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3482 BX_SMF void VFNMSUBSD_MASK_VpdHsdWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3483 BX_SMF void VFNMSUBSS_MASK_VpsHssWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3484
3485 BX_SMF void VFIXUPIMMSS_MASK_VssHssWssIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3486 BX_SMF void VFIXUPIMMSD_MASK_VsdHsdWsdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3487 BX_SMF void VFIXUPIMMPS_VpsHpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3488 BX_SMF void VFIXUPIMMPD_VpdHpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3489 BX_SMF void VFIXUPIMMPS_MASK_VpsHpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3490 BX_SMF void VFIXUPIMMPD_MASK_VpdHpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3491
3492 BX_SMF void VBLENDMPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3493 BX_SMF void VBLENDMPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3494
3495 BX_SMF void VPBLENDMB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3496 BX_SMF void VPBLENDMW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3497
3498 BX_SMF void VPCMPB_MASK_KGqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3499 BX_SMF void VPCMPUB_MASK_KGqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3500 BX_SMF void VPCMPW_MASK_KGdHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3501 BX_SMF void VPCMPUW_MASK_KGdHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3502 BX_SMF void VPCMPD_MASK_KGwHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3503 BX_SMF void VPCMPUD_MASK_KGwHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3504 BX_SMF void VPCMPQ_MASK_KGbHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3505 BX_SMF void VPCMPUQ_MASK_KGbHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3506
3507 BX_SMF void VPCMPEQB_MASK_KGqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3508 BX_SMF void VPCMPGTB_MASK_KGqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3509 BX_SMF void VPCMPEQW_MASK_KGdHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3510 BX_SMF void VPCMPGTW_MASK_KGdHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3511 BX_SMF void VPCMPEQD_MASK_KGwHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3512 BX_SMF void VPCMPGTD_MASK_KGwHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3513 BX_SMF void VPCMPEQQ_MASK_KGbHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3514 BX_SMF void VPCMPGTQ_MASK_KGbHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3515
3516 BX_SMF void VPTESTMB_MASK_KGqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3517 BX_SMF void VPTESTNMB_MASK_KGqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3518 BX_SMF void VPTESTMW_MASK_KGdHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3519 BX_SMF void VPTESTNMW_MASK_KGdHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3520 BX_SMF void VPTESTMD_MASK_KGwHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3521 BX_SMF void VPTESTNMD_MASK_KGwHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3522 BX_SMF void VPTESTMQ_MASK_KGbHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3523 BX_SMF void VPTESTNMQ_MASK_KGbHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3524
3525 BX_SMF void VCMPPS_MASK_KGwHpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3526 BX_SMF void VCMPPD_MASK_KGbHpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3527 BX_SMF void VCMPSS_MASK_KGbHssWssIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3528 BX_SMF void VCMPSD_MASK_KGbHsdWsdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3529
3530 BX_SMF void VPSHUFB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3531
3532 BX_SMF void VPERMQ_MASK_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3533 BX_SMF void VSHUFPS_MASK_VpsHpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3534 BX_SMF void VSHUFPD_MASK_VpdHpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3535 BX_SMF void VPSHUFLW_MASK_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3536 BX_SMF void VPSHUFHW_MASK_VdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3537
3538 BX_SMF void VPERMILPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3539 BX_SMF void VPERMILPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3540 BX_SMF void VPERMILPS_MASK_VpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3541 BX_SMF void VPERMILPD_MASK_VpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3542
3543 BX_SMF void VSHUFF32x4_MASK_VpsHpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3544 BX_SMF void VSHUFF64x2_MASK_VpdHpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3545
3546 BX_SMF void VALIGND_MASK_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3547 BX_SMF void VALIGNQ_MASK_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3548
3549 BX_SMF void VPALIGNR_MASK_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3550 BX_SMF void VDBPSADBW_MASK_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3551
3552 BX_SMF void VPERMI2B_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3553 BX_SMF void VPERMI2W_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3554 BX_SMF void VPERMT2B_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3555 BX_SMF void VPERMT2W_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3556
3557 BX_SMF void VPERMI2PS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3558 BX_SMF void VPERMI2PD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3559 BX_SMF void VPERMT2PS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3560 BX_SMF void VPERMT2PD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3561
3562 BX_SMF void VPERMB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3563 BX_SMF void VPERMW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3564
3565 BX_SMF void VPERMPS_MASK_VpsHpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3566 BX_SMF void VPERMPD_MASK_VpdHpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3567
3568 BX_SMF void VINSERTF32x4_MASK_VpsHpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3569 BX_SMF void VINSERTF64x2_MASK_VpdHpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3570 BX_SMF void VINSERTF64x4_VpdHpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3571 BX_SMF void VINSERTF64x4_MASK_VpdHpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3572 BX_SMF void VINSERTF32x8_MASK_VpsHpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3573
3574 BX_SMF void VEXTRACTF32x4_MASK_WpsVpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3575 BX_SMF void VEXTRACTF32x4_MASK_WpsVpsIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3576
3577 BX_SMF void VEXTRACTF64x4_WpdVpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3578 BX_SMF void VEXTRACTF64x4_WpdVpdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3579 BX_SMF void VEXTRACTF64x4_MASK_WpdVpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3580 BX_SMF void VEXTRACTF64x4_MASK_WpdVpdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3581
3582 BX_SMF void VEXTRACTF32x8_MASK_WpsVpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3583 BX_SMF void VEXTRACTF32x8_MASK_WpsVpsIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3584 BX_SMF void VEXTRACTF64x2_MASK_WpdVpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3585 BX_SMF void VEXTRACTF64x2_MASK_WpdVpdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3586
3587 BX_SMF void VPBROADCASTB_MASK_VdqWbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3588 BX_SMF void VPBROADCASTW_MASK_VdqWwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3589 BX_SMF void VPBROADCASTD_MASK_VdqWdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3590 BX_SMF void VPBROADCASTQ_MASK_VdqWqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3591 BX_SMF void VPBROADCASTB_MASK_VdqWbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3592 BX_SMF void VPBROADCASTW_MASK_VdqWwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3593 BX_SMF void VPBROADCASTD_MASK_VdqWdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3594 BX_SMF void VPBROADCASTQ_MASK_VdqWqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3595
3596 BX_SMF void VPBROADCASTB_VdqEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3597 BX_SMF void VPBROADCASTW_VdqEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3598 BX_SMF void VPBROADCASTD_VdqEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3599 BX_SMF void VPBROADCASTQ_VdqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3600 BX_SMF void VPBROADCASTB_MASK_VdqEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3601 BX_SMF void VPBROADCASTW_MASK_VdqEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3602 BX_SMF void VPBROADCASTD_MASK_VdqEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3603 BX_SMF void VPBROADCASTQ_MASK_VdqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3604
3605 BX_SMF void VBROADCASTF32x2_MASK_VpsWqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3606 BX_SMF void VBROADCASTF32x2_MASK_VpsWqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3607
3608 BX_SMF void VBROADCASTF64x2_MASK_VpdMpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3609 BX_SMF void VBROADCASTF32x4_MASK_VpsMps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3610 BX_SMF void VBROADCASTF64x4_VpdMpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3611 BX_SMF void VBROADCASTF32x8_MASK_VpsMps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3612 BX_SMF void VBROADCASTF64x4_MASK_VpdMpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3613
3614 BX_SMF void VPTERNLOGD_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3615 BX_SMF void VPTERNLOGQ_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3616 BX_SMF void VPTERNLOGD_MASK_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3617 BX_SMF void VPTERNLOGQ_MASK_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3618
3619 BX_SMF void VGATHERDPS_MASK_VpsVSib(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3620 BX_SMF void VGATHERQPS_MASK_VpsVSib(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3621 BX_SMF void VGATHERDPD_MASK_VpdVSib(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3622 BX_SMF void VGATHERQPD_MASK_VpdVSib(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3623
3624 BX_SMF void VSCATTERDPS_MASK_VSibVps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3625 BX_SMF void VSCATTERQPS_MASK_VSibVps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3626 BX_SMF void VSCATTERDPD_MASK_VSibVpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3627 BX_SMF void VSCATTERQPD_MASK_VSibVpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3628
3629 BX_SMF void VCOMPRESSPS_MASK_WpsVps(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3630 BX_SMF void VCOMPRESSPD_MASK_WpdVpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3631 BX_SMF void VEXPANDPS_MASK_VpsWpsR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3632 BX_SMF void VEXPANDPD_MASK_VpdWpdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3633
3634 BX_SMF void VPCOMPRESSB_MASK_WdqVdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3635 BX_SMF void VPCOMPRESSW_MASK_WdqVdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3636 BX_SMF void VPEXPANDB_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3637 BX_SMF void VPEXPANDW_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3638
3639 BX_SMF void VPMOVQB_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3640 BX_SMF void VPMOVDB_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3641 BX_SMF void VPMOVWB_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3642 BX_SMF void VPMOVDW_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3643 BX_SMF void VPMOVQW_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3644 BX_SMF void VPMOVQD_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3645
3646 BX_SMF void VPMOVQB_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3647 BX_SMF void VPMOVDB_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3648 BX_SMF void VPMOVWB_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3649 BX_SMF void VPMOVDW_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3650 BX_SMF void VPMOVQW_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3651 BX_SMF void VPMOVQD_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3652
3653 BX_SMF void VPMOVQB_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3654 BX_SMF void VPMOVDB_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3655 BX_SMF void VPMOVWB_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3656 BX_SMF void VPMOVDW_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3657 BX_SMF void VPMOVQW_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3658 BX_SMF void VPMOVQD_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3659
3660 BX_SMF void VPMOVUSQB_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3661 BX_SMF void VPMOVUSDB_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3662 BX_SMF void VPMOVUSWB_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3663 BX_SMF void VPMOVUSDW_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3664 BX_SMF void VPMOVUSQW_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3665 BX_SMF void VPMOVUSQD_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3666
3667 BX_SMF void VPMOVUSQB_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3668 BX_SMF void VPMOVUSDB_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3669 BX_SMF void VPMOVUSWB_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3670 BX_SMF void VPMOVUSDW_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3671 BX_SMF void VPMOVUSQW_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3672 BX_SMF void VPMOVUSQD_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3673
3674 BX_SMF void VPMOVUSQB_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3675 BX_SMF void VPMOVUSDB_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3676 BX_SMF void VPMOVUSWB_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3677 BX_SMF void VPMOVUSDW_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3678 BX_SMF void VPMOVUSQW_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3679 BX_SMF void VPMOVUSQD_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3680
3681 BX_SMF void VPMOVSQB_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3682 BX_SMF void VPMOVSDB_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3683 BX_SMF void VPMOVSWB_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3684 BX_SMF void VPMOVSDW_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3685 BX_SMF void VPMOVSQW_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3686 BX_SMF void VPMOVSQD_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3687
3688 BX_SMF void VPMOVSQB_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3689 BX_SMF void VPMOVSDB_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3690 BX_SMF void VPMOVSWB_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3691 BX_SMF void VPMOVSDW_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3692 BX_SMF void VPMOVSQW_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3693 BX_SMF void VPMOVSQD_MASK_WdqVdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3694
3695 BX_SMF void VPMOVSQB_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3696 BX_SMF void VPMOVSDB_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3697 BX_SMF void VPMOVSWB_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3698 BX_SMF void VPMOVSDW_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3699 BX_SMF void VPMOVSQW_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3700 BX_SMF void VPMOVSQD_MASK_WdqVdqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3701
3702 BX_SMF void VPMOVSXBW_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3703 BX_SMF void VPMOVSXBD_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3704 BX_SMF void VPMOVSXBQ_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3705 BX_SMF void VPMOVSXWD_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3706 BX_SMF void VPMOVSXWQ_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3707 BX_SMF void VPMOVSXDQ_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3708
3709 BX_SMF void VPMOVZXBW_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3710 BX_SMF void VPMOVZXBD_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3711 BX_SMF void VPMOVZXBQ_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3712 BX_SMF void VPMOVZXWD_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3713 BX_SMF void VPMOVZXWQ_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3714 BX_SMF void VPMOVZXDQ_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3715
3716 BX_SMF void VPCONFLICTD_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3717 BX_SMF void VPCONFLICTQ_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3718
3719 BX_SMF void VPLZCNTD_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3720 BX_SMF void VPLZCNTQ_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3721
3722 BX_SMF void VPOPCNTB_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3723 BX_SMF void VPOPCNTW_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3724 BX_SMF void VPOPCNTD_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3725 BX_SMF void VPOPCNTQ_MASK_VdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3726
3727 BX_SMF void VPSHUFBITQMB_MASK_KGqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3728
3729 BX_SMF void VP2INTERSECTD_KGqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3730 BX_SMF void VP2INTERSECTQ_KGqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3731
3732 BX_SMF void VPBROADCASTMB2Q_VdqKEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3733 BX_SMF void VPBROADCASTMW2D_VdqKEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3734
3735 BX_SMF void VPMOVM2B_VdqKEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3736 BX_SMF void VPMOVM2W_VdqKEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3737 BX_SMF void VPMOVM2D_VdqKEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3738 BX_SMF void VPMOVM2Q_VdqKEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3739
3740 BX_SMF void VPMOVB2M_KGqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3741 BX_SMF void VPMOVW2M_KGdWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3742 BX_SMF void VPMOVD2M_KGwWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3743 BX_SMF void VPMOVQ2M_KGbWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3744
3745 BX_SMF void VPMADD52LUQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3746 BX_SMF void VPMADD52LUQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3747 BX_SMF void VPMADD52HUQ_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3748 BX_SMF void VPMADD52HUQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3749
3750 BX_SMF void VPMULTISHIFTQB_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3751 BX_SMF void VPMULTISHIFTQB_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3752
3753 BX_SMF void VPDPBUSD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3754 BX_SMF void VPDPBUSDS_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3755 BX_SMF void VPDPWSSD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3756 BX_SMF void VPDPWSSDS_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3757
3758 BX_SMF void VPSHLDW_MASK_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3759 BX_SMF void VPSHLDVW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3760 BX_SMF void VPSHLDD_MASK_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3761 BX_SMF void VPSHLDVD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3762 BX_SMF void VPSHLDQ_MASK_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3763 BX_SMF void VPSHLDVQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3764
3765 BX_SMF void VPSHRDW_MASK_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3766 BX_SMF void VPSHRDVW_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3767 BX_SMF void VPSHRDD_MASK_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3768 BX_SMF void VPSHRDVD_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3769 BX_SMF void VPSHRDQ_MASK_VdqHdqWdqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3770 BX_SMF void VPSHRDVQ_MASK_VdqHdqWdqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3771 #endif
3772
3773 BX_SMF void LZCNT_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3774 BX_SMF void LZCNT_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3775 #if BX_SUPPORT_X86_64
3776 BX_SMF void LZCNT_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3777 #endif
3778
3779 /* BMI - TZCNT */
3780 BX_SMF void TZCNT_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3781 BX_SMF void TZCNT_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3782 #if BX_SUPPORT_X86_64
3783 BX_SMF void TZCNT_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3784 #endif
3785 /* BMI - TZCNT */
3786
3787 /* SSE4A */
3788 BX_SMF void EXTRQ_UdqIbIb(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3789 BX_SMF void EXTRQ_VdqUq(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3790 BX_SMF void INSERTQ_VdqUqIbIb(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3791 BX_SMF void INSERTQ_VdqUdq(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
3792 /* SSE4A */
3793
3794 BX_SMF void CMPXCHG8B(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3795 BX_SMF void RETnear32_Iw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3796 BX_SMF void RETnear16_Iw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3797 BX_SMF void RETfar32_Iw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3798 BX_SMF void RETfar16_Iw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3799
3800 BX_SMF void XADD_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3801 BX_SMF void XADD_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3802 BX_SMF void XADD_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3803
3804 BX_SMF void XADD_EbGbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3805 BX_SMF void XADD_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3806 BX_SMF void XADD_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3807
3808 BX_SMF void CMOVO_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3809 BX_SMF void CMOVNO_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3810 BX_SMF void CMOVB_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3811 BX_SMF void CMOVNB_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3812 BX_SMF void CMOVZ_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3813 BX_SMF void CMOVNZ_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3814 BX_SMF void CMOVBE_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3815 BX_SMF void CMOVNBE_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3816 BX_SMF void CMOVS_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3817 BX_SMF void CMOVNS_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3818 BX_SMF void CMOVP_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3819 BX_SMF void CMOVNP_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3820 BX_SMF void CMOVL_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3821 BX_SMF void CMOVNL_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3822 BX_SMF void CMOVLE_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3823 BX_SMF void CMOVNLE_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3824
3825 BX_SMF void CMOVO_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3826 BX_SMF void CMOVNO_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3827 BX_SMF void CMOVB_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3828 BX_SMF void CMOVNB_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3829 BX_SMF void CMOVZ_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3830 BX_SMF void CMOVNZ_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3831 BX_SMF void CMOVBE_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3832 BX_SMF void CMOVNBE_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3833 BX_SMF void CMOVS_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3834 BX_SMF void CMOVNS_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3835 BX_SMF void CMOVP_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3836 BX_SMF void CMOVNP_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3837 BX_SMF void CMOVL_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3838 BX_SMF void CMOVNL_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3839 BX_SMF void CMOVLE_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3840 BX_SMF void CMOVNLE_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3841
3842 BX_SMF void CWDE(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3843 BX_SMF void CDQ(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3844
3845 BX_SMF void CMPXCHG_EbGbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3846 BX_SMF void CMPXCHG_EwGwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3847 BX_SMF void CMPXCHG_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3848
3849 BX_SMF void CMPXCHG_EbGbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3850 BX_SMF void CMPXCHG_EwGwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3851 BX_SMF void CMPXCHG_EdGdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3852
3853 BX_SMF void MUL_AXEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3854 BX_SMF void IMUL_AXEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3855 BX_SMF void DIV_AXEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3856 BX_SMF void IDIV_AXEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3857 BX_SMF void IMUL_GwEwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3858 BX_SMF void IMUL_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3859
3860 BX_SMF void NOP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3861 BX_SMF void PAUSE(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3862 BX_SMF void MOV_EbIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3863 BX_SMF void MOV_EwIwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3864 BX_SMF void MOV_EdIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3865
3866 BX_SMF void PUSH_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3867 BX_SMF void PUSH_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3868 BX_SMF void PUSH_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3869 BX_SMF void PUSH_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3870
3871 BX_SMF void POP_EwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3872 BX_SMF void POP_EwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3873 BX_SMF void POP_EdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3874 BX_SMF void POP_EdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3875
3876 BX_SMF void POPCNT_GwEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3877 BX_SMF void POPCNT_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3878 #if BX_SUPPORT_X86_64
3879 BX_SMF void POPCNT_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3880 #endif
3881
3882 BX_SMF void ADCX_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3883 BX_SMF void ADOX_GdEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3884 #if BX_SUPPORT_X86_64
3885 BX_SMF void ADCX_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3886 BX_SMF void ADOX_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3887 #endif
3888
3889 // SMAP
3890 BX_SMF void CLAC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3891 BX_SMF void STAC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3892 // SMAP
3893
3894 // RDRAND/RDSEED
3895 BX_SMF void RDRAND_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3896 BX_SMF void RDRAND_Ed(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3897 #if BX_SUPPORT_X86_64
3898 BX_SMF void RDRAND_Eq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3899 #endif
3900
3901 BX_SMF void RDSEED_Ew(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3902 BX_SMF void RDSEED_Ed(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3903 #if BX_SUPPORT_X86_64
3904 BX_SMF void RDSEED_Eq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3905 #endif
3906
3907 #if BX_SUPPORT_X86_64
3908 // 64 bit extensions
3909 BX_SMF void ADD_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3910 BX_SMF void OR_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3911 BX_SMF void ADC_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3912 BX_SMF void SBB_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3913 BX_SMF void AND_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3914 BX_SMF void SUB_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3915 BX_SMF void XOR_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3916 BX_SMF void CMP_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3917
3918 BX_SMF void ADD_GqEqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3919 BX_SMF void OR_GqEqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3920 BX_SMF void ADC_GqEqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3921 BX_SMF void SBB_GqEqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3922 BX_SMF void AND_GqEqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3923 BX_SMF void SUB_GqEqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3924 BX_SMF void XOR_GqEqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3925 BX_SMF void CMP_GqEqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3926
3927 BX_SMF void ADD_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3928 BX_SMF void OR_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3929 BX_SMF void ADC_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3930 BX_SMF void SBB_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3931 BX_SMF void AND_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3932 BX_SMF void SUB_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3933 BX_SMF void XOR_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3934 BX_SMF void CMP_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3935
3936 BX_SMF void ADD_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3937 BX_SMF void OR_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3938 BX_SMF void ADC_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3939 BX_SMF void SBB_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3940 BX_SMF void AND_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3941 BX_SMF void SUB_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3942 BX_SMF void XOR_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3943 BX_SMF void CMP_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3944
3945 BX_SMF void ADD_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3946 BX_SMF void OR_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3947 BX_SMF void ADC_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3948 BX_SMF void SBB_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3949 BX_SMF void AND_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3950 BX_SMF void SUB_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3951 BX_SMF void XOR_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3952 BX_SMF void CMP_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3953
3954 BX_SMF void TEST_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3955 BX_SMF void TEST_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3956 BX_SMF void TEST_RAXId(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3957
3958 BX_SMF void XCHG_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3959 BX_SMF void XCHG_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3960
3961 BX_SMF void LEA_GqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3962
3963 BX_SMF void MOV_RAXOq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3964 BX_SMF void MOV_OqRAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3965 BX_SMF void MOV_EAXOq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3966 BX_SMF void MOV_OqEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3967 BX_SMF void MOV_AXOq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3968 BX_SMF void MOV_OqAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3969 BX_SMF void MOV_ALOq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3970 BX_SMF void MOV_OqAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3971
3972 BX_SMF void MOV_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3973 BX_SMF void MOV_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3974 BX_SMF void MOV_GqEqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3975 BX_SMF void MOV_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3976 BX_SMF void MOV_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3977
3978 BX_SMF void MOV64S_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3979 BX_SMF void MOV64S_GqEqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3980
3981 // repeatable instructions
3982 BX_SMF void REP_MOVSQ_YqXq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3983 BX_SMF void REP_CMPSQ_XqYq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3984 BX_SMF void REP_STOSQ_YqRAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3985 BX_SMF void REP_LODSQ_RAXXq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3986 BX_SMF void REP_SCASQ_RAXYq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3987
3988 // qualified by address size
3989 BX_SMF void CMPSB64_XbYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3990 BX_SMF void CMPSW64_XwYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3991 BX_SMF void CMPSD64_XdYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3992 BX_SMF void SCASB64_ALYb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3993 BX_SMF void SCASW64_AXYw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3994 BX_SMF void SCASD64_EAXYd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3995 BX_SMF void LODSB64_ALXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3996 BX_SMF void LODSW64_AXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3997 BX_SMF void LODSD64_EAXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3998 BX_SMF void STOSB64_YbAL(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
3999 BX_SMF void STOSW64_YwAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4000 BX_SMF void STOSD64_YdEAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4001 BX_SMF void MOVSB64_YbXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4002 BX_SMF void MOVSW64_YwXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4003 BX_SMF void MOVSD64_YdXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4004
4005 BX_SMF void CMPSQ32_XqYq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4006 BX_SMF void CMPSQ64_XqYq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4007 BX_SMF void SCASQ32_RAXYq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4008 BX_SMF void SCASQ64_RAXYq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4009 BX_SMF void LODSQ32_RAXXq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4010 BX_SMF void LODSQ64_RAXXq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4011 BX_SMF void STOSQ32_YqRAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4012 BX_SMF void STOSQ64_YqRAX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4013 BX_SMF void MOVSQ32_YqXq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4014 BX_SMF void MOVSQ64_YqXq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4015
4016 BX_SMF void INSB64_YbDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4017 BX_SMF void INSW64_YwDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4018 BX_SMF void INSD64_YdDX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4019
4020 BX_SMF void OUTSB64_DXXb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4021 BX_SMF void OUTSW64_DXXw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4022 BX_SMF void OUTSD64_DXXd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4023
4024 BX_SMF void CALL_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4025 BX_SMF void JMP_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4026
4027 BX_SMF void JO_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4028 BX_SMF void JNO_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4029 BX_SMF void JB_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4030 BX_SMF void JNB_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4031 BX_SMF void JZ_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4032 BX_SMF void JNZ_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4033 BX_SMF void JBE_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4034 BX_SMF void JNBE_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4035 BX_SMF void JS_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4036 BX_SMF void JNS_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4037 BX_SMF void JP_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4038 BX_SMF void JNP_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4039 BX_SMF void JL_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4040 BX_SMF void JNL_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4041 BX_SMF void JLE_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4042 BX_SMF void JNLE_Jq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4043
4044 BX_SMF void ENTER64_IwIb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4045 BX_SMF void LEAVE64(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4046 BX_SMF void IRET64(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4047
4048 BX_SMF void MOV_CR0Rq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4049 BX_SMF void MOV_CR2Rq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4050 BX_SMF void MOV_CR3Rq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4051 BX_SMF void MOV_CR4Rq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4052 BX_SMF void MOV_RqCR0(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4053 BX_SMF void MOV_RqCR2(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4054 BX_SMF void MOV_RqCR3(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4055 BX_SMF void MOV_RqCR4(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4056 BX_SMF void MOV_DqRq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4057 BX_SMF void MOV_RqDq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4058
4059 BX_SMF void SHLD_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4060 BX_SMF void SHLD_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4061 BX_SMF void SHRD_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4062 BX_SMF void SHRD_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4063
4064 BX_SMF void MOV64_GdEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4065 BX_SMF void MOV64_EdGdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4066
4067 BX_SMF void MOVZX_GqEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4068 BX_SMF void MOVZX_GqEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4069 BX_SMF void MOVSX_GqEbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4070 BX_SMF void MOVSX_GqEwM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4071 BX_SMF void MOVSX_GqEdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4072
4073 BX_SMF void MOVZX_GqEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4074 BX_SMF void MOVZX_GqEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4075 BX_SMF void MOVSX_GqEbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4076 BX_SMF void MOVSX_GqEwR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4077 BX_SMF void MOVSX_GqEdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4078
4079 BX_SMF void BSF_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4080 BX_SMF void BSR_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4081
4082 BX_SMF void BT_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4083 BX_SMF void BTS_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4084 BX_SMF void BTR_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4085 BX_SMF void BTC_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4086
4087 BX_SMF void BT_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4088 BX_SMF void BTS_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4089 BX_SMF void BTR_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4090 BX_SMF void BTC_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4091
4092 BX_SMF void BT_EqIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4093 BX_SMF void BTS_EqIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4094 BX_SMF void BTR_EqIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4095 BX_SMF void BTC_EqIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4096
4097 BX_SMF void BT_EqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4098 BX_SMF void BTS_EqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4099 BX_SMF void BTR_EqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4100 BX_SMF void BTC_EqIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4101
4102 BX_SMF void BSWAP_RRX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4103
4104 BX_SMF void ROL_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4105 BX_SMF void ROR_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4106 BX_SMF void RCL_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4107 BX_SMF void RCR_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4108 BX_SMF void SHL_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4109 BX_SMF void SHR_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4110 BX_SMF void SAR_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4111
4112 BX_SMF void ROL_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4113 BX_SMF void ROR_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4114 BX_SMF void RCL_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4115 BX_SMF void RCR_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4116 BX_SMF void SHL_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4117 BX_SMF void SHR_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4118 BX_SMF void SAR_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4119
4120 BX_SMF void NOT_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4121 BX_SMF void NEG_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4122 BX_SMF void NOT_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4123 BX_SMF void NEG_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4124
4125 BX_SMF void TEST_EqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4126 BX_SMF void TEST_EqIdM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4127
4128 BX_SMF void MUL_RAXEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4129 BX_SMF void IMUL_RAXEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4130 BX_SMF void DIV_RAXEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4131 BX_SMF void IDIV_RAXEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4132 BX_SMF void IMUL_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4133 BX_SMF void IMUL_GqEqIdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4134
4135 BX_SMF void INC_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4136 BX_SMF void DEC_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4137 BX_SMF void INC_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4138 BX_SMF void DEC_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4139 BX_SMF void CALL_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4140 BX_SMF void CALL64_Ep(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4141 BX_SMF void JMP_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4142 BX_SMF void JMP64_Ep(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4143 BX_SMF void PUSHF_Fq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4144 BX_SMF void POPF_Fq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4145
4146 BX_SMF void CMPXCHG_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4147 BX_SMF void CMPXCHG_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4148
4149 BX_SMF void CDQE(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4150 BX_SMF void CQO(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4151
4152 BX_SMF void XADD_EqGqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4153 BX_SMF void XADD_EqGqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4154
4155 BX_SMF void RETnear64_Iw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4156 BX_SMF void RETfar64_Iw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4157
4158 BX_SMF void CMOVO_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4159 BX_SMF void CMOVNO_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4160 BX_SMF void CMOVB_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4161 BX_SMF void CMOVNB_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4162 BX_SMF void CMOVZ_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4163 BX_SMF void CMOVNZ_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4164 BX_SMF void CMOVBE_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4165 BX_SMF void CMOVNBE_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4166 BX_SMF void CMOVS_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4167 BX_SMF void CMOVNS_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4168 BX_SMF void CMOVP_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4169 BX_SMF void CMOVNP_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4170 BX_SMF void CMOVL_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4171 BX_SMF void CMOVNL_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4172 BX_SMF void CMOVLE_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4173 BX_SMF void CMOVNLE_GqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4174
4175 BX_SMF void MOV_RRXIq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4176 BX_SMF void PUSH_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4177 BX_SMF void PUSH_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4178 BX_SMF void POP_EqM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4179 BX_SMF void POP_EqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4180
4181 BX_SMF void PUSH64_Id(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4182 BX_SMF void PUSH64_Sw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4183 BX_SMF void POP64_Sw(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4184
4185 BX_SMF void LSS_GqMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4186 BX_SMF void LFS_GqMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4187 BX_SMF void LGS_GqMp(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4188
4189 BX_SMF void SGDT64_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4190 BX_SMF void SIDT64_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4191 BX_SMF void LGDT64_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4192 BX_SMF void LIDT64_Ms(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4193
4194 BX_SMF void CMPXCHG16B(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4195
4196 BX_SMF void SWAPGS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4197 BX_SMF void RDFSBASE_Ed(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4198 BX_SMF void RDGSBASE_Ed(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4199 BX_SMF void RDFSBASE_Eq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4200 BX_SMF void RDGSBASE_Eq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4201 BX_SMF void WRFSBASE_Ed(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4202 BX_SMF void WRGSBASE_Ed(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4203 BX_SMF void WRFSBASE_Eq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4204 BX_SMF void WRGSBASE_Eq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4205
4206 BX_SMF void LOOPNE64_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4207 BX_SMF void LOOPE64_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4208 BX_SMF void LOOP64_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4209 BX_SMF void JRCXZ_Jb(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4210
4211 BX_SMF void MOVQ_EqPqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4212 BX_SMF void MOVQ_EqVqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4213 BX_SMF void MOVQ_PqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4214 BX_SMF void MOVQ_VdqEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4215
4216 BX_SMF void CVTSI2SS_VssEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4217 BX_SMF void CVTSI2SD_VsdEqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4218 BX_SMF void CVTTSD2SI_GqWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4219 BX_SMF void CVTTSS2SI_GqWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4220 BX_SMF void CVTSD2SI_GqWsdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4221 BX_SMF void CVTSS2SI_GqWssR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4222 #endif // #if BX_SUPPORT_X86_64
4223
4224 BX_SMF void RDTSCP(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4225
4226 BX_SMF void INVLPG(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4227 BX_SMF void RSM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4228
4229 BX_SMF void WRMSR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4230 BX_SMF void RDTSC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4231 BX_SMF void RDPMC(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4232 BX_SMF void RDMSR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4233 BX_SMF void SYSENTER(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4234 BX_SMF void SYSEXIT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4235
4236 BX_SMF void MONITOR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4237 BX_SMF void MWAIT(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4238
4239 #if BX_SUPPORT_PKEYS
4240 BX_SMF void RDPKRU(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4241 BX_SMF void WRPKRU(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4242 #endif
4243
4244 BX_SMF void RDPID_Ed(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4245
4246 BX_SMF void UndefinedOpcode(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4247 BX_SMF void BxError(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4248 #if BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS
4249 BX_SMF void BxEndTrace(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4250 #endif
4251
4252 #if BX_CPU_LEVEL >= 6
4253 BX_SMF void BxNoSSE(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4254 #if BX_SUPPORT_AVX
4255 BX_SMF void BxNoAVX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4256 #endif
4257 #if BX_SUPPORT_EVEX
4258 BX_SMF void BxNoOpMask(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4259 BX_SMF void BxNoEVEX(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4260 #endif
4261 #endif
4262
4263 BX_CPP_INLINE BX_SMF Bit32u BxResolve32(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4264 #if BX_SUPPORT_X86_64
4265 BX_CPP_INLINE BX_SMF Bit64u BxResolve64(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4266 #endif
4267 #if BX_SUPPORT_AVX
4268 BX_SMF bx_address BxResolveGatherD(bxInstruction_c *, unsigned) BX_CPP_AttrRegparmN(2);
4269 BX_SMF bx_address BxResolveGatherQ(bxInstruction_c *, unsigned) BX_CPP_AttrRegparmN(2);
4270 #endif
4271 // <TAG-CLASS-CPU-END>
4272
4273 #if BX_DEBUGGER
4274 BX_SMF void dbg_take_dma(void);
4275 BX_SMF bool dbg_set_eflags(Bit32u val);
4276 BX_SMF void dbg_set_eip(bx_address val);
4277 BX_SMF bool dbg_get_sreg(bx_dbg_sreg_t *sreg, unsigned sreg_no);
4278 BX_SMF bool dbg_set_sreg(unsigned sreg_no, bx_segment_reg_t *sreg);
4279 BX_SMF void dbg_get_tr(bx_dbg_sreg_t *sreg);
4280 BX_SMF void dbg_get_ldtr(bx_dbg_sreg_t *sreg);
4281 BX_SMF void dbg_get_gdtr(bx_dbg_global_sreg_t *sreg);
4282 BX_SMF void dbg_get_idtr(bx_dbg_global_sreg_t *sreg);
4283 BX_SMF unsigned dbg_query_pending(void);
4284 #endif
4285 #if BX_DEBUGGER || BX_GDBSTUB
4286 BX_SMF bool dbg_instruction_epilog(void);
4287 #endif
4288 BX_SMF bool dbg_xlate_linear2phy(bx_address linear, bx_phy_address *phy, bx_address *lpf_mask = 0, bool verbose = 0);
4289 #if BX_SUPPORT_VMX >= 2
4290 BX_SMF bool dbg_translate_guest_physical(bx_phy_address guest_paddr, bx_phy_address *phy, bool verbose = 0);
4291 #endif
4292 #if BX_LARGE_RAMFILE
4293 BX_SMF bool check_addr_in_tlb_buffers(const Bit8u *addr, const Bit8u *end);
4294 #endif
4295 BX_SMF void atexit(void);
4296
4297 // now for some ancillary functions...
4298 BX_SMF void cpu_loop(void);
4299 #if BX_SUPPORT_SMP
4300 BX_SMF void cpu_run_trace(void);
4301 #endif
4302 BX_SMF bool handleAsyncEvent(void);
4303 BX_SMF bool handleWaitForEvent(void);
4304 BX_SMF void InterruptAcknowledge(void);
4305
4306 BX_SMF void boundaryFetch(const Bit8u *fetchPtr, unsigned remainingInPage, bxInstruction_c *);
4307
4308 BX_SMF bxICacheEntry_c *serveICacheMiss(Bit32u eipBiased, bx_phy_address pAddr);
4309 BX_SMF bxICacheEntry_c* getICacheEntry(void);
4310 BX_SMF bool mergeTraces(bxICacheEntry_c *entry, bxInstruction_c *i, bx_phy_address pAddr);
4311 #if BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS && BX_ENABLE_TRACE_LINKING
4312 BX_SMF void linkTrace(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
4313 #endif
4314 BX_SMF void prefetch(void);
4315 BX_SMF void updateFetchModeMask(void);
invalidate_prefetch_q(void)4316 BX_SMF BX_CPP_INLINE void invalidate_prefetch_q(void)
4317 {
4318 BX_CPU_THIS_PTR eipPageWindowSize = 0;
4319 }
4320
invalidate_stack_cache(void)4321 BX_SMF BX_CPP_INLINE void invalidate_stack_cache(void)
4322 {
4323 BX_CPU_THIS_PTR espPageWindowSize = 0;
4324 }
4325
4326 BX_SMF bool write_virtual_checks(bx_segment_reg_t *seg, Bit32u offset, unsigned len, bool align = false) BX_CPP_AttrRegparmN(4);
4327 BX_SMF bool read_virtual_checks(bx_segment_reg_t *seg, Bit32u offset, unsigned len, bool align = false) BX_CPP_AttrRegparmN(4);
4328 BX_SMF bool execute_virtual_checks(bx_segment_reg_t *seg, Bit32u offset, unsigned len) BX_CPP_AttrRegparmN(3);
4329
4330 BX_SMF Bit8u read_linear_byte(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4331 BX_SMF Bit16u read_linear_word(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4332 BX_SMF Bit32u read_linear_dword(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4333 BX_SMF Bit64u read_linear_qword(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4334 #if BX_CPU_LEVEL >= 6
4335 BX_SMF void read_linear_xmmword(unsigned seg, bx_address off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
4336 BX_SMF void read_linear_xmmword_aligned(unsigned seg, bx_address off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
4337 BX_SMF void read_linear_ymmword(unsigned seg, bx_address off, BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
4338 BX_SMF void read_linear_ymmword_aligned(unsigned seg, bx_address off, BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
4339 BX_SMF void read_linear_zmmword(unsigned seg, bx_address off, BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
4340 BX_SMF void read_linear_zmmword_aligned(unsigned seg, bx_address off, BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
4341 #endif
4342
4343 BX_SMF void write_linear_byte(unsigned seg, bx_address offset, Bit8u data) BX_CPP_AttrRegparmN(3);
4344 BX_SMF void write_linear_word(unsigned seg, bx_address offset, Bit16u data) BX_CPP_AttrRegparmN(3);
4345 BX_SMF void write_linear_dword(unsigned seg, bx_address offset, Bit32u data) BX_CPP_AttrRegparmN(3);
4346 BX_SMF void write_linear_qword(unsigned seg, bx_address offset, Bit64u data) BX_CPP_AttrRegparmN(3);
4347 #if BX_CPU_LEVEL >= 6
4348 BX_SMF void write_linear_xmmword(unsigned seg, bx_address offset, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
4349 BX_SMF void write_linear_xmmword_aligned(unsigned seg, bx_address offset, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
4350 BX_SMF void write_linear_ymmword(unsigned seg, bx_address off, const BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
4351 BX_SMF void write_linear_ymmword_aligned(unsigned seg, bx_address off, const BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
4352 BX_SMF void write_linear_zmmword(unsigned seg, bx_address off, const BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
4353 BX_SMF void write_linear_zmmword_aligned(unsigned seg, bx_address off, const BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
4354 #endif
4355
4356 BX_SMF void tickle_read_linear(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4357 BX_SMF void tickle_read_virtual_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
4358 BX_SMF void tickle_read_virtual(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4359
4360 BX_SMF Bit8u read_virtual_byte_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
4361 BX_SMF Bit16u read_virtual_word_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
4362 BX_SMF Bit32u read_virtual_dword_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
4363 BX_SMF Bit64u read_virtual_qword_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
4364 #if BX_CPU_LEVEL >= 6
4365 BX_SMF void read_virtual_xmmword_32(unsigned seg, Bit32u off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
4366 BX_SMF void read_virtual_xmmword_aligned_32(unsigned seg, Bit32u off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
4367 BX_SMF void read_virtual_ymmword_32(unsigned seg, Bit32u off, BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
4368 BX_SMF void read_virtual_ymmword_aligned_32(unsigned seg, Bit32u off, BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
4369 BX_SMF void read_virtual_zmmword_32(unsigned seg, Bit32u off, BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
4370 BX_SMF void read_virtual_zmmword_aligned_32(unsigned seg, Bit32u off, BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
4371 #endif
4372
4373 BX_SMF void write_virtual_byte_32(unsigned seg, Bit32u offset, Bit8u data) BX_CPP_AttrRegparmN(3);
4374 BX_SMF void write_virtual_word_32(unsigned seg, Bit32u offset, Bit16u data) BX_CPP_AttrRegparmN(3);
4375 BX_SMF void write_virtual_dword_32(unsigned seg, Bit32u offset, Bit32u data) BX_CPP_AttrRegparmN(3);
4376 BX_SMF void write_virtual_qword_32(unsigned seg, Bit32u offset, Bit64u data) BX_CPP_AttrRegparmN(3);
4377 #if BX_CPU_LEVEL >= 6
4378 BX_SMF void write_virtual_xmmword_32(unsigned seg, Bit32u offset, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
4379 BX_SMF void write_virtual_xmmword_aligned_32(unsigned seg, Bit32u offset, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
4380 BX_SMF void write_virtual_ymmword_32(unsigned seg, Bit32u off, const BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
4381 BX_SMF void write_virtual_ymmword_aligned_32(unsigned seg, Bit32u off, const BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
4382 BX_SMF void write_virtual_zmmword_32(unsigned seg, Bit32u off, const BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
4383 BX_SMF void write_virtual_zmmword_aligned_32(unsigned seg, Bit32u off, const BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
4384 #endif
4385
4386 BX_SMF Bit8u read_virtual_byte(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4387 BX_SMF Bit16u read_virtual_word(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4388 BX_SMF Bit32u read_virtual_dword(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4389 BX_SMF Bit64u read_virtual_qword(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4390 #if BX_CPU_LEVEL >= 6
4391 BX_SMF void read_virtual_xmmword(unsigned seg, bx_address off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
4392 BX_SMF void read_virtual_xmmword_aligned(unsigned seg, bx_address off, BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
4393 BX_SMF void read_virtual_ymmword(unsigned seg, bx_address off, BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
4394 BX_SMF void read_virtual_ymmword_aligned(unsigned seg, bx_address off, BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
4395 BX_SMF void read_virtual_zmmword(unsigned seg, bx_address off, BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
4396 BX_SMF void read_virtual_zmmword_aligned(unsigned seg, bx_address off, BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
4397 #endif
4398
4399 BX_SMF void write_virtual_byte(unsigned seg, bx_address offset, Bit8u data) BX_CPP_AttrRegparmN(3);
4400 BX_SMF void write_virtual_word(unsigned seg, bx_address offset, Bit16u data) BX_CPP_AttrRegparmN(3);
4401 BX_SMF void write_virtual_dword(unsigned seg, bx_address offset, Bit32u data) BX_CPP_AttrRegparmN(3);
4402 BX_SMF void write_virtual_qword(unsigned seg, bx_address offset, Bit64u data) BX_CPP_AttrRegparmN(3);
4403 #if BX_CPU_LEVEL >= 6
4404 BX_SMF void write_virtual_xmmword(unsigned seg, bx_address offset, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
4405 BX_SMF void write_virtual_xmmword_aligned(unsigned seg, bx_address offset, const BxPackedXmmRegister *data) BX_CPP_AttrRegparmN(3);
4406 BX_SMF void write_virtual_ymmword(unsigned seg, bx_address off, const BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
4407 BX_SMF void write_virtual_ymmword_aligned(unsigned seg, bx_address off, const BxPackedYmmRegister *data) BX_CPP_AttrRegparmN(3);
4408 BX_SMF void write_virtual_zmmword(unsigned seg, bx_address off, const BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
4409 BX_SMF void write_virtual_zmmword_aligned(unsigned seg, bx_address off, const BxPackedZmmRegister *data) BX_CPP_AttrRegparmN(3);
4410 #endif
4411
4412 BX_SMF Bit8u read_RMW_linear_byte(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4413 BX_SMF Bit16u read_RMW_linear_word(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4414 BX_SMF Bit32u read_RMW_linear_dword(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4415 BX_SMF Bit64u read_RMW_linear_qword(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4416
4417 BX_SMF Bit8u read_RMW_virtual_byte_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
4418 BX_SMF Bit16u read_RMW_virtual_word_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
4419 BX_SMF Bit32u read_RMW_virtual_dword_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
4420 BX_SMF Bit64u read_RMW_virtual_qword_32(unsigned seg, Bit32u offset) BX_CPP_AttrRegparmN(2);
4421
4422 BX_SMF Bit8u read_RMW_virtual_byte(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4423 BX_SMF Bit16u read_RMW_virtual_word(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4424 BX_SMF Bit32u read_RMW_virtual_dword(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4425 BX_SMF Bit64u read_RMW_virtual_qword(unsigned seg, bx_address offset) BX_CPP_AttrRegparmN(2);
4426
4427 BX_SMF void write_RMW_linear_byte(Bit8u val8) BX_CPP_AttrRegparmN(1);
4428 BX_SMF void write_RMW_linear_word(Bit16u val16) BX_CPP_AttrRegparmN(1);
4429 BX_SMF void write_RMW_linear_dword(Bit32u val32) BX_CPP_AttrRegparmN(1);
4430 BX_SMF void write_RMW_linear_qword(Bit64u val64) BX_CPP_AttrRegparmN(1);
4431
4432 #if BX_SUPPORT_X86_64
4433 BX_SMF void read_RMW_linear_dqword_aligned_64(unsigned seg, bx_address laddr, Bit64u *hi, Bit64u *lo);
4434 BX_SMF void write_RMW_linear_dqword(Bit64u hi, Bit64u lo);
4435 #endif
4436
4437 // write of word/dword to new stack could happen only in legacy mode
4438 BX_SMF void write_new_stack_word(bx_segment_reg_t *seg, Bit32u offset, unsigned curr_pl, Bit16u data);
4439 BX_SMF void write_new_stack_dword(bx_segment_reg_t *seg, Bit32u offset, unsigned curr_pl, Bit32u data);
4440 BX_SMF void write_new_stack_qword(bx_segment_reg_t *seg, Bit32u offset, unsigned curr_pl, Bit64u data);
4441
4442 BX_SMF void write_new_stack_word(bx_address laddr, unsigned curr_pl, Bit16u data);
4443 BX_SMF void write_new_stack_dword(bx_address laddr, unsigned curr_pl, Bit32u data);
4444 BX_SMF void write_new_stack_qword(bx_address laddr, unsigned curr_pl, Bit64u data);
4445
4446 // dedicated optimized stack access methods
4447 BX_SMF void stack_write_byte(bx_address offset, Bit8u data) BX_CPP_AttrRegparmN(2);
4448 BX_SMF void stack_write_word(bx_address offset, Bit16u data) BX_CPP_AttrRegparmN(2);
4449 BX_SMF void stack_write_dword(bx_address offset, Bit32u data) BX_CPP_AttrRegparmN(2);
4450 BX_SMF void stack_write_qword(bx_address offset, Bit64u data) BX_CPP_AttrRegparmN(2);
4451
4452 BX_SMF Bit8u stack_read_byte(bx_address offset) BX_CPP_AttrRegparmN(1);
4453 BX_SMF Bit16u stack_read_word(bx_address offset) BX_CPP_AttrRegparmN(1);
4454 BX_SMF Bit32u stack_read_dword(bx_address offset) BX_CPP_AttrRegparmN(1);
4455 BX_SMF Bit64u stack_read_qword(bx_address offset) BX_CPP_AttrRegparmN(1);
4456
4457 #if BX_SUPPORT_CET
4458 BX_SMF void shadow_stack_write_dword(bx_address offset, unsigned curr_pl, Bit32u data) BX_CPP_AttrRegparmN(3);
4459 BX_SMF void shadow_stack_write_qword(bx_address offset, unsigned curr_pl, Bit64u data) BX_CPP_AttrRegparmN(3);
4460
4461 BX_SMF Bit32u shadow_stack_read_dword(bx_address offset, unsigned curr_pl) BX_CPP_AttrRegparmN(2);
4462 BX_SMF Bit64u shadow_stack_read_qword(bx_address offset, unsigned curr_pl) BX_CPP_AttrRegparmN(2);
4463
4464 BX_SMF bool shadow_stack_lock_cmpxchg8b(bx_address offset, unsigned curr_pl, Bit64u data, Bit64u expected_data) BX_CPP_AttrRegparmN(4);
4465 BX_SMF bool shadow_stack_atomic_set_busy(bx_address offset, unsigned curr_pl) BX_CPP_AttrRegparmN(2);
4466 BX_SMF bool shadow_stack_atomic_clear_busy(bx_address offset, unsigned curr_pl) BX_CPP_AttrRegparmN(2);
4467 #endif
4468
4469 BX_SMF void stackPrefetch(bx_address offset, unsigned len) BX_CPP_AttrRegparmN(2);
4470
4471 // dedicated system linear read/write methods with no segment
4472 BX_SMF Bit8u system_read_byte(bx_address laddr) BX_CPP_AttrRegparmN(1);
4473 BX_SMF Bit16u system_read_word(bx_address laddr) BX_CPP_AttrRegparmN(1);
4474 BX_SMF Bit32u system_read_dword(bx_address laddr) BX_CPP_AttrRegparmN(1);
4475 BX_SMF Bit64u system_read_qword(bx_address laddr) BX_CPP_AttrRegparmN(1);
4476
4477 BX_SMF void system_write_byte(bx_address laddr, Bit8u data) BX_CPP_AttrRegparmN(2);
4478 BX_SMF void system_write_word(bx_address laddr, Bit16u data) BX_CPP_AttrRegparmN(2);
4479 BX_SMF void system_write_dword(bx_address laddr, Bit32u data) BX_CPP_AttrRegparmN(2);
4480
4481 BX_SMF Bit8u* v2h_read_byte(bx_address laddr, bool user) BX_CPP_AttrRegparmN(2);
4482 BX_SMF Bit8u* v2h_write_byte(bx_address laddr, bool user) BX_CPP_AttrRegparmN(2);
4483
4484 BX_SMF void branch_near16(Bit16u new_IP) BX_CPP_AttrRegparmN(1);
4485 BX_SMF void branch_near32(Bit32u new_EIP) BX_CPP_AttrRegparmN(1);
4486 #if BX_SUPPORT_X86_64
4487 BX_SMF void branch_near64(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4488 #endif
4489 BX_SMF void branch_far(bx_selector_t *selector,
4490 bx_descriptor_t *descriptor, bx_address rip, unsigned cpl);
4491
4492 #if BX_SUPPORT_REPEAT_SPEEDUPS
4493 BX_SMF Bit32u FastRepMOVSB(unsigned srcSeg, Bit32u srcOff, unsigned dstSeg, Bit32u dstOff, Bit32u byteCount, Bit32u granularity);
4494 BX_SMF Bit32u FastRepMOVSB(bx_address laddrSrc, bx_address laddrDst, Bit64u byteCount, Bit32u granularity);
4495
4496 BX_SMF Bit32u FastRepSTOSB(unsigned dstSeg, Bit32u dstOff, Bit8u val, Bit32u byteCount);
4497 BX_SMF Bit32u FastRepSTOSW(unsigned dstSeg, Bit32u dstOff, Bit16u val, Bit32u wordCount);
4498 BX_SMF Bit32u FastRepSTOSD(unsigned dstSeg, Bit32u dstOff, Bit32u val, Bit32u dwordCount);
4499
4500 BX_SMF Bit32u FastRepSTOSB(bx_address laddrDst, Bit8u val, Bit32u byteCount);
4501 BX_SMF Bit32u FastRepSTOSW(bx_address laddrDst, Bit16u val, Bit32u wordCount);
4502 BX_SMF Bit32u FastRepSTOSD(bx_address laddrDst, Bit32u val, Bit32u dwordCount);
4503
4504 BX_SMF Bit32u FastRepINSW(Bit32u dstOff, Bit16u port, Bit32u wordCount);
4505 BX_SMF Bit32u FastRepOUTSW(unsigned srcSeg, Bit32u srcOff, Bit16u port, Bit32u wordCount);
4506 #endif
4507
4508 BX_SMF void repeat(bxInstruction_c *i, BxRepIterationPtr_tR execute) BX_CPP_AttrRegparmN(2);
4509 BX_SMF void repeat_ZF(bxInstruction_c *i, BxRepIterationPtr_tR execute) BX_CPP_AttrRegparmN(2);
4510
4511 // linear address for access_linear expected to be canonical !
4512 BX_SMF int access_read_linear(bx_address laddr, unsigned len, unsigned curr_pl, unsigned xlate_rw, Bit32u ac_mask, void *data);
4513 BX_SMF int access_write_linear(bx_address laddr, unsigned len, unsigned curr_pl, unsigned xlate_rw, Bit32u ac_mask, void *data);
4514 BX_SMF void page_fault(unsigned fault, bx_address laddr, unsigned user, unsigned rw);
4515
4516 BX_SMF void access_read_physical(bx_phy_address paddr, unsigned len, void *data);
4517 BX_SMF void access_write_physical(bx_phy_address paddr, unsigned len, void *data);
4518
4519 BX_SMF bx_hostpageaddr_t getHostMemAddr(bx_phy_address addr, unsigned rw);
4520
4521 // linear address for translate_linear expected to be canonical !
4522 BX_SMF bx_phy_address translate_linear(bx_TLB_entry *entry, bx_address laddr, unsigned user, unsigned rw);
4523 BX_SMF bx_phy_address translate_linear_legacy(bx_address laddr, Bit32u &lpf_mask, unsigned user, unsigned rw);
4524 BX_SMF void update_access_dirty(bx_phy_address *entry_addr, Bit32u *entry, BxMemtype *entry_memtype, unsigned leaf, unsigned write);
4525 #if BX_CPU_LEVEL >= 6
4526 BX_SMF bx_phy_address translate_linear_load_PDPTR(bx_address laddr, unsigned user, unsigned rw);
4527 BX_SMF bx_phy_address translate_linear_PAE(bx_address laddr, Bit32u &lpf_mask, unsigned user, unsigned rw);
4528 BX_SMF int check_entry_PAE(const char *s, Bit64u entry, Bit64u reserved, unsigned rw, bool *nx_fault);
4529 BX_SMF void update_access_dirty_PAE(bx_phy_address *entry_addr, Bit64u *entry, BxMemtype *entry_memtype, unsigned max_level, unsigned leaf, unsigned write);
4530 #endif
4531 #if BX_SUPPORT_X86_64
4532 BX_SMF bx_phy_address translate_linear_long_mode(bx_address laddr, Bit32u &lpf_mask, Bit32u &pkey, unsigned user, unsigned rw);
4533 #endif
4534 #if BX_SUPPORT_VMX >= 2
4535 BX_SMF bx_phy_address translate_guest_physical(bx_phy_address guest_paddr, bx_address guest_laddr, bool guest_laddr_valid, bool is_page_walk, unsigned rw, bool supervisor_shadow_stack = false);
4536 BX_SMF void update_ept_access_dirty(bx_phy_address *entry_addr, Bit64u *entry, BxMemtype eptptr_memtype, unsigned leaf, unsigned write);
4537 BX_SMF bool is_eptptr_valid(Bit64u eptptr);
4538 BX_SMF bool spp_walk(bx_phy_address guest_paddr, bx_address guest_laddr, BxMemtype memtype);
4539 #endif
4540 #if BX_SUPPORT_SVM
4541 BX_SMF void nested_page_fault(unsigned fault, bx_phy_address guest_paddr, unsigned rw, unsigned is_page_walk);
4542 BX_SMF bx_phy_address nested_walk_long_mode(bx_phy_address guest_paddr, unsigned rw, bool is_page_walk);
4543 BX_SMF bx_phy_address nested_walk_PAE(bx_phy_address guest_paddr, unsigned rw, bool is_page_walk);
4544 BX_SMF bx_phy_address nested_walk_legacy(bx_phy_address guest_paddr, unsigned rw, bool is_page_walk);
4545 BX_SMF bx_phy_address nested_walk(bx_phy_address guest_paddr, unsigned rw, bool is_page_walk);
4546 #endif
4547 #if BX_SUPPORT_MEMTYPE
4548 BX_SMF BxMemtype memtype_by_mtrr(bx_phy_address paddr) BX_CPP_AttrRegparmN(1);
4549 BX_SMF BxMemtype memtype_by_pat(unsigned pat) BX_CPP_AttrRegparmN(1);
4550 BX_SMF BxMemtype resolve_memtype(BxMemtype mtrr_memtype, BxMemtype pat_memtype = BX_MEMTYPE_WB) BX_CPP_AttrRegparmN(2);
4551 #endif
4552
4553 #if BX_CPU_LEVEL >= 6
4554 BX_SMF void TLB_flushNonGlobal(void);
4555 #endif
4556 BX_SMF void TLB_flush(void);
4557 BX_SMF void TLB_invlpg(bx_address laddr);
4558 BX_SMF void inhibit_interrupts(unsigned mask);
4559 BX_SMF bool interrupts_inhibited(unsigned mask);
4560 BX_SMF const char *strseg(bx_segment_reg_t *seg);
4561 BX_SMF void interrupt(Bit8u vector, unsigned type, bool push_error, Bit16u error_code);
4562 BX_SMF void real_mode_int(Bit8u vector, bool push_error, Bit16u error_code);
4563 BX_SMF void protected_mode_int(Bit8u vector, unsigned soft_int, bool push_error, Bit16u error_code);
4564 #if BX_SUPPORT_X86_64
4565 BX_SMF void long_mode_int(Bit8u vector, unsigned soft_int, bool push_error, Bit16u error_code);
4566 #endif
4567 BX_SMF void exception(unsigned vector, Bit16u error_code)
4568 BX_CPP_AttrNoReturn();
4569 BX_SMF void init_SMRAM(void);
4570 BX_SMF int int_number(unsigned s);
4571
4572 BX_SMF bool SetCR0(bxInstruction_c *i, bx_address val);
4573 BX_SMF bool check_CR0(bx_address val) BX_CPP_AttrRegparmN(1);
4574 BX_SMF bool SetCR3(bx_address val) BX_CPP_AttrRegparmN(1);
4575 #if BX_CPU_LEVEL >= 5
4576 BX_SMF bool SetCR4(bxInstruction_c *i, bx_address val);
4577 BX_SMF bool check_CR4(bx_address val) BX_CPP_AttrRegparmN(1);
4578 BX_SMF Bit32u get_cr4_allow_mask(void);
4579 #endif
4580 #if BX_CPU_LEVEL >= 6
4581 BX_SMF bool CheckPDPTR(bx_phy_address cr3_val) BX_CPP_AttrRegparmN(1);
4582 #endif
4583 #if BX_SUPPORT_VMX >= 2
4584 BX_SMF bool CheckPDPTR(Bit64u *pdptr) BX_CPP_AttrRegparmN(1);
4585 #endif
4586 #if BX_CPU_LEVEL >= 5
4587 BX_SMF bool SetEFER(bx_address val) BX_CPP_AttrRegparmN(1);
4588 #endif
4589
4590 BX_SMF bx_address read_CR0(void);
4591 #if BX_CPU_LEVEL >= 5
4592 BX_SMF bx_address read_CR4(void);
4593 #endif
4594 #if BX_CPU_LEVEL >= 6
4595 BX_SMF Bit32u ReadCR8(bxInstruction_c *i);
4596 BX_SMF void WriteCR8(bxInstruction_c *i, bx_address val);
4597 #endif
4598
4599 BX_SMF void reset(unsigned source);
4600 BX_SMF void shutdown(void);
4601 BX_SMF void enter_sleep_state(unsigned state);
4602 BX_SMF void handleCpuModeChange(void);
4603 BX_SMF void handleCpuContextChange(void);
4604 BX_SMF void handleInterruptMaskChange(void);
4605 #if BX_CPU_LEVEL >= 4
4606 BX_SMF void handleAlignmentCheck(void);
4607 #endif
4608 #if BX_CPU_LEVEL >= 6
4609 BX_SMF void handleSseModeChange(void);
4610 BX_SMF void handleAvxModeChange(void);
4611 #endif
4612
4613 #if BX_SUPPORT_AVX
4614 BX_SMF void avx_masked_load8(bxInstruction_c *i, bx_address eaddr, BxPackedAvxRegister *dst, Bit64u mask);
4615 BX_SMF void avx_masked_load16(bxInstruction_c *i, bx_address eaddr, BxPackedAvxRegister *dst, Bit32u mask);
4616 BX_SMF void avx_masked_load32(bxInstruction_c *i, bx_address eaddr, BxPackedAvxRegister *dst, Bit32u mask);
4617 BX_SMF void avx_masked_load64(bxInstruction_c *i, bx_address eaddr, BxPackedAvxRegister *dst, Bit32u mask);
4618 BX_SMF void avx_masked_store8(bxInstruction_c *i, bx_address eaddr, const BxPackedAvxRegister *op, Bit64u mask);
4619 BX_SMF void avx_masked_store16(bxInstruction_c *i, bx_address eaddr, const BxPackedAvxRegister *op, Bit32u mask);
4620 BX_SMF void avx_masked_store32(bxInstruction_c *i, bx_address eaddr, const BxPackedAvxRegister *op, Bit32u mask);
4621 BX_SMF void avx_masked_store64(bxInstruction_c *i, bx_address eaddr, const BxPackedAvxRegister *op, Bit32u mask);
4622 #endif
4623
4624 #if BX_SUPPORT_EVEX
4625 BX_SMF void avx512_write_regb_masked(bxInstruction_c *i, const BxPackedAvxRegister *op, unsigned vlen, Bit64u mask);
4626 BX_SMF void avx512_write_regw_masked(bxInstruction_c *i, const BxPackedAvxRegister *op, unsigned vlen, Bit32u mask);
4627 BX_SMF void avx512_write_regd_masked(bxInstruction_c *i, const BxPackedAvxRegister *op, unsigned vlen, Bit32u mask);
4628 BX_SMF void avx512_write_regq_masked(bxInstruction_c *i, const BxPackedAvxRegister *op, unsigned vlen, Bit32u mask);
4629 #endif
4630
4631 #if BX_CPU_LEVEL >= 5
4632 BX_SMF bool rdmsr(Bit32u index, Bit64u *val_64) BX_CPP_AttrRegparmN(2);
4633 BX_SMF bool handle_unknown_rdmsr(Bit32u index, Bit64u *val_64) BX_CPP_AttrRegparmN(2);
4634 BX_SMF bool wrmsr(Bit32u index, Bit64u val_64) BX_CPP_AttrRegparmN(2);
4635 BX_SMF bool handle_unknown_wrmsr(Bit32u index, Bit64u val_64) BX_CPP_AttrRegparmN(2);
4636 #endif
4637
4638 #if BX_SUPPORT_APIC
4639 BX_SMF bool relocate_apic(Bit64u val_64);
4640 #endif
4641
4642 BX_SMF void load_segw(bxInstruction_c *i, unsigned seg) BX_CPP_AttrRegparmN(2);
4643 BX_SMF void load_segd(bxInstruction_c *i, unsigned seg) BX_CPP_AttrRegparmN(2);
4644 BX_SMF void load_segq(bxInstruction_c *i, unsigned seg) BX_CPP_AttrRegparmN(2);
4645
4646 BX_SMF void jmp_far16(bxInstruction_c *i, Bit16u cs_raw, Bit16u disp16);
4647 BX_SMF void jmp_far32(bxInstruction_c *i, Bit16u cs_raw, Bit32u disp32);
4648 BX_SMF void call_far16(bxInstruction_c *i, Bit16u cs_raw, Bit16u disp16);
4649 BX_SMF void call_far32(bxInstruction_c *i, Bit16u cs_raw, Bit32u disp32);
4650 BX_SMF void task_gate(bxInstruction_c *i, bx_selector_t *selector, bx_descriptor_t *gate_descriptor, unsigned source);
4651 BX_SMF void jump_protected(bxInstruction_c *i, Bit16u cs, bx_address disp) BX_CPP_AttrRegparmN(3);
4652 BX_SMF void jmp_call_gate(bx_selector_t *selector, bx_descriptor_t *gate_descriptor) BX_CPP_AttrRegparmN(2);
4653 BX_SMF void call_gate(bx_descriptor_t *gate_descriptor) BX_CPP_AttrRegparmN(1);
4654 #if BX_SUPPORT_X86_64
4655 BX_SMF void jmp_call_gate64(bx_selector_t *selector) BX_CPP_AttrRegparmN(1);
4656 #endif
4657 BX_SMF void call_protected(bxInstruction_c *i, Bit16u cs, bx_address disp) BX_CPP_AttrRegparmN(3);
4658 #if BX_SUPPORT_X86_64
4659 BX_SMF void call_gate64(bx_selector_t *selector) BX_CPP_AttrRegparmN(1);
4660 #endif
4661 BX_SMF void return_protected(bxInstruction_c *i, Bit16u pop_bytes) BX_CPP_AttrRegparmN(2);
4662 BX_SMF void iret_protected(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4663 #if BX_SUPPORT_X86_64
4664 BX_SMF void long_iret(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
4665 #endif
4666 #if BX_SUPPORT_CET
4667 BX_SMF void shadow_stack_switch(bx_address new_SSP) BX_CPP_AttrRegparmN(1);
4668 BX_SMF void call_far_shadow_stack_push(Bit16u cs, bx_address lip, bx_address old_ssp) BX_CPP_AttrRegparmN(3);
4669 BX_SMF bx_address shadow_stack_restore(Bit16u raw_cs_selector, const bx_descriptor_t &cs_descriptor, bx_address return_rip) BX_CPP_AttrRegparmN(3);
4670 #endif
4671 BX_SMF void validate_seg_reg(unsigned seg);
4672 BX_SMF void validate_seg_regs(void);
4673 BX_SMF void stack_return_to_v86(Bit32u new_eip, Bit32u raw_cs_selector, Bit32u flags32);
4674 BX_SMF void iret16_stack_return_from_v86(bxInstruction_c *);
4675 BX_SMF void iret32_stack_return_from_v86(bxInstruction_c *);
4676 BX_SMF int v86_redirect_interrupt(Bit8u vector);
4677 BX_SMF void init_v8086_mode(void);
4678 BX_SMF void task_switch_load_selector(bx_segment_reg_t *seg,
4679 bx_selector_t *selector, Bit16u raw_selector, Bit8u cs_rpl);
4680 BX_SMF void task_switch(bxInstruction_c *i, bx_selector_t *selector, bx_descriptor_t *descriptor,
4681 unsigned source, Bit32u dword1, Bit32u dword2, bool push_error = 0, Bit32u error_code = 0);
4682 BX_SMF void get_SS_ESP_from_TSS(unsigned pl, Bit16u *ss, Bit32u *esp);
4683 #if BX_SUPPORT_X86_64
4684 BX_SMF Bit64u get_RSP_from_TSS(unsigned pl);
4685 #endif
4686 BX_SMF void write_flags(Bit16u flags, bool change_IOPL, bool change_IF) BX_CPP_AttrRegparmN(3);
4687 BX_SMF void writeEFlags(Bit32u eflags, Bit32u changeMask) BX_CPP_AttrRegparmN(2); // Newer variant.
4688 BX_SMF void write_eflags_fpu_compare(int float_relation);
4689 BX_SMF Bit32u force_flags(void);
read_eflags(void)4690 BX_SMF Bit32u read_eflags(void) { return BX_CPU_THIS_PTR force_flags(); }
4691
4692 BX_SMF bool allow_io(bxInstruction_c *i, Bit16u addr, unsigned len) BX_CPP_AttrRegparmN(3);
4693 BX_SMF Bit32u get_descriptor_l(const bx_descriptor_t *) BX_CPP_AttrRegparmN(1);
4694 BX_SMF Bit32u get_descriptor_h(const bx_descriptor_t *) BX_CPP_AttrRegparmN(1);
4695 BX_SMF bool set_segment_ar_data(bx_segment_reg_t *seg, bool valid, Bit16u raw_selector,
4696 bx_address base, Bit32u limit_scaled, Bit16u ar_data);
4697 BX_SMF void check_cs(bx_descriptor_t *descriptor, Bit16u cs_raw, Bit8u check_rpl, Bit8u check_cpl);
4698 // the basic assumption of the code that load_cs and load_ss cannot fail !
4699 BX_SMF void load_cs(bx_selector_t *selector, bx_descriptor_t *descriptor, Bit8u cpl) BX_CPP_AttrRegparmN(3);
4700 BX_SMF void load_ss(bx_selector_t *selector, bx_descriptor_t *descriptor, Bit8u cpl) BX_CPP_AttrRegparmN(3);
4701 BX_SMF void touch_segment(bx_selector_t *selector, bx_descriptor_t *descriptor) BX_CPP_AttrRegparmN(2);
4702 BX_SMF void fetch_raw_descriptor(const bx_selector_t *selector,
4703 Bit32u *dword1, Bit32u *dword2, unsigned exception_no);
4704 BX_SMF bool fetch_raw_descriptor2(const bx_selector_t *selector,
4705 Bit32u *dword1, Bit32u *dword2) BX_CPP_AttrRegparmN(3);
4706 BX_SMF void load_seg_reg(bx_segment_reg_t *seg, Bit16u new_value) BX_CPP_AttrRegparmN(2);
4707 BX_SMF void load_null_selector(bx_segment_reg_t *seg, unsigned value) BX_CPP_AttrRegparmN(2);
4708 #if BX_SUPPORT_X86_64
4709 BX_SMF void fetch_raw_descriptor_64(const bx_selector_t *selector,
4710 Bit32u *dword1, Bit32u *dword2, Bit32u *dword3, unsigned exception_no);
4711 BX_SMF bool fetch_raw_descriptor2_64(const bx_selector_t *selector,
4712 Bit32u *dword1, Bit32u *dword2, Bit32u *dword3);
4713 #endif
4714 BX_SMF void push_16(Bit16u value16) BX_CPP_AttrRegparmN(1);
4715 BX_SMF void push_32(Bit32u value32) BX_CPP_AttrRegparmN(1);
4716 BX_SMF Bit16u pop_16(void);
4717 BX_SMF Bit32u pop_32(void);
4718 #if BX_SUPPORT_X86_64
4719 BX_SMF void push_64(Bit64u value64) BX_CPP_AttrRegparmN(1);
4720 BX_SMF Bit64u pop_64(void);
4721 #endif
4722 #if BX_SUPPORT_CET
4723 BX_SMF void shadow_stack_push_32(Bit32u value32) BX_CPP_AttrRegparmN(1);
4724 BX_SMF Bit32u shadow_stack_pop_32(void);
4725 BX_SMF void shadow_stack_push_64(Bit64u value64) BX_CPP_AttrRegparmN(1);
4726 BX_SMF Bit64u shadow_stack_pop_64(void);
4727 #endif
4728 BX_SMF void sanity_checks(void);
4729 BX_SMF void assert_checks(void);
4730
4731 BX_SMF void enter_system_management_mode(void);
4732 BX_SMF bool resume_from_system_management_mode(BX_SMM_State *smm_state);
4733 BX_SMF void smram_save_state(Bit32u *smm_saved_state);
4734 BX_SMF bool smram_restore_state(const Bit32u *smm_saved_state);
4735
4736 BX_SMF void raise_INTR(void);
4737 BX_SMF void clear_INTR(void);
4738
4739 BX_SMF void deliver_INIT(void);
4740 BX_SMF void deliver_NMI(void);
4741 BX_SMF void deliver_SMI(void);
4742 BX_SMF void deliver_SIPI(unsigned vector);
4743 BX_SMF void debug(bx_address offset);
4744 BX_SMF void debug_disasm_instruction(bx_address offset);
4745
4746 #if BX_X86_DEBUGGER
4747 // x86 hardware debug support
4748 BX_SMF bool hwbreakpoint_check(bx_address laddr, unsigned opa, unsigned opb);
4749 #if BX_CPU_LEVEL >= 5
4750 BX_SMF void iobreakpoint_match(unsigned port, unsigned len);
4751 #endif
4752 BX_SMF Bit32u code_breakpoint_match(bx_address laddr);
4753 BX_SMF void hwbreakpoint_match(bx_address laddr, unsigned len, unsigned rw);
4754 BX_SMF Bit32u hwdebug_compare(bx_address laddr, unsigned len, unsigned opa, unsigned opb);
4755 #endif
4756
4757 BX_SMF void init_FetchDecodeTables(void);
4758
4759 #if BX_SUPPORT_APIC
get_apic_id(void)4760 BX_SMF BX_CPP_INLINE Bit8u get_apic_id(void) { return BX_CPU_THIS_PTR bx_cpuid; }
4761 #endif
4762
is_cpu_extension_supported(unsigned extension)4763 BX_SMF BX_CPP_INLINE bool is_cpu_extension_supported(unsigned extension) {
4764 assert(extension < BX_ISA_EXTENSION_LAST);
4765 return BX_CPU_THIS_PTR ia_extensions_bitmask[extension / 32] & (1 << (extension % 32));
4766 }
4767
which_cpu(void)4768 BX_SMF BX_CPP_INLINE unsigned which_cpu(void) { return BX_CPU_THIS_PTR bx_cpuid; }
get_gen_regfile()4769 BX_SMF BX_CPP_INLINE const bx_gen_reg_t *get_gen_regfile() { return BX_CPU_THIS_PTR gen_reg; }
4770
get_icount(void)4771 BX_SMF BX_CPP_INLINE Bit64u get_icount(void) { return BX_CPU_THIS_PTR icount; }
sync_icount(void)4772 BX_SMF BX_CPP_INLINE void sync_icount(void) { BX_CPU_THIS_PTR icount_last_sync = BX_CPU_THIS_PTR icount; }
get_icount_last_sync(void)4773 BX_SMF BX_CPP_INLINE Bit64u get_icount_last_sync(void) { return BX_CPU_THIS_PTR icount_last_sync; }
4774
4775 BX_SMF BX_CPP_INLINE bx_address get_instruction_pointer(void);
4776
get_eip(void)4777 BX_SMF BX_CPP_INLINE Bit32u get_eip(void) { return (BX_CPU_THIS_PTR gen_reg[BX_32BIT_REG_EIP].dword.erx); }
get_ip(void)4778 BX_SMF BX_CPP_INLINE Bit16u get_ip (void) { return (BX_CPU_THIS_PTR gen_reg[BX_16BIT_REG_IP].word.rx); }
4779 #if BX_SUPPORT_X86_64
get_rip(void)4780 BX_SMF BX_CPP_INLINE Bit64u get_rip(void) { return (BX_CPU_THIS_PTR gen_reg[BX_64BIT_REG_RIP].rrx); }
4781 #endif
4782
get_cpl(void)4783 BX_SMF BX_CPP_INLINE Bit32u get_cpl(void) { return (BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.rpl); }
4784
4785 #if BX_SUPPORT_CET
get_ssp(void)4786 BX_SMF BX_CPP_INLINE bx_address get_ssp(void) { return (BX_CPU_THIS_PTR gen_reg[BX_64BIT_REG_SSP].rrx); }
4787 #endif
4788
4789 BX_SMF BX_CPP_INLINE Bit8u get_reg8l(unsigned reg);
4790 BX_SMF BX_CPP_INLINE Bit8u get_reg8h(unsigned reg);
4791 BX_SMF BX_CPP_INLINE void set_reg8l(unsigned reg, Bit8u val);
4792 BX_SMF BX_CPP_INLINE void set_reg8h(unsigned reg, Bit8u val);
4793
4794 BX_SMF BX_CPP_INLINE Bit16u get_reg16(unsigned reg);
4795 BX_SMF BX_CPP_INLINE void set_reg16(unsigned reg, Bit16u val);
4796 BX_SMF BX_CPP_INLINE Bit32u get_reg32(unsigned reg);
4797 BX_SMF BX_CPP_INLINE void set_reg32(unsigned reg, Bit32u val);
4798 #if BX_SUPPORT_X86_64
4799 BX_SMF BX_CPP_INLINE Bit64u get_reg64(unsigned reg);
4800 BX_SMF BX_CPP_INLINE void set_reg64(unsigned reg, Bit64u val);
4801 #endif
4802 #if BX_SUPPORT_EVEX
4803 BX_SMF BX_CPP_INLINE Bit64u get_opmask(unsigned reg);
4804 BX_SMF BX_CPP_INLINE void set_opmask(unsigned reg, Bit64u val);
4805 #endif
4806
4807 #if BX_CPU_LEVEL >= 6
4808 BX_SMF BX_CPP_INLINE unsigned get_cr8();
4809 #endif
4810
4811 BX_SMF bx_address get_segment_base(unsigned seg);
4812
4813 // The linear address must be truncated to the 32-bit when CPU is not
4814 // executing in long64 mode. The function must be used to compute
4815 // linear address everywhere when a code is shared between long64 and
4816 // legacy mode. For legacy mode only just use Bit32u to store linear
4817 // address value.
4818 BX_SMF bx_address get_laddr(unsigned seg, bx_address offset);
4819
4820 BX_SMF Bit32u get_laddr32(unsigned seg, Bit32u offset);
4821 #if BX_SUPPORT_X86_64
4822 BX_SMF Bit64u get_laddr64(unsigned seg, Bit64u offset);
4823 #endif
4824
4825 BX_SMF bx_address agen_read(unsigned seg, bx_address offset, unsigned len);
4826 BX_SMF Bit32u agen_read32(unsigned seg, Bit32u offset, unsigned len);
4827 BX_SMF Bit32u agen_read_execute32(unsigned seg, Bit32u offset, unsigned len);
4828 BX_SMF bx_address agen_read_aligned(unsigned seg, bx_address offset, unsigned len);
4829 BX_SMF Bit32u agen_read_aligned32(unsigned seg, Bit32u offset, unsigned len);
4830
4831 BX_SMF bx_address agen_write(unsigned seg, bx_address offset, unsigned len);
4832 BX_SMF Bit32u agen_write32(unsigned seg, Bit32u offset, unsigned len);
4833 BX_SMF bx_address agen_write_aligned(unsigned seg, bx_address offset, unsigned len);
4834 BX_SMF Bit32u agen_write_aligned32(unsigned seg, Bit32u offset, unsigned len);
4835
4836 DECLARE_EFLAG_ACCESSOR (ID, 21)
4837 DECLARE_EFLAG_ACCESSOR (VIP, 20)
4838 DECLARE_EFLAG_ACCESSOR (VIF, 19)
4839 DECLARE_EFLAG_ACCESSOR (AC, 18)
4840 DECLARE_EFLAG_ACCESSOR (VM, 17)
4841 DECLARE_EFLAG_ACCESSOR (RF, 16)
4842 DECLARE_EFLAG_ACCESSOR (NT, 14)
4843 DECLARE_EFLAG_ACCESSOR_IOPL( 12)
4844 DECLARE_EFLAG_ACCESSOR (DF, 10)
4845 DECLARE_EFLAG_ACCESSOR (IF, 9)
4846 DECLARE_EFLAG_ACCESSOR (TF, 8)
4847
4848 BX_SMF BX_CPP_INLINE bool real_mode(void);
4849 BX_SMF BX_CPP_INLINE bool smm_mode(void);
4850 BX_SMF BX_CPP_INLINE bool protected_mode(void);
4851 BX_SMF BX_CPP_INLINE bool v8086_mode(void);
4852 BX_SMF BX_CPP_INLINE bool long_mode(void);
4853 BX_SMF BX_CPP_INLINE bool long64_mode(void);
4854 BX_SMF BX_CPP_INLINE unsigned get_cpu_mode(void);
4855
4856 #if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
4857 BX_SMF BX_CPP_INLINE bool alignment_check(void);
4858 #endif
4859
4860 #if BX_CPU_LEVEL >= 5
4861 BX_SMF Bit64u get_TSC();
4862 BX_SMF void set_TSC(Bit64u tsc);
4863 #if BX_SUPPORT_VMX || BX_SUPPORT_SVM
4864 BX_SMF Bit64u get_TSC_VMXAdjust(Bit64u tsc);
4865 #endif
4866 #endif
4867
4868 #if BX_SUPPORT_PKEYS
4869 BX_SMF void set_PKeys(Bit32u pkru, Bit32u pkrs);
4870 #endif
4871
4872 #if BX_SUPPORT_FPU
4873 BX_SMF void print_state_FPU(void);
4874 BX_SMF void prepareFPU(bxInstruction_c *i, bool = 1);
4875 BX_SMF void FPU_check_pending_exceptions(void);
4876 BX_SMF void FPU_update_last_instruction(bxInstruction_c *i);
4877 BX_SMF void FPU_stack_underflow(bxInstruction_c *i, int stnr, int pop_stack = 0);
4878 BX_SMF void FPU_stack_overflow(bxInstruction_c *i);
4879 BX_SMF unsigned FPU_exception(bxInstruction_c *i, unsigned exception, bool = 0);
4880 BX_SMF bx_address fpu_save_environment(bxInstruction_c *i);
4881 BX_SMF bx_address fpu_load_environment(bxInstruction_c *i);
4882 BX_SMF Bit8u pack_FPU_TW(Bit16u tag_word);
4883 BX_SMF Bit16u unpack_FPU_TW(Bit16u tag_byte);
4884 BX_SMF Bit16u x87_get_FCS(void);
4885 BX_SMF Bit16u x87_get_FDS(void);
4886 #endif
4887
4888 #if BX_CPU_LEVEL >= 5
4889 BX_SMF void prepareMMX(void);
4890 BX_SMF void prepareFPU2MMX(void); /* cause transition from FPU to MMX technology state */
4891 BX_SMF void print_state_MMX(void);
4892 #endif
4893
4894 #if BX_CPU_LEVEL >= 6
4895 BX_SMF void check_exceptionsSSE(int);
4896 BX_SMF void print_state_SSE(void);
4897
4898 BX_SMF void prepareXSAVE(void);
4899 BX_SMF void print_state_AVX(void);
4900 #endif
4901
4902 #if BX_CPU_LEVEL >= 6
4903 BX_SMF void xsave_xrestor_init(void);
4904 BX_SMF Bit32u get_xcr0_allow_mask(void);
4905 BX_SMF Bit32u get_ia32_xss_allow_mask(void);
4906 BX_SMF Bit32u get_xinuse_vector(Bit32u requested_feature_bitmap);
4907
4908 BX_SMF bool xsave_x87_state_xinuse(void);
4909 BX_SMF void xsave_x87_state(bxInstruction_c *i, bx_address offset);
4910 BX_SMF void xrstor_x87_state(bxInstruction_c *i, bx_address offset);
4911 BX_SMF void xrstor_init_x87_state(void);
4912
4913 BX_SMF bool xsave_sse_state_xinuse(void);
4914 BX_SMF void xsave_sse_state(bxInstruction_c *i, bx_address offset);
4915 BX_SMF void xrstor_sse_state(bxInstruction_c *i, bx_address offset);
4916 BX_SMF void xrstor_init_sse_state(void);
4917
4918 #if BX_SUPPORT_AVX
4919 BX_SMF bool xsave_ymm_state_xinuse(void);
4920 BX_SMF void xsave_ymm_state(bxInstruction_c *i, bx_address offset);
4921 BX_SMF void xrstor_ymm_state(bxInstruction_c *i, bx_address offset);
4922 BX_SMF void xrstor_init_ymm_state(void);
4923 #if BX_SUPPORT_EVEX
4924 BX_SMF bool xsave_opmask_state_xinuse(void);
4925 BX_SMF void xsave_opmask_state(bxInstruction_c *i, bx_address offset);
4926 BX_SMF void xrstor_opmask_state(bxInstruction_c *i, bx_address offset);
4927 BX_SMF void xrstor_init_opmask_state(void);
4928
4929 BX_SMF bool xsave_zmm_hi256_state_xinuse(void);
4930 BX_SMF void xsave_zmm_hi256_state(bxInstruction_c *i, bx_address offset);
4931 BX_SMF void xrstor_zmm_hi256_state(bxInstruction_c *i, bx_address offset);
4932 BX_SMF void xrstor_init_zmm_hi256_state(void);
4933
4934 BX_SMF bool xsave_hi_zmm_state_xinuse(void);
4935 BX_SMF void xsave_hi_zmm_state(bxInstruction_c *i, bx_address offset);
4936 BX_SMF void xrstor_hi_zmm_state(bxInstruction_c *i, bx_address offset);
4937 BX_SMF void xrstor_init_hi_zmm_state(void);
4938 #endif
4939 #endif
4940
4941 #if BX_SUPPORT_PKEYS
4942 BX_SMF bool xsave_pkru_state_xinuse(void);
4943 BX_SMF void xsave_pkru_state(bxInstruction_c *i, bx_address offset);
4944 BX_SMF void xrstor_pkru_state(bxInstruction_c *i, bx_address offset);
4945 BX_SMF void xrstor_init_pkru_state(void);
4946 #endif
4947
4948 #if BX_SUPPORT_CET
4949 BX_SMF bool xsave_cet_u_state_xinuse(void);
4950 BX_SMF void xsave_cet_u_state(bxInstruction_c *i, bx_address offset);
4951 BX_SMF void xrstor_cet_u_state(bxInstruction_c *i, bx_address offset);
4952 BX_SMF void xrstor_init_cet_u_state(void);
4953
4954 BX_SMF bool xsave_cet_s_state_xinuse(void);
4955 BX_SMF void xsave_cet_s_state(bxInstruction_c *i, bx_address offset);
4956 BX_SMF void xrstor_cet_s_state(bxInstruction_c *i, bx_address offset);
4957 BX_SMF void xrstor_init_cet_s_state(void);
4958 #endif
4959 #endif
4960
4961 #if BX_SUPPORT_CET
4962 BX_SMF bool ShadowStackEnabled(unsigned cpl) BX_CPP_AttrRegparmN(1);
4963 BX_SMF bool ShadowStackWriteEnabled(unsigned cpl) BX_CPP_AttrRegparmN(1);
4964 BX_SMF bool EndbranchEnabled(unsigned cpl) BX_CPP_AttrRegparmN(1);
4965 BX_SMF bool EndbranchEnabledAndNotSuppressed(unsigned cpl) BX_CPP_AttrRegparmN(1);
4966 BX_SMF bool WaitingForEndbranch(unsigned cpl) BX_CPP_AttrRegparmN(1);
4967 BX_SMF bool LegacyEndbranchTreatment(unsigned cpl) BX_CPP_AttrRegparmN(1);
4968 BX_SMF void track_indirect(unsigned cpl) BX_CPP_AttrRegparmN(1);
4969 BX_SMF void track_indirect_if_not_suppressed(bxInstruction_c *i, unsigned cpl) BX_CPP_AttrRegparmN(2);
4970 BX_SMF void reset_endbranch_tracker(unsigned cpl, bool suppress=false) BX_CPP_AttrRegparmN(2);
4971 #endif
4972
4973 #if BX_SUPPORT_MONITOR_MWAIT
4974 BX_SMF bool is_monitor(bx_phy_address addr, unsigned len);
4975 BX_SMF void check_monitor(bx_phy_address addr, unsigned len);
4976 BX_SMF void wakeup_monitor(void);
4977 #endif
4978
4979 #if BX_SUPPORT_VMX
4980 BX_SMF Bit16u VMread16(unsigned encoding) BX_CPP_AttrRegparmN(1);
4981 BX_SMF Bit32u VMread32(unsigned encoding) BX_CPP_AttrRegparmN(1);
4982 BX_SMF Bit64u VMread64(unsigned encoding) BX_CPP_AttrRegparmN(1);
4983 BX_SMF bx_address VMread_natural(unsigned encoding) BX_CPP_AttrRegparmN(1);
4984 BX_SMF void VMwrite16(unsigned encoding, Bit16u val_16) BX_CPP_AttrRegparmN(2);
4985 BX_SMF void VMwrite32(unsigned encoding, Bit32u val_32) BX_CPP_AttrRegparmN(2);
4986 BX_SMF void VMwrite64(unsigned encoding, Bit64u val_64) BX_CPP_AttrRegparmN(2);
4987 BX_SMF void VMwrite_natural(unsigned encoding, bx_address val) BX_CPP_AttrRegparmN(2);
4988
4989 BX_SMF Bit64u vmread(unsigned encoding) BX_CPP_AttrRegparmN(1);
4990 BX_SMF void vmwrite(unsigned encoding, Bit64u val_64) BX_CPP_AttrRegparmN(2);
4991 #if BX_SUPPORT_VMX >= 2
4992 BX_SMF Bit64u vmread_shadow(unsigned encoding) BX_CPP_AttrRegparmN(1);
4993 BX_SMF void vmwrite_shadow(unsigned encoding, Bit64u val_64) BX_CPP_AttrRegparmN(2);
4994 #endif
4995
VMsucceed(void)4996 BX_SMF BX_CPP_INLINE void VMsucceed(void) { clearEFlagsOSZAPC(); }
VMfailInvalid(void)4997 BX_SMF BX_CPP_INLINE void VMfailInvalid(void) { setEFlagsOSZAPC(EFlagsCFMask); }
4998 BX_SMF void VMfail(Bit32u error_code);
4999 BX_SMF void VMabort(VMX_vmabort_code error_code);
5000
5001 BX_SMF Bit32u LoadMSRs(Bit32u msr_cnt, bx_phy_address pAddr);
5002 BX_SMF Bit32u StoreMSRs(Bit32u msr_cnt, bx_phy_address pAddr);
5003 BX_SMF Bit32u VMXReadRevisionID(bx_phy_address pAddr);
5004 BX_SMF VMX_error_code VMenterLoadCheckVmControls(void);
5005 BX_SMF VMX_error_code VMenterLoadCheckHostState(void);
5006 BX_SMF Bit32u VMenterLoadCheckGuestState(Bit64u *qualification);
5007 BX_SMF void VMenterInjectEvents(void);
5008 BX_SMF void VMexit(Bit32u reason, Bit64u qualification);
5009 BX_SMF void VMexitSaveGuestState(void);
5010 BX_SMF void VMexitSaveGuestMSRs(void);
5011 BX_SMF void VMexitLoadHostState(void);
5012 BX_SMF void set_VMCSPTR(Bit64u vmxptr);
5013 BX_SMF void init_vmx_capabilities(void);
5014 #if BX_SUPPORT_VMX >= 2
5015 BX_SMF void init_ept_vpid_capabilities(void);
5016 BX_SMF void init_vmfunc_capabilities(void);
5017 #endif
5018 BX_SMF void init_pin_based_vmexec_ctrls(void);
5019 BX_SMF void init_secondary_proc_based_vmexec_ctrls(void);
5020 BX_SMF void init_primary_proc_based_vmexec_ctrls(void);
5021 BX_SMF void init_vmexit_ctrls(void);
5022 BX_SMF void init_vmentry_ctrls(void);
5023 BX_SMF void init_VMCS(void);
5024 BX_SMF bool vmcs_field_supported(Bit32u encoding);
5025 BX_SMF void register_vmx_state(bx_param_c *parent);
5026 #if BX_SUPPORT_VMX >= 2
5027 BX_SMF Bit16u VMX_Get_Current_VPID(void);
5028 #endif
5029 #if BX_SUPPORT_X86_64
5030 BX_SMF bool is_virtual_apic_page(bx_phy_address paddr) BX_CPP_AttrRegparmN(1);
5031 BX_SMF bool virtual_apic_access_vmexit(unsigned offset, unsigned len) BX_CPP_AttrRegparmN(2);
5032 BX_SMF bx_phy_address VMX_Virtual_Apic_Read(bx_phy_address paddr, unsigned len, void *data);
5033 BX_SMF void VMX_Virtual_Apic_Write(bx_phy_address paddr, unsigned len, void *data);
5034 BX_SMF Bit32u VMX_Read_Virtual_APIC(unsigned offset);
5035 BX_SMF void VMX_Write_Virtual_APIC(unsigned offset, Bit32u val32);
5036 BX_SMF void VMX_TPR_Virtualization(void);
5037 BX_SMF bool Virtualize_X2APIC_Write(unsigned msr, Bit64u val_64);
5038 BX_SMF void VMX_Virtual_Apic_Access_Trap(void);
5039 #if BX_SUPPORT_VMX >= 2
5040 BX_SMF void vapic_set_vector(unsigned apic_arrbase, Bit8u vector);
5041 BX_SMF Bit8u vapic_clear_and_find_highest_priority_int(unsigned apic_arrbase, Bit8u vector);
5042 BX_SMF void VMX_Write_VICR(void);
5043 BX_SMF void VMX_PPR_Virtualization(void);
5044 BX_SMF void VMX_EOI_Virtualization(void);
5045 BX_SMF void VMX_Self_IPI_Virtualization(Bit8u vector);
5046 BX_SMF void VMX_Evaluate_Pending_Virtual_Interrupts(void);
5047 BX_SMF void VMX_Deliver_Virtual_Interrupt(void);
5048 BX_SMF void vmx_page_modification_logging(Bit64u guest_addr, unsigned dirty_update);
5049 #endif
5050 #if BX_SUPPORT_VMX >= 2
5051 BX_SMF Bit16u VMread16_Shadow(unsigned encoding) BX_CPP_AttrRegparmN(1);
5052 BX_SMF Bit32u VMread32_Shadow(unsigned encoding) BX_CPP_AttrRegparmN(1);
5053 BX_SMF Bit64u VMread64_Shadow(unsigned encoding) BX_CPP_AttrRegparmN(1);
5054 BX_SMF void VMwrite16_Shadow(unsigned encoding, Bit16u val_16) BX_CPP_AttrRegparmN(2);
5055 BX_SMF void VMwrite32_Shadow(unsigned encoding, Bit32u val_32) BX_CPP_AttrRegparmN(2);
5056 BX_SMF void VMwrite64_Shadow(unsigned encoding, Bit64u val_64) BX_CPP_AttrRegparmN(2);
5057 BX_SMF bool Vmexit_Vmread(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
5058 BX_SMF bool Vmexit_Vmwrite(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
5059 #endif
5060 #endif
5061 // vmexit reasons
5062 BX_SMF void VMexit_Instruction(bxInstruction_c *i, Bit32u reason, bool rw = BX_READ) BX_CPP_AttrRegparmN(3);
5063 BX_SMF void VMexit_Event(unsigned type, unsigned vector,
5064 Bit16u errcode, bool errcode_valid, Bit64u qualification = 0);
5065 BX_SMF void VMexit_TripleFault(void);
5066 BX_SMF void VMexit_ExtInterrupt(void);
5067 BX_SMF void VMexit_TaskSwitch(Bit16u tss_selector, unsigned source) BX_CPP_AttrRegparmN(2);
5068 BX_SMF void VMexit_PAUSE(void);
5069 BX_SMF bool VMexit_CLTS(void);
5070 BX_SMF void VMexit_MSR(unsigned op, Bit32u msr) BX_CPP_AttrRegparmN(2);
5071 BX_SMF void VMexit_IO(bxInstruction_c *i, unsigned port, unsigned len) BX_CPP_AttrRegparmN(3);
5072 BX_SMF Bit32u VMexit_LMSW(bxInstruction_c *i, Bit32u msw) BX_CPP_AttrRegparmN(2);
5073 BX_SMF bx_address VMexit_CR0_Write(bxInstruction_c *i, bx_address) BX_CPP_AttrRegparmN(2);
5074 BX_SMF void VMexit_CR3_Read(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
5075 BX_SMF void VMexit_CR3_Write(bxInstruction_c *i, bx_address) BX_CPP_AttrRegparmN(2);
5076 BX_SMF bx_address VMexit_CR4_Write(bxInstruction_c *i, bx_address) BX_CPP_AttrRegparmN(2);
5077 BX_SMF void VMexit_CR8_Read(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
5078 BX_SMF void VMexit_CR8_Write(bxInstruction_c *i) BX_CPP_AttrRegparmN(1);
5079 BX_SMF void VMexit_DR_Access(unsigned read, unsigned dr, unsigned reg);
5080 #if BX_SUPPORT_VMX >= 2
5081 BX_SMF void Virtualization_Exception(Bit64u qualification, Bit64u guest_physical, Bit64u guest_linear);
5082 BX_SMF void vmfunc_eptp_switching(void);
5083 #endif
5084 #endif
5085
5086 #if BX_SUPPORT_SVM
5087 BX_SMF void set_VMCBPTR(Bit64u vmcbptr);
5088 BX_SMF void SvmEnterSaveHostState(SVM_HOST_STATE *host);
5089 BX_SMF bool SvmEnterLoadCheckControls(SVM_CONTROLS *ctrls);
5090 BX_SMF bool SvmEnterLoadCheckGuestState(void);
5091 BX_SMF bool SvmInjectEvents(void);
5092 BX_SMF void Svm_Vmexit(int reason, Bit64u exitinfo1 = 0, Bit64u exitinfo2 = 0);
5093 BX_SMF void SvmExitSaveGuestState(void);
5094 BX_SMF void SvmExitLoadHostState(SVM_HOST_STATE *host);
5095 BX_SMF Bit8u vmcb_read8(unsigned offset);
5096 BX_SMF Bit16u vmcb_read16(unsigned offset);
5097 BX_SMF Bit32u vmcb_read32(unsigned offset);
5098 BX_SMF Bit64u vmcb_read64(unsigned offset);
5099 BX_SMF void vmcb_write8(unsigned offset, Bit8u val_8);
5100 BX_SMF void vmcb_write16(unsigned offset, Bit16u val_16);
5101 BX_SMF void vmcb_write32(unsigned offset, Bit32u val_32);
5102 BX_SMF void vmcb_write64(unsigned offset, Bit64u val_64);
5103 BX_SMF void svm_segment_read(bx_segment_reg_t *seg, unsigned offset);
5104 BX_SMF void svm_segment_write(bx_segment_reg_t *seg, unsigned offset);
5105 BX_SMF void SvmInterceptException(unsigned type, unsigned vector,
5106 Bit16u errcode, bool errcode_valid, Bit64u qualification = 0);
5107 BX_SMF void SvmInterceptIO(bxInstruction_c *i, unsigned port, unsigned len);
5108 BX_SMF void SvmInterceptMSR(unsigned op, Bit32u msr);
5109 BX_SMF void SvmInterceptTaskSwitch(Bit16u tss_selector, unsigned source, bool push_error, Bit32u error_code);
5110 BX_SMF void SvmInterceptPAUSE(void);
5111 BX_SMF void VirtualInterruptAcknowledge(void);
5112 BX_SMF void register_svm_state(bx_param_c *parent);
5113 #endif
5114
5115 #if BX_CONFIGURE_MSRS
5116 int load_MSRs(const char *file);
5117 #endif
5118 };
5119
5120 #if BX_CPU_LEVEL >= 5
prepareMMX(void)5121 BX_CPP_INLINE void BX_CPU_C::prepareMMX(void)
5122 {
5123 if(BX_CPU_THIS_PTR cr0.get_EM())
5124 exception(BX_UD_EXCEPTION, 0);
5125
5126 if(BX_CPU_THIS_PTR cr0.get_TS())
5127 exception(BX_NM_EXCEPTION, 0);
5128
5129 /* check floating point status word for a pending FPU exceptions */
5130 FPU_check_pending_exceptions();
5131 }
5132
prepareFPU2MMX(void)5133 BX_CPP_INLINE void BX_CPU_C::prepareFPU2MMX(void)
5134 {
5135 BX_CPU_THIS_PTR the_i387.twd = 0;
5136 BX_CPU_THIS_PTR the_i387.tos = 0; /* reset FPU Top-Of-Stack */
5137 }
5138 #endif
5139
5140 #if BX_CPU_LEVEL >= 6
prepareXSAVE(void)5141 BX_CPP_INLINE void BX_CPU_C::prepareXSAVE(void)
5142 {
5143 if(! BX_CPU_THIS_PTR cr4.get_OSXSAVE())
5144 exception(BX_UD_EXCEPTION, 0);
5145
5146 if(BX_CPU_THIS_PTR cr0.get_TS())
5147 exception(BX_NM_EXCEPTION, 0);
5148 }
5149 #endif
5150
5151 // Can be used as LHS or RHS.
5152 #define RMAddr(i) (BX_CPU_THIS_PTR address_xlation.rm_addr)
5153
5154 #if defined(NEED_CPU_REG_SHORTCUTS)
5155
5156 #if BX_SUPPORT_X86_64
BxResolve64(bxInstruction_c * i)5157 BX_CPP_INLINE Bit64u BX_CPP_AttrRegparmN(1) BX_CPU_C::BxResolve64(bxInstruction_c *i)
5158 {
5159 Bit64u eaddr = (Bit64u) (BX_READ_64BIT_REG(i->sibBase()) + i->displ32s());
5160 if (i->sibIndex() != 4)
5161 eaddr += BX_READ_64BIT_REG(i->sibIndex()) << i->sibScale();
5162 return eaddr;
5163 }
5164 #endif
5165
BxResolve32(bxInstruction_c * i)5166 BX_CPP_INLINE Bit32u BX_CPP_AttrRegparmN(1) BX_CPU_C::BxResolve32(bxInstruction_c *i)
5167 {
5168 Bit32u eaddr = (Bit32u) (BX_READ_32BIT_REG(i->sibBase()) + i->displ32s());
5169 if (i->sibIndex() != 4)
5170 eaddr += BX_READ_32BIT_REG(i->sibIndex()) << i->sibScale();
5171 return eaddr & i->asize_mask();
5172 }
5173
5174 #include "stack.h"
5175
5176 #define PRESERVE_RSP { BX_CPU_THIS_PTR prev_rsp = RSP; }
5177 #if BX_SUPPORT_CET
5178 #define PRESERVE_SSP { BX_CPU_THIS_PTR prev_ssp = SSP; }
5179 #else
5180 #define PRESERVE_SSP
5181 #endif
5182
5183 #define RSP_SPECULATIVE { \
5184 BX_CPU_THIS_PTR speculative_rsp = 1; \
5185 PRESERVE_RSP; \
5186 PRESERVE_SSP; \
5187 }
5188
5189 #define RSP_COMMIT { BX_CPU_THIS_PTR speculative_rsp = 0; }
5190
5191 #endif // defined(NEED_CPU_REG_SHORTCUTS)
5192
5193 //
5194 // bit 0 - CS.D_B
5195 // bit 1 - long64 mode (CS.L)
5196 // bit 2 - SSE_OK
5197 // bit 3 - AVX_OK
5198 // bit 4 - OPMASK_OK
5199 // bit 5 - EVEX_OK
5200 //
5201
5202 enum {
5203 BX_FETCH_MODE_IS32_MASK = (1 << 0),
5204 BX_FETCH_MODE_IS64_MASK = (1 << 1),
5205 BX_FETCH_MODE_SSE_OK = (1 << 2),
5206 BX_FETCH_MODE_AVX_OK = (1 << 3),
5207 BX_FETCH_MODE_OPMASK_OK = (1 << 4),
5208 BX_FETCH_MODE_EVEX_OK = (1 << 5)
5209 };
5210
5211 //
5212 // updateFetchModeMask - has to be called everytime
5213 // CS.L / CS.D_B / CR0.PE, CR0.TS or CR0.EM / CR4.OSFXSR / CR4.OSXSAVE changes
5214 //
updateFetchModeMask(void)5215 BX_CPP_INLINE void BX_CPU_C::updateFetchModeMask(void)
5216 {
5217 BX_CPU_THIS_PTR fetchModeMask =
5218 #if BX_CPU_LEVEL >= 6
5219 #if BX_SUPPORT_EVEX
5220 (BX_CPU_THIS_PTR evex_ok << 5) | (BX_CPU_THIS_PTR opmask_ok << 4) |
5221 #endif
5222 #if BX_SUPPORT_AVX
5223 (BX_CPU_THIS_PTR avx_ok << 3) |
5224 #endif
5225 (BX_CPU_THIS_PTR sse_ok << 2) |
5226 #endif
5227 #if BX_SUPPORT_X86_64
5228 ((BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64)<<1) |
5229 #endif
5230 unsigned(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b); // typecast to keep MSVC warnings silent
5231
5232 BX_CPU_THIS_PTR user_pl = // CPL == 3
5233 (BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.rpl == 3);
5234 }
5235
5236 #if BX_X86_DEBUGGER
5237 enum {
5238 BX_HWDebugInstruction = 0x00,
5239 BX_HWDebugMemW = 0x01,
5240 BX_HWDebugIO = 0x02,
5241 BX_HWDebugMemRW = 0x03
5242 };
5243 #endif
5244
get_segment_base(unsigned seg)5245 BX_CPP_INLINE bx_address BX_CPU_C::get_segment_base(unsigned seg)
5246 {
5247 #if BX_SUPPORT_X86_64
5248 if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
5249 if (seg < BX_SEG_REG_FS) return 0;
5250 }
5251 #endif
5252 return BX_CPU_THIS_PTR sregs[seg].cache.u.segment.base;
5253 }
5254
get_laddr32(unsigned seg,Bit32u offset)5255 BX_CPP_INLINE Bit32u BX_CPU_C::get_laddr32(unsigned seg, Bit32u offset)
5256 {
5257 return (Bit32u) BX_CPU_THIS_PTR sregs[seg].cache.u.segment.base + offset;
5258 }
5259
5260 #if BX_SUPPORT_X86_64
get_laddr64(unsigned seg,Bit64u offset)5261 BX_CPP_INLINE Bit64u BX_CPU_C::get_laddr64(unsigned seg, Bit64u offset)
5262 {
5263 if (seg < BX_SEG_REG_FS)
5264 return offset;
5265 else
5266 return BX_CPU_THIS_PTR sregs[seg].cache.u.segment.base + offset;
5267 }
5268 #endif
5269
get_laddr(unsigned seg,bx_address offset)5270 BX_CPP_INLINE bx_address BX_CPU_C::get_laddr(unsigned seg, bx_address offset)
5271 {
5272 #if BX_SUPPORT_X86_64
5273 if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
5274 return get_laddr64(seg, offset);
5275 }
5276 #endif
5277 return get_laddr32(seg, (Bit32u) offset);
5278 }
5279
5280 // same as agen_read32 but also allow access to execute only segments
agen_read_execute32(unsigned s,Bit32u offset,unsigned len)5281 BX_CPP_INLINE Bit32u BX_CPU_C::agen_read_execute32(unsigned s, Bit32u offset, unsigned len)
5282 {
5283 bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
5284
5285 if (seg->cache.valid & SegAccessROK4G) {
5286 return offset;
5287 }
5288
5289 if (seg->cache.valid & SegAccessROK) {
5290 if (offset <= (seg->cache.u.segment.limit_scaled-len+1)) {
5291 return get_laddr32(s, offset);
5292 }
5293 }
5294
5295 if (!execute_virtual_checks(seg, offset, len))
5296 exception(int_number(s), 0);
5297
5298 return get_laddr32(s, offset);
5299 }
5300
agen_read32(unsigned s,Bit32u offset,unsigned len)5301 BX_CPP_INLINE Bit32u BX_CPU_C::agen_read32(unsigned s, Bit32u offset, unsigned len)
5302 {
5303 bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
5304
5305 if (seg->cache.valid & SegAccessROK4G) {
5306 return offset;
5307 }
5308
5309 if (seg->cache.valid & SegAccessROK) {
5310 if (offset <= (seg->cache.u.segment.limit_scaled-len+1)) {
5311 return get_laddr32(s, offset);
5312 }
5313 }
5314
5315 if (!read_virtual_checks(seg, offset, len))
5316 exception(int_number(s), 0);
5317
5318 return get_laddr32(s, offset);
5319 }
5320
agen_read_aligned32(unsigned s,Bit32u offset,unsigned len)5321 BX_CPP_INLINE Bit32u BX_CPU_C::agen_read_aligned32(unsigned s, Bit32u offset, unsigned len)
5322 {
5323 bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
5324
5325 if (seg->cache.valid & SegAccessROK4G) {
5326 return offset;
5327 }
5328
5329 if (seg->cache.valid & SegAccessROK) {
5330 if (offset <= (seg->cache.u.segment.limit_scaled-len+1)) {
5331 return get_laddr32(s, offset);
5332 }
5333 }
5334
5335 if (!read_virtual_checks(seg, offset, len, true /* aligned */))
5336 exception(int_number(s), 0);
5337
5338 return get_laddr32(s, offset);
5339 }
5340
agen_write32(unsigned s,Bit32u offset,unsigned len)5341 BX_CPP_INLINE Bit32u BX_CPU_C::agen_write32(unsigned s, Bit32u offset, unsigned len)
5342 {
5343 bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
5344
5345 if (seg->cache.valid & SegAccessWOK4G) {
5346 return offset;
5347 }
5348
5349 if (seg->cache.valid & SegAccessWOK) {
5350 if (offset <= (seg->cache.u.segment.limit_scaled-len+1)) {
5351 return get_laddr32(s, offset);
5352 }
5353 }
5354
5355 if (!write_virtual_checks(seg, offset, len))
5356 exception(int_number(s), 0);
5357
5358 return get_laddr32(s, offset);
5359 }
5360
agen_write_aligned32(unsigned s,Bit32u offset,unsigned len)5361 BX_CPP_INLINE Bit32u BX_CPU_C::agen_write_aligned32(unsigned s, Bit32u offset, unsigned len)
5362 {
5363 bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
5364
5365 if (seg->cache.valid & SegAccessWOK4G) {
5366 return offset;
5367 }
5368
5369 if (seg->cache.valid & SegAccessWOK) {
5370 if (offset <= (seg->cache.u.segment.limit_scaled-len+1)) {
5371 return get_laddr32(s, offset);
5372 }
5373 }
5374
5375 if (!write_virtual_checks(seg, offset, len, true /* aligned */))
5376 exception(int_number(s), 0);
5377
5378 return get_laddr32(s, offset);
5379 }
5380
agen_read(unsigned s,bx_address offset,unsigned len)5381 BX_CPP_INLINE bx_address BX_CPU_C::agen_read(unsigned s, bx_address offset, unsigned len)
5382 {
5383 #if BX_SUPPORT_X86_64
5384 if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
5385 return get_laddr64(s, offset);
5386 }
5387 #endif
5388 return agen_read32(s, (Bit32u)offset, len);
5389 }
5390
agen_read_aligned(unsigned s,bx_address offset,unsigned len)5391 BX_CPP_INLINE bx_address BX_CPU_C::agen_read_aligned(unsigned s, bx_address offset, unsigned len)
5392 {
5393 #if BX_SUPPORT_X86_64
5394 if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
5395 return get_laddr64(s, offset);
5396 }
5397 #endif
5398 return agen_read_aligned32(s, (Bit32u)offset, len);
5399 }
5400
agen_write(unsigned s,bx_address offset,unsigned len)5401 BX_CPP_INLINE bx_address BX_CPU_C::agen_write(unsigned s, bx_address offset, unsigned len)
5402 {
5403 #if BX_SUPPORT_X86_64
5404 if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
5405 return get_laddr64(s, offset);
5406 }
5407 #endif
5408 return agen_write32(s, (Bit32u)offset, len);
5409 }
5410
agen_write_aligned(unsigned s,bx_address offset,unsigned len)5411 BX_CPP_INLINE bx_address BX_CPU_C::agen_write_aligned(unsigned s, bx_address offset, unsigned len)
5412 {
5413 #if BX_SUPPORT_X86_64
5414 if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
5415 return get_laddr64(s, offset);
5416 }
5417 #endif
5418 return agen_write_aligned32(s, (Bit32u)offset, len);
5419 }
5420
5421 #include "access.h"
5422
get_reg8l(unsigned reg)5423 BX_CPP_INLINE Bit8u BX_CPU_C::get_reg8l(unsigned reg)
5424 {
5425 assert(reg < BX_GENERAL_REGISTERS);
5426 return (BX_CPU_THIS_PTR gen_reg[reg].word.byte.rl);
5427 }
5428
set_reg8l(unsigned reg,Bit8u val)5429 BX_CPP_INLINE void BX_CPU_C::set_reg8l(unsigned reg, Bit8u val)
5430 {
5431 assert(reg < BX_GENERAL_REGISTERS);
5432 BX_CPU_THIS_PTR gen_reg[reg].word.byte.rl = val;
5433 }
5434
get_reg8h(unsigned reg)5435 BX_CPP_INLINE Bit8u BX_CPU_C::get_reg8h(unsigned reg)
5436 {
5437 assert(reg < BX_GENERAL_REGISTERS);
5438 return (BX_CPU_THIS_PTR gen_reg[reg].word.byte.rh);
5439 }
5440
set_reg8h(unsigned reg,Bit8u val)5441 BX_CPP_INLINE void BX_CPU_C::set_reg8h(unsigned reg, Bit8u val)
5442 {
5443 assert(reg < BX_GENERAL_REGISTERS);
5444 BX_CPU_THIS_PTR gen_reg[reg].word.byte.rh = val;
5445 }
5446
5447 #if BX_SUPPORT_X86_64
get_instruction_pointer(void)5448 BX_CPP_INLINE bx_address BX_CPU_C::get_instruction_pointer(void)
5449 {
5450 return BX_CPU_THIS_PTR get_rip();
5451 }
5452 #else
get_instruction_pointer(void)5453 BX_CPP_INLINE bx_address BX_CPU_C::get_instruction_pointer(void)
5454 {
5455 return BX_CPU_THIS_PTR get_eip();
5456 }
5457 #endif
5458
get_reg16(unsigned reg)5459 BX_CPP_INLINE Bit16u BX_CPU_C::get_reg16(unsigned reg)
5460 {
5461 assert(reg < BX_GENERAL_REGISTERS);
5462 return (BX_CPU_THIS_PTR gen_reg[reg].word.rx);
5463 }
5464
set_reg16(unsigned reg,Bit16u val)5465 BX_CPP_INLINE void BX_CPU_C::set_reg16(unsigned reg, Bit16u val)
5466 {
5467 assert(reg < BX_GENERAL_REGISTERS);
5468 BX_CPU_THIS_PTR gen_reg[reg].word.rx = val;
5469 }
5470
get_reg32(unsigned reg)5471 BX_CPP_INLINE Bit32u BX_CPU_C::get_reg32(unsigned reg)
5472 {
5473 assert(reg < BX_GENERAL_REGISTERS);
5474 return (BX_CPU_THIS_PTR gen_reg[reg].dword.erx);
5475 }
5476
set_reg32(unsigned reg,Bit32u val)5477 BX_CPP_INLINE void BX_CPU_C::set_reg32(unsigned reg, Bit32u val)
5478 {
5479 assert(reg < BX_GENERAL_REGISTERS);
5480 BX_CPU_THIS_PTR gen_reg[reg].dword.erx = val;
5481 }
5482
5483 #if BX_SUPPORT_X86_64
get_reg64(unsigned reg)5484 BX_CPP_INLINE Bit64u BX_CPU_C::get_reg64(unsigned reg)
5485 {
5486 assert(reg < BX_GENERAL_REGISTERS);
5487 return (BX_CPU_THIS_PTR gen_reg[reg].rrx);
5488 }
5489
set_reg64(unsigned reg,Bit64u val)5490 BX_CPP_INLINE void BX_CPU_C::set_reg64(unsigned reg, Bit64u val)
5491 {
5492 assert(reg < BX_GENERAL_REGISTERS);
5493 BX_CPU_THIS_PTR gen_reg[reg].rrx = val;
5494 }
5495 #endif
5496
5497 #if BX_SUPPORT_EVEX
get_opmask(unsigned reg)5498 BX_CPP_INLINE Bit64u BX_CPU_C::get_opmask(unsigned reg)
5499 {
5500 assert(reg < 8);
5501 return (BX_CPU_THIS_PTR opmask[reg].rrx);
5502 }
5503
set_opmask(unsigned reg,Bit64u val)5504 BX_CPP_INLINE void BX_CPU_C::set_opmask(unsigned reg, Bit64u val)
5505 {
5506 assert(reg < 8);
5507 BX_CPU_THIS_PTR opmask[reg].rrx = val;
5508 }
5509 #endif
5510
5511 #if BX_CPU_LEVEL >= 6
5512 // CR8 is aliased to APIC->TASK PRIORITY register
5513 // APIC.TPR[7:4] = CR8[3:0]
5514 // APIC.TPR[3:0] = 0
5515 // Reads of CR8 return zero extended APIC.TPR[7:4]
get_cr8(void)5516 BX_CPP_INLINE unsigned BX_CPU_C::get_cr8(void)
5517 {
5518 return (BX_CPU_THIS_PTR lapic.get_tpr() >> 4) & 0xf;
5519 }
5520 #endif
5521
real_mode(void)5522 BX_CPP_INLINE bool BX_CPU_C::real_mode(void)
5523 {
5524 return (BX_CPU_THIS_PTR cpu_mode == BX_MODE_IA32_REAL);
5525 }
5526
smm_mode(void)5527 BX_CPP_INLINE bool BX_CPU_C::smm_mode(void)
5528 {
5529 return (BX_CPU_THIS_PTR in_smm);
5530 }
5531
v8086_mode(void)5532 BX_CPP_INLINE bool BX_CPU_C::v8086_mode(void)
5533 {
5534 return (BX_CPU_THIS_PTR cpu_mode == BX_MODE_IA32_V8086);
5535 }
5536
protected_mode(void)5537 BX_CPP_INLINE bool BX_CPU_C::protected_mode(void)
5538 {
5539 return (BX_CPU_THIS_PTR cpu_mode >= BX_MODE_IA32_PROTECTED);
5540 }
5541
long_mode(void)5542 BX_CPP_INLINE bool BX_CPU_C::long_mode(void)
5543 {
5544 #if BX_SUPPORT_X86_64
5545 return BX_CPU_THIS_PTR efer.get_LMA();
5546 #else
5547 return 0;
5548 #endif
5549 }
5550
long64_mode(void)5551 BX_CPP_INLINE bool BX_CPU_C::long64_mode(void)
5552 {
5553 #if BX_SUPPORT_X86_64
5554 return (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
5555 #else
5556 return 0;
5557 #endif
5558 }
5559
get_cpu_mode(void)5560 BX_CPP_INLINE unsigned BX_CPU_C::get_cpu_mode(void)
5561 {
5562 return (BX_CPU_THIS_PTR cpu_mode);
5563 }
5564
5565 #if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
alignment_check(void)5566 BX_CPP_INLINE bool BX_CPU_C::alignment_check(void)
5567 {
5568 return BX_CPU_THIS_PTR alignment_check_mask;
5569 }
5570 #endif
5571
5572 IMPLEMENT_EFLAG_ACCESSOR (ID, 21)
5573 IMPLEMENT_EFLAG_ACCESSOR (VIP, 20)
5574 IMPLEMENT_EFLAG_ACCESSOR (VIF, 19)
5575 IMPLEMENT_EFLAG_ACCESSOR (AC, 18)
5576 IMPLEMENT_EFLAG_ACCESSOR (VM, 17)
5577 IMPLEMENT_EFLAG_ACCESSOR (RF, 16)
5578 IMPLEMENT_EFLAG_ACCESSOR (NT, 14)
5579 IMPLEMENT_EFLAG_ACCESSOR_IOPL( 12)
5580 IMPLEMENT_EFLAG_ACCESSOR (DF, 10)
5581 IMPLEMENT_EFLAG_ACCESSOR (IF, 9)
5582 IMPLEMENT_EFLAG_ACCESSOR (TF, 8)
5583
5584 IMPLEMENT_EFLAG_SET_ACCESSOR (ID, 21)
5585 IMPLEMENT_EFLAG_SET_ACCESSOR (VIP, 20)
5586 IMPLEMENT_EFLAG_SET_ACCESSOR (VIF, 19)
5587 #if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
5588 IMPLEMENT_EFLAG_SET_ACCESSOR_AC( 18)
5589 #else
5590 IMPLEMENT_EFLAG_SET_ACCESSOR (AC, 18)
5591 #endif
5592 IMPLEMENT_EFLAG_SET_ACCESSOR_VM( 17)
5593 IMPLEMENT_EFLAG_SET_ACCESSOR_RF( 16)
5594 IMPLEMENT_EFLAG_SET_ACCESSOR (NT, 14)
5595 IMPLEMENT_EFLAG_SET_ACCESSOR (DF, 10)
5596 IMPLEMENT_EFLAG_SET_ACCESSOR_IF( 9)
5597 IMPLEMENT_EFLAG_SET_ACCESSOR_TF( 8)
5598
5599 // hardware task switching
5600 enum {
5601 BX_TASK_FROM_CALL = 0,
5602 BX_TASK_FROM_IRET = 1,
5603 BX_TASK_FROM_JUMP = 2,
5604 BX_TASK_FROM_INT = 3
5605 };
5606
5607 // exception types for interrupt method
5608 enum {
5609 BX_EXTERNAL_INTERRUPT = 0,
5610 BX_NMI = 2,
5611 BX_HARDWARE_EXCEPTION = 3, // all exceptions except #BP and #OF
5612 BX_SOFTWARE_INTERRUPT = 4,
5613 BX_PRIVILEGED_SOFTWARE_INTERRUPT = 5,
5614 BX_SOFTWARE_EXCEPTION = 6
5615 };
5616
5617 #if BX_CPU_LEVEL >= 6
5618 enum {
5619 BX_INVPCID_INDIVIDUAL_ADDRESS_NON_GLOBAL_INVALIDATION,
5620 BX_INVPCID_SINGLE_CONTEXT_NON_GLOBAL_INVALIDATION,
5621 BX_INVPCID_ALL_CONTEXT_INVALIDATION,
5622 BX_INVPCID_ALL_CONTEXT_NON_GLOBAL_INVALIDATION
5623 };
5624 #endif
5625
5626 class bxInstruction_c;
5627
5628 #if BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS
5629
5630 #define BX_COMMIT_INSTRUCTION(i) { \
5631 BX_CPU_THIS_PTR prev_rip = RIP; /* commit new RIP */ \
5632 BX_INSTR_AFTER_EXECUTION(BX_CPU_ID, (i)); \
5633 BX_CPU_THIS_PTR icount++; \
5634 }
5635
5636 #define BX_EXECUTE_INSTRUCTION(i) { \
5637 BX_INSTR_BEFORE_EXECUTION(BX_CPU_ID, (i)); \
5638 RIP += (i)->ilen(); \
5639 return BX_CPU_CALL_METHOD(i->execute1, (i)); \
5640 }
5641
5642 #define BX_NEXT_TRACE(i) { \
5643 BX_COMMIT_INSTRUCTION(i); \
5644 return; \
5645 }
5646
5647 #if BX_ENABLE_TRACE_LINKING == 0
5648 #define linkTrace(i)
5649 #endif
5650
5651 #define BX_LINK_TRACE(i) { \
5652 BX_COMMIT_INSTRUCTION(i); \
5653 linkTrace(i); \
5654 return; \
5655 }
5656
5657 #define BX_NEXT_INSTR(i) { \
5658 BX_COMMIT_INSTRUCTION(i); \
5659 if (BX_CPU_THIS_PTR async_event) return; \
5660 ++i; \
5661 BX_EXECUTE_INSTRUCTION(i); \
5662 }
5663
5664 #else // BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS
5665
5666 #define BX_NEXT_TRACE(i) { return; }
5667 #define BX_NEXT_INSTR(i) { return; }
5668 #define BX_LINK_TRACE(i) { return; }
5669
5670 #endif
5671
5672 #endif // #ifndef BX_CPU_H
5673