1 
2 // Game_Music_Emu 0.3.0. http://www.slack.net/~ant/
3 
4 /***********************************************************************************
5 
6   emu2413.c -- YM2413 emulator written by Mitsutaka Okazaki 2001
7 
8   2001 01-08 : Version 0.10 -- 1st version.
9   2001 01-15 : Version 0.20 -- semi-public version.
10   2001 01-16 : Version 0.30 -- 1st public version.
11   2001 01-17 : Version 0.31 -- Fixed bassdrum problem.
12              : Version 0.32 -- LPF implemented.
13   2001 01-18 : Version 0.33 -- Fixed the drum problem, refine the mix-down method.
14                             -- Fixed the LFO bug.
15   2001 01-24 : Version 0.35 -- Fixed the drum problem,
16                                support undocumented EG behavior.
17   2001 02-02 : Version 0.38 -- Improved the performance.
18                                Fixed the hi-hat and cymbal model.
19                                Fixed the default percussive datas.
20                                Noise reduction.
21                                Fixed the feedback problem.
22   2001 03-03 : Version 0.39 -- Fixed some drum bugs.
23                                Improved the performance.
24   2001 03-04 : Version 0.40 -- Improved the feedback.
25                                Change the default table size.
26                                Clock and Rate can be changed during play.
27   2001 06-24 : Version 0.50 -- Improved the hi-hat and the cymbal tone.
28                                Added VRC7 patch (OPLL_reset_patch is changed).
29                                Fixed OPLL_reset() bug.
30                                Added OPLL_setMask, OPLL_getMask and OPLL_toggleMask.
31                                Added OPLL_writeIO.
32   2001 09-28 : Version 0.51 -- Removed the noise table.
33   2002 01-28 : Version 0.52 -- Added Stereo mode.
34   2002 02-07 : Version 0.53 -- Fixed some drum bugs.
35   2002 02-20 : Version 0.54 -- Added the best quality mode.
36   2002 03-02 : Version 0.55 -- Removed OPLL_init & OPLL_close.
37   2002 05-30 : Version 0.60 -- Fixed HH&CYM generator and all voice datas.
38   2004 04-10 : Version 0.61 -- Added YMF281B tone (defined by Chabin).
39 
40   References:
41     fmopl.c        -- 1999,2000 written by Tatsuyuki Satoh (MAME development).
42     fmopl.c(fixed) -- (C) 2002 Jarek Burczynski.
43     s_opl.c        -- 2001 written by Mamiya (NEZplug development).
44     fmgen.cpp      -- 1999,2000 written by cisc.
45     fmpac.ill      -- 2000 created by NARUTO.
46     MSX-Datapack
47     YMU757 data sheet
48     YM2143 data sheet
49 
50 **************************************************************************************/
51 
52 
53 #ifndef _EMU2413_H_
54 #define _EMU2413_H_
55 
56 typedef signed char     e_int8;
57 typedef unsigned char   e_uint8;
58 typedef signed short    e_int16;
59 typedef unsigned short  e_uint16;
60 typedef signed long     e_int32;
61 typedef unsigned long   e_uint32;
62 
63 #ifdef EMU2413_DLL_EXPORTS
64   #define EMU2413_API __declspec(dllexport)
65 #elif defined(EMU2413_DLL_IMPORTS)
66   #define EMU2413_API __declspec(dllimport)
67 #else
68   #define EMU2413_API
69 #endif
70 
71 #define PI 3.14159265358979323846
72 
73 enum OPLL_TONE_ENUM {OPLL_2413_TONE=0, OPLL_VRC7_TONE=1, OPLL_281B_TONE=2} ;
74 
75 /* voice data */
76 typedef struct __OPLL_PATCH {
77   e_uint32 TL,FB,EG,ML,AR,DR,SL,RR,KR,KL,AM,PM,WF ;
78 } OPLL_PATCH ;
79 
80 /* slot */
81 typedef struct __OPLL_SLOT {
82 
83   OPLL_PATCH *patch;
84 
85   e_int32 type ;          /* 0 : modulator 1 : carrier */
86 
87   /* OUTPUT */
88   e_int32 feedback ;
89   e_int32 output[2] ;   /* Output value of slot */
90 
91   /* for Phase Generator (PG) */
92   e_uint16 *sintbl ;    /* Wavetable */
93   e_uint32 phase ;      /* Phase */
94   e_uint32 dphase ;     /* Phase increment amount */
95   e_uint32 pgout ;      /* output */
96 
97   /* for Envelope Generator (EG) */
98   e_int32 fnum ;          /* F-Number */
99   e_int32 block ;         /* Block */
100   e_int32 volume ;        /* Current volume */
101   e_int32 sustine ;       /* Sustine 1 = ON, 0 = OFF */
102   e_uint32 tll ;          /* Total Level + Key scale level*/
103   e_uint32 rks ;        /* Key scale offset (Rks) */
104   e_int32 eg_mode ;       /* Current state */
105   e_uint32 eg_phase ;   /* Phase */
106   e_uint32 eg_dphase ;  /* Phase increment amount */
107   e_uint32 egout ;      /* output */
108 
109 } OPLL_SLOT ;
110 
111 /* Mask */
112 #define OPLL_MASK_CH(x) (1<<(x))
113 #define OPLL_MASK_HH (1<<(9))
114 #define OPLL_MASK_CYM (1<<(10))
115 #define OPLL_MASK_TOM (1<<(11))
116 #define OPLL_MASK_SD (1<<(12))
117 #define OPLL_MASK_BD (1<<(13))
118 #define OPLL_MASK_RHYTHM ( OPLL_MASK_HH | OPLL_MASK_CYM | OPLL_MASK_TOM | OPLL_MASK_SD | OPLL_MASK_BD )
119 
120 /* opll */
121 typedef struct OPLL {
122 
123   e_uint32 adr ;
124   e_int32 out ;
125 
126 #ifndef EMU2413_COMPACTION
127   e_uint32 realstep ;
128   e_uint32 oplltime ;
129   e_uint32 opllstep ;
130   e_int32 prev, next ;
131   e_int32 sprev[2],snext[2];
132   e_int32 pan[16];
133 #endif
134 
135   /* Register */
136   e_uint8 reg[0x40] ;
137   e_int32 slot_on_flag[18] ;
138 
139   /* Pitch Modulator */
140   e_uint32 pm_phase ;
141   e_int32 lfo_pm ;
142 
143   /* Amp Modulator */
144   e_int32 am_phase ;
145   e_int32 lfo_am ;
146 
147   e_uint32 quality;
148 
149   /* Noise Generator */
150   e_uint32 noise_seed ;
151 
152   /* Channel Data */
153   e_int32 patch_number[9];
154   e_int32 key_status[9] ;
155 
156   /* Slot */
157   OPLL_SLOT slot[18] ;
158 
159   /* Voice Data */
160   OPLL_PATCH patch[19*2] ;
161   e_int32 patch_update[2] ; /* flag for check patch update */
162 
163   e_uint32 mask ;
164 
165 } OPLL ;
166 
167 /* Create Object */
168 EMU2413_API OPLL *OPLL_new(e_uint32 clk, e_uint32 rate) ;
169 EMU2413_API void OPLL_delete(OPLL *) ;
170 
171 /* Setup */
172 EMU2413_API void OPLL_reset(OPLL *) ;
173 EMU2413_API void OPLL_reset_patch(OPLL *, e_int32) ;
174 EMU2413_API void OPLL_set_rate(OPLL *opll, e_uint32 r) ;
175 EMU2413_API void OPLL_set_quality(OPLL *opll, e_uint32 q) ;
176 EMU2413_API void OPLL_set_pan(OPLL *, e_uint32 ch, e_uint32 pan);
177 
178 /* Port/Register access */
179 EMU2413_API void OPLL_writeIO(OPLL *, e_uint32 reg, e_uint32 val) ;
180 EMU2413_API void OPLL_writeReg(OPLL *, e_uint32 reg, e_uint32 val) ;
181 
182 /* Synthsize */
183 EMU2413_API e_int16 OPLL_calc(OPLL *) ;
184 EMU2413_API void OPLL_calc_stereo(OPLL *, e_int32 out[2]) ;
185 
186 /* Misc */
187 EMU2413_API void OPLL_setPatch(OPLL *, const e_uint8 *dump) ;
188 EMU2413_API void OPLL_copyPatch(OPLL *, e_int32, OPLL_PATCH *) ;
189 EMU2413_API void OPLL_forceRefresh(OPLL *) ;
190 /* Utility */
191 EMU2413_API void OPLL_dump2patch(const e_uint8 *dump, OPLL_PATCH *patch) ;
192 EMU2413_API void OPLL_patch2dump(const OPLL_PATCH *patch, e_uint8 *dump) ;
193 EMU2413_API void OPLL_getDefaultPatch(e_int32 type, e_int32 num, OPLL_PATCH *) ;
194 
195 /* Channel Mask */
196 EMU2413_API e_uint32 OPLL_setMask(OPLL *, e_uint32 mask) ;
197 EMU2413_API e_uint32 OPLL_toggleMask(OPLL *, e_uint32 mask) ;
198 
199 #define dump2patch OPLL_dump2patch
200 
201 #endif
202 
203 
204 
205 #include <stdio.h>
206 #include <stdlib.h>
207 #include <string.h>
208 #include <math.h>
209 
210 #define EMU2413_COMPACTION
211 #define INLINE inline
212 
213 #ifdef EMU2413_COMPACTION
214 #define OPLL_TONE_NUM 1
215 static unsigned char default_inst[OPLL_TONE_NUM][(16 + 3) * 16] = {
216   {
217 /* YM2413 tone by okazaki@angel.ne.jp */
218 0x49,0x4c,0x4c,0x32,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
219 0x61,0x61,0x1e,0x17,0xf0,0x7f,0x00,0x17,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
220 0x13,0x41,0x16,0x0e,0xfd,0xf4,0x23,0x23,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
221 0x03,0x01,0x9a,0x04,0xf3,0xf3,0x13,0xf3,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
222 0x11,0x61,0x0e,0x07,0xfa,0x64,0x70,0x17,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
223 0x22,0x21,0x1e,0x06,0xf0,0x76,0x00,0x28,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
224 0x21,0x22,0x16,0x05,0xf0,0x71,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
225 0x21,0x61,0x1d,0x07,0x82,0x80,0x17,0x17,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
226 0x23,0x21,0x2d,0x16,0x90,0x90,0x00,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
227 0x21,0x21,0x1b,0x06,0x64,0x65,0x10,0x17,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
228 0x21,0x21,0x0b,0x1a,0x85,0xa0,0x70,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
229 0x23,0x01,0x83,0x10,0xff,0xb4,0x10,0xf4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
230 0x97,0xc1,0x20,0x07,0xff,0xf4,0x22,0x22,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
231 0x61,0x00,0x0c,0x05,0xc2,0xf6,0x40,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
232 0x01,0x01,0x56,0x03,0x94,0xc2,0x03,0x12,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
233 0x21,0x01,0x89,0x03,0xf1,0xe4,0xf0,0x23,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
234 0x07,0x21,0x14,0x00,0xee,0xf8,0xff,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
235 0x01,0x31,0x00,0x00,0xf8,0xf7,0xf8,0xf7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
236 0x25,0x11,0x00,0x00,0xf8,0xfa,0xf8,0x55,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
237   }
238 };
239 #else
240 #define OPLL_TONE_NUM 3
241 static unsigned char default_inst[OPLL_TONE_NUM][(16 + 3) * 16] = {
242   {
243 #include "2413tone.h"
244   },
245   {
246 #include "vrc7tone.h"
247    },
248   {
249 #include "281btone.h"
250   }
251 };
252 #endif
253 
254 /* Size of Sintable ( 8 -- 18 can be used. 9 recommended.) */
255 #define PG_BITS 9
256 #define PG_WIDTH (1<<PG_BITS)
257 
258 /* Phase increment counter */
259 #define DP_BITS 18
260 #define DP_WIDTH (1<<DP_BITS)
261 #define DP_BASE_BITS (DP_BITS - PG_BITS)
262 
263 /* Dynamic range (Accuracy of sin table) */
264 #define DB_BITS 8
265 #define DB_STEP (48.0/(1<<DB_BITS))
266 #define DB_MUTE (1<<DB_BITS)
267 
268 /* Dynamic range of envelope */
269 #define EG_STEP 0.375
270 #define EG_BITS 7
271 #define EG_MUTE (1<<EG_BITS)
272 
273 /* Dynamic range of total level */
274 #define TL_STEP 0.75
275 #define TL_BITS 6
276 #define TL_MUTE (1<<TL_BITS)
277 
278 /* Dynamic range of sustine level */
279 #define SL_STEP 3.0
280 #define SL_BITS 4
281 #define SL_MUTE (1<<SL_BITS)
282 
283 #define EG2DB(d) ((d)*(e_int32)(EG_STEP/DB_STEP))
284 #define TL2EG(d) ((d)*(e_int32)(TL_STEP/EG_STEP))
285 #define SL2EG(d) ((d)*(e_int32)(SL_STEP/EG_STEP))
286 
287 #define DB_POS(x) (e_uint32)((x)/DB_STEP)
288 #define DB_NEG(x) (e_uint32)(DB_MUTE+DB_MUTE+(x)/DB_STEP)
289 
290 /* Bits for liner value */
291 #define DB2LIN_AMP_BITS 8
292 #define SLOT_AMP_BITS (DB2LIN_AMP_BITS)
293 
294 /* Bits for envelope phase incremental counter */
295 #define EG_DP_BITS 22
296 #define EG_DP_WIDTH (1<<EG_DP_BITS)
297 
298 /* Bits for Pitch and Amp modulator */
299 #define PM_PG_BITS 8
300 #define PM_PG_WIDTH (1<<PM_PG_BITS)
301 #define PM_DP_BITS 16
302 #define PM_DP_WIDTH (1<<PM_DP_BITS)
303 #define AM_PG_BITS 8
304 #define AM_PG_WIDTH (1<<AM_PG_BITS)
305 #define AM_DP_BITS 16
306 #define AM_DP_WIDTH (1<<AM_DP_BITS)
307 
308 /* PM table is calcurated by PM_AMP * pow(2,PM_DEPTH*sin(x)/1200) */
309 #define PM_AMP_BITS 8
310 #define PM_AMP (1<<PM_AMP_BITS)
311 
312 /* PM speed(Hz) and depth(cent) */
313 #define PM_SPEED 6.4
314 #define PM_DEPTH 13.75
315 
316 /* AM speed(Hz) and depth(dB) */
317 #define AM_SPEED 3.6413
318 #define AM_DEPTH 4.875
319 
320 /* Cut the lower b bit(s) off. */
321 #define HIGHBITS(c,b) ((c)>>(b))
322 
323 /* Leave the lower b bit(s). */
324 #define LOWBITS(c,b) ((c)&((1<<(b))-1))
325 
326 /* Expand x which is s bits to d bits. */
327 #define EXPAND_BITS(x,s,d) ((x)<<((d)-(s)))
328 
329 /* Expand x which is s bits to d bits and fill expanded bits '1' */
330 #define EXPAND_BITS_X(x,s,d) (((x)<<((d)-(s)))|((1<<((d)-(s)))-1))
331 
332 /* Adjust envelope speed which depends on sampling rate. */
333 #define RATE_ADJUST(x) (rate==49716?x:(e_uint32)((double)(x)*clk/72/rate + 0.5))        /* added 0.5 to round the value*/
334 
335 #define MOD(o,x) (&(o)->slot[(x)<<1])
336 #define CAR(o,x) (&(o)->slot[((x)<<1)|1])
337 
338 #define BIT(s,b) (((s)>>(b))&1)
339 
340 /* Input clock */
341 static e_uint32 clk = 844451141;
342 /* Sampling rate */
343 static e_uint32 rate = 3354932;
344 
345 /* WaveTable for each envelope amp */
346 static e_uint16 fullsintable[PG_WIDTH];
347 static e_uint16 halfsintable[PG_WIDTH];
348 
349 static e_uint16 *waveform[2] = { fullsintable, halfsintable };
350 
351 /* LFO Table */
352 static e_int32 pmtable[PM_PG_WIDTH];
353 static e_int32 amtable[AM_PG_WIDTH];
354 
355 /* Phase delta for LFO */
356 static e_uint32 pm_dphase;
357 static e_uint32 am_dphase;
358 
359 /* dB to Liner table */
360 static e_int16 DB2LIN_TABLE[(DB_MUTE + DB_MUTE) * 2];
361 
362 /* Liner to Log curve conversion table (for Attack rate). */
363 static e_uint16 AR_ADJUST_TABLE[1 << EG_BITS];
364 
365 /* Empty voice data */
366 static OPLL_PATCH null_patch = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
367 
368 /* Basic voice Data */
369 static OPLL_PATCH default_patch[OPLL_TONE_NUM][(16 + 3) * 2];
370 
371 /* Definition of envelope mode */
372 enum OPLL_EG_STATE
373 { READY, ATTACK, DECAY, SUSHOLD, SUSTINE, RELEASE, SETTLE, FINISH };
374 
375 /* Phase incr table for Attack */
376 static e_uint32 dphaseARTable[16][16];
377 /* Phase incr table for Decay and Release */
378 static e_uint32 dphaseDRTable[16][16];
379 
380 /* KSL + TL Table */
381 static e_uint32 tllTable[16][8][1 << TL_BITS][4];
382 static e_int32 rksTable[2][8][2];
383 
384 /* Phase incr table for PG */
385 static e_uint32 dphaseTable[512][8][16];
386 
387 /***************************************************
388 
389                   Create tables
390 
391 ****************************************************/
392 INLINE static e_int32
Min(e_int32 i,e_int32 j)393 Min (e_int32 i, e_int32 j)
394 {
395   if (i < j)
396     return i;
397   else
398     return j;
399 }
400 
401 /* Table for AR to LogCurve. */
402 static void
makeAdjustTable(void)403 makeAdjustTable (void)
404 {
405   e_int32 i;
406 
407   AR_ADJUST_TABLE[0] = (1 << EG_BITS) - 1;
408   for (i = 1; i < (1<<EG_BITS); i++)
409     AR_ADJUST_TABLE[i] = (e_uint16) ((double) (1<<EG_BITS)-1 - ((1<<EG_BITS)-1)*log(i)/log(127));
410 }
411 
412 
413 /* Table for dB(0 -- (1<<DB_BITS)-1) to Liner(0 -- DB2LIN_AMP_WIDTH) */
414 static void
makeDB2LinTable(void)415 makeDB2LinTable (void)
416 {
417   e_int32 i;
418 
419   for (i = 0; i < DB_MUTE + DB_MUTE; i++)
420   {
421     DB2LIN_TABLE[i] = (e_int16) ((double) ((1 << DB2LIN_AMP_BITS) - 1) * pow (10, -(double) i * DB_STEP / 20));
422     if (i >= DB_MUTE) DB2LIN_TABLE[i] = 0;
423     DB2LIN_TABLE[i + DB_MUTE + DB_MUTE] = (e_int16) (-DB2LIN_TABLE[i]);
424   }
425 }
426 
427 /* Liner(+0.0 - +1.0) to dB((1<<DB_BITS) - 1 -- 0) */
428 static e_int32
lin2db(double d)429 lin2db (double d)
430 {
431   if (d == 0)
432     return (DB_MUTE - 1);
433   else
434     return Min (-(e_int32) (20.0 * log10 (d) / DB_STEP), DB_MUTE-1);  /* 0 -- 127 */
435 }
436 
437 
438 /* Sin Table */
439 static void
makeSinTable(void)440 makeSinTable (void)
441 {
442   e_int32 i;
443 
444   for (i = 0; i < PG_WIDTH / 4; i++)
445   {
446     fullsintable[i] = (e_uint32) lin2db (sin (2.0 * PI * i / PG_WIDTH) );
447   }
448 
449   for (i = 0; i < PG_WIDTH / 4; i++)
450   {
451     fullsintable[PG_WIDTH / 2 - 1 - i] = fullsintable[i];
452   }
453 
454   for (i = 0; i < PG_WIDTH / 2; i++)
455   {
456     fullsintable[PG_WIDTH / 2 + i] = (e_uint32) (DB_MUTE + DB_MUTE + fullsintable[i]);
457   }
458 
459   for (i = 0; i < PG_WIDTH / 2; i++)
460     halfsintable[i] = fullsintable[i];
461   for (i = PG_WIDTH / 2; i < PG_WIDTH; i++)
462     halfsintable[i] = fullsintable[0];
463 }
464 
saw(double phase)465 static double saw(double phase)
466 {
467   if(phase <= PI/2)
468     return phase * 2 / PI ;
469   else if(phase <= PI*3/2)
470     return 2.0 - ( phase * 2 / PI );
471   else
472     return -4.0 + phase * 2 / PI;
473 }
474 
475 /* Table for Pitch Modulator */
476 static void
makePmTable(void)477 makePmTable (void)
478 {
479   e_int32 i;
480 
481   for (i = 0; i < PM_PG_WIDTH; i++)
482     /* pmtable[i] = (e_int32) ((double) PM_AMP * pow (2, (double) PM_DEPTH * sin (2.0 * PI * i / PM_PG_WIDTH) / 1200)); */
483     pmtable[i] = (e_int32) ((double) PM_AMP * pow (2, (double) PM_DEPTH * saw (2.0 * PI * i / PM_PG_WIDTH) / 1200));
484 }
485 
486 /* Table for Amp Modulator */
487 static void
makeAmTable(void)488 makeAmTable (void)
489 {
490   e_int32 i;
491 
492   for (i = 0; i < AM_PG_WIDTH; i++)
493     /* amtable[i] = (e_int32) ((double) AM_DEPTH / 2 / DB_STEP * (1.0 + sin (2.0 * PI * i / PM_PG_WIDTH))); */
494     amtable[i] = (e_int32) ((double) AM_DEPTH / 2 / DB_STEP * (1.0 + saw (2.0 * PI * i / PM_PG_WIDTH)));
495 }
496 
497 /* Phase increment counter table */
498 static void
makeDphaseTable(void)499 makeDphaseTable (void)
500 {
501   e_uint32 fnum, block, ML;
502   e_uint32 mltable[16] =
503     { 1, 1 * 2, 2 * 2, 3 * 2, 4 * 2, 5 * 2, 6 * 2, 7 * 2, 8 * 2, 9 * 2, 10 * 2, 10 * 2, 12 * 2, 12 * 2, 15 * 2, 15 * 2 };
504 
505   for (fnum = 0; fnum < 512; fnum++)
506     for (block = 0; block < 8; block++)
507       for (ML = 0; ML < 16; ML++)
508         dphaseTable[fnum][block][ML] = RATE_ADJUST (((fnum * mltable[ML]) << block) >> (20 - DP_BITS));
509 }
510 
511 static void
makeTllTable(void)512 makeTllTable (void)
513 {
514 #define dB2(x) ((x)*2)
515 
516   static double kltable[16] = {
517     dB2 (0.000), dB2 (9.000), dB2 (12.000), dB2 (13.875), dB2 (15.000), dB2 (16.125), dB2 (16.875), dB2 (17.625),
518     dB2 (18.000), dB2 (18.750), dB2 (19.125), dB2 (19.500), dB2 (19.875), dB2 (20.250), dB2 (20.625), dB2 (21.000)
519   };
520 
521   e_int32 tmp;
522   e_int32 fnum, block, TL, KL;
523 
524   for (fnum = 0; fnum < 16; fnum++)
525     for (block = 0; block < 8; block++)
526       for (TL = 0; TL < 64; TL++)
527         for (KL = 0; KL < 4; KL++)
528         {
529           if (KL == 0)
530           {
531             tllTable[fnum][block][TL][KL] = TL2EG (TL);
532           }
533           else
534           {
535             tmp = (e_int32) (kltable[fnum] - dB2 (3.000) * (7 - block));
536             if (tmp <= 0)
537               tllTable[fnum][block][TL][KL] = TL2EG (TL);
538             else
539               tllTable[fnum][block][TL][KL] = (e_uint32) ((tmp >> (3 - KL)) / EG_STEP) + TL2EG (TL);
540           }
541         }
542 }
543 
544 #ifdef USE_SPEC_ENV_SPEED
545 static double attacktime[16][4] = {
546   {0, 0, 0, 0},
547   {1730.15, 1400.60, 1153.43, 988.66},
548   {865.08, 700.30, 576.72, 494.33},
549   {432.54, 350.15, 288.36, 247.16},
550   {216.27, 175.07, 144.18, 123.58},
551   {108.13, 87.54, 72.09, 61.79},
552   {54.07, 43.77, 36.04, 30.90},
553   {27.03, 21.88, 18.02, 15.45},
554   {13.52, 10.94, 9.01, 7.72},
555   {6.76, 5.47, 4.51, 3.86},
556   {3.38, 2.74, 2.25, 1.93},
557   {1.69, 1.37, 1.13, 0.97},
558   {0.84, 0.70, 0.60, 0.54},
559   {0.50, 0.42, 0.34, 0.30},
560   {0.28, 0.22, 0.18, 0.14},
561   {0.00, 0.00, 0.00, 0.00}
562 };
563 
564 static double decaytime[16][4] = {
565   {0, 0, 0, 0},
566   {20926.60, 16807.20, 14006.00, 12028.60},
567   {10463.30, 8403.58, 7002.98, 6014.32},
568   {5231.64, 4201.79, 3501.49, 3007.16},
569   {2615.82, 2100.89, 1750.75, 1503.58},
570   {1307.91, 1050.45, 875.37, 751.79},
571   {653.95, 525.22, 437.69, 375.90},
572   {326.98, 262.61, 218.84, 187.95},
573   {163.49, 131.31, 109.42, 93.97},
574   {81.74, 65.65, 54.71, 46.99},
575   {40.87, 32.83, 27.36, 23.49},
576   {20.44, 16.41, 13.68, 11.75},
577   {10.22, 8.21, 6.84, 5.87},
578   {5.11, 4.10, 3.42, 2.94},
579   {2.55, 2.05, 1.71, 1.47},
580   {1.27, 1.27, 1.27, 1.27}
581 };
582 #endif
583 
584 /* Rate Table for Attack */
585 static void
makeDphaseARTable(void)586 makeDphaseARTable (void)
587 {
588   e_int32 AR, Rks, RM, RL;
589 
590 #ifdef USE_SPEC_ENV_SPEED
591   e_uint32 attacktable[16][4];
592 
593   for (RM = 0; RM < 16; RM++)
594     for (RL = 0; RL < 4; RL++)
595     {
596       if (RM == 0)
597         attacktable[RM][RL] = 0;
598       else if (RM == 15)
599         attacktable[RM][RL] = EG_DP_WIDTH;
600       else
601         attacktable[RM][RL] = (e_uint32) ((double) (1 << EG_DP_BITS) / (attacktime[RM][RL] * 3579545 / 72000));
602 
603     }
604 #endif
605 
606   for (AR = 0; AR < 16; AR++)
607     for (Rks = 0; Rks < 16; Rks++)
608     {
609       RM = AR + (Rks >> 2);
610       RL = Rks & 3;
611       if (RM > 15)
612         RM = 15;
613       switch (AR)
614       {
615       case 0:
616         dphaseARTable[AR][Rks] = 0;
617         break;
618       case 15:
619         dphaseARTable[AR][Rks] = 0;/*EG_DP_WIDTH;*/
620         break;
621       default:
622 #ifdef USE_SPEC_ENV_SPEED
623         dphaseARTable[AR][Rks] = RATE_ADJUST (attacktable[RM][RL]);
624 #else
625         dphaseARTable[AR][Rks] = RATE_ADJUST ((3 * (RL + 4) << (RM + 1)));
626 #endif
627         break;
628       }
629     }
630 }
631 
632 /* Rate Table for Decay and Release */
633 static void
makeDphaseDRTable(void)634 makeDphaseDRTable (void)
635 {
636   e_int32 DR, Rks, RM, RL;
637 
638 #ifdef USE_SPEC_ENV_SPEED
639   e_uint32 decaytable[16][4];
640 
641   for (RM = 0; RM < 16; RM++)
642     for (RL = 0; RL < 4; RL++)
643       if (RM == 0)
644         decaytable[RM][RL] = 0;
645       else
646         decaytable[RM][RL] = (e_uint32) ((double) (1 << EG_DP_BITS) / (decaytime[RM][RL] * 3579545 / 72000));
647 #endif
648 
649   for (DR = 0; DR < 16; DR++)
650     for (Rks = 0; Rks < 16; Rks++)
651     {
652       RM = DR + (Rks >> 2);
653       RL = Rks & 3;
654       if (RM > 15)
655         RM = 15;
656       switch (DR)
657       {
658       case 0:
659         dphaseDRTable[DR][Rks] = 0;
660         break;
661       default:
662 #ifdef USE_SPEC_ENV_SPEED
663         dphaseDRTable[DR][Rks] = RATE_ADJUST (decaytable[RM][RL]);
664 #else
665         dphaseDRTable[DR][Rks] = RATE_ADJUST ((RL + 4) << (RM - 1));
666 #endif
667         break;
668       }
669     }
670 }
671 
672 static void
makeRksTable(void)673 makeRksTable (void)
674 {
675 
676   e_int32 fnum8, block, KR;
677 
678   for (fnum8 = 0; fnum8 < 2; fnum8++)
679     for (block = 0; block < 8; block++)
680       for (KR = 0; KR < 2; KR++)
681       {
682         if (KR != 0)
683           rksTable[fnum8][block][KR] = (block << 1) + fnum8;
684         else
685           rksTable[fnum8][block][KR] = block >> 1;
686       }
687 }
688 
689 void
OPLL_dump2patch(const e_uint8 * dump,OPLL_PATCH * patch)690 OPLL_dump2patch (const e_uint8 * dump, OPLL_PATCH * patch)
691 {
692   patch[0].AM = (dump[0] >> 7) & 1;
693   patch[1].AM = (dump[1] >> 7) & 1;
694   patch[0].PM = (dump[0] >> 6) & 1;
695   patch[1].PM = (dump[1] >> 6) & 1;
696   patch[0].EG = (dump[0] >> 5) & 1;
697   patch[1].EG = (dump[1] >> 5) & 1;
698   patch[0].KR = (dump[0] >> 4) & 1;
699   patch[1].KR = (dump[1] >> 4) & 1;
700   patch[0].ML = (dump[0]) & 15;
701   patch[1].ML = (dump[1]) & 15;
702   patch[0].KL = (dump[2] >> 6) & 3;
703   patch[1].KL = (dump[3] >> 6) & 3;
704   patch[0].TL = (dump[2]) & 63;
705   patch[0].FB = (dump[3]) & 7;
706   patch[0].WF = (dump[3] >> 3) & 1;
707   patch[1].WF = (dump[3] >> 4) & 1;
708   patch[0].AR = (dump[4] >> 4) & 15;
709   patch[1].AR = (dump[5] >> 4) & 15;
710   patch[0].DR = (dump[4]) & 15;
711   patch[1].DR = (dump[5]) & 15;
712   patch[0].SL = (dump[6] >> 4) & 15;
713   patch[1].SL = (dump[7] >> 4) & 15;
714   patch[0].RR = (dump[6]) & 15;
715   patch[1].RR = (dump[7]) & 15;
716 }
717 
718 void
OPLL_getDefaultPatch(e_int32 type,e_int32 num,OPLL_PATCH * patch)719 OPLL_getDefaultPatch (e_int32 type, e_int32 num, OPLL_PATCH * patch)
720 {
721   OPLL_dump2patch (default_inst[type] + num * 16, patch);
722 }
723 
724 static void
makeDefaultPatch()725 makeDefaultPatch ()
726 {
727   e_int32 i, j;
728 
729   for (i = 0; i < OPLL_TONE_NUM; i++)
730     for (j = 0; j < 19; j++)
731       OPLL_getDefaultPatch (i, j, &default_patch[i][j * 2]);
732 
733 }
734 
735 void
OPLL_setPatch(OPLL * opll,const e_uint8 * dump)736 OPLL_setPatch (OPLL * opll, const e_uint8 * dump)
737 {
738   OPLL_PATCH patch[2];
739   int i;
740 
741   for (i = 0; i < 19; i++)
742   {
743     OPLL_dump2patch (dump + i * 16, patch);
744     memcpy (&opll->patch[i*2+0], &patch[0], sizeof (OPLL_PATCH));
745     memcpy (&opll->patch[i*2+1], &patch[1], sizeof (OPLL_PATCH));
746   }
747 }
748 
749 void
OPLL_patch2dump(const OPLL_PATCH * patch,e_uint8 * dump)750 OPLL_patch2dump (const OPLL_PATCH * patch, e_uint8 * dump)
751 {
752   dump[0] = (e_uint8) ((patch[0].AM << 7) + (patch[0].PM << 6) + (patch[0].EG << 5) + (patch[0].KR << 4) + patch[0].ML);
753   dump[1] = (e_uint8) ((patch[1].AM << 7) + (patch[1].PM << 6) + (patch[1].EG << 5) + (patch[1].KR << 4) + patch[1].ML);
754   dump[2] = (e_uint8) ((patch[0].KL << 6) + patch[0].TL);
755   dump[3] = (e_uint8) ((patch[1].KL << 6) + (patch[1].WF << 4) + (patch[0].WF << 3) + patch[0].FB);
756   dump[4] = (e_uint8) ((patch[0].AR << 4) + patch[0].DR);
757   dump[5] = (e_uint8) ((patch[1].AR << 4) + patch[1].DR);
758   dump[6] = (e_uint8) ((patch[0].SL << 4) + patch[0].RR);
759   dump[7] = (e_uint8) ((patch[1].SL << 4) + patch[1].RR);
760   dump[8] = 0;
761   dump[9] = 0;
762   dump[10] = 0;
763   dump[11] = 0;
764   dump[12] = 0;
765   dump[13] = 0;
766   dump[14] = 0;
767   dump[15] = 0;
768 }
769 
770 /************************************************************
771 
772                       Calc Parameters
773 
774 ************************************************************/
775 
776 INLINE static e_uint32
calc_eg_dphase(OPLL_SLOT * slot)777 calc_eg_dphase (OPLL_SLOT * slot)
778 {
779 
780   switch (slot->eg_mode)
781   {
782   case ATTACK:
783     return dphaseARTable[slot->patch->AR][slot->rks];
784 
785   case DECAY:
786     return dphaseDRTable[slot->patch->DR][slot->rks];
787 
788   case SUSHOLD:
789     return 0;
790 
791   case SUSTINE:
792     return dphaseDRTable[slot->patch->RR][slot->rks];
793 
794   case RELEASE:
795     if (slot->sustine)
796       return dphaseDRTable[5][slot->rks];
797     else if (slot->patch->EG)
798       return dphaseDRTable[slot->patch->RR][slot->rks];
799     else
800       return dphaseDRTable[7][slot->rks];
801 
802   case SETTLE:
803     return dphaseDRTable[15][0];
804 
805   case FINISH:
806     return 0;
807 
808   default:
809     return 0;
810   }
811 }
812 
813 /*************************************************************
814 
815                     OPLL internal interfaces
816 
817 *************************************************************/
818 #define SLOT_BD1 12
819 #define SLOT_BD2 13
820 #define SLOT_HH 14
821 #define SLOT_SD 15
822 #define SLOT_TOM 16
823 #define SLOT_CYM 17
824 
825 #define UPDATE_PG(S)  (S)->dphase = dphaseTable[(S)->fnum][(S)->block][(S)->patch->ML]
826 #define UPDATE_TLL(S)\
827 (((S)->type==0)?\
828 ((S)->tll = tllTable[((S)->fnum)>>5][(S)->block][(S)->patch->TL][(S)->patch->KL]):\
829 ((S)->tll = tllTable[((S)->fnum)>>5][(S)->block][(S)->volume][(S)->patch->KL]))
830 #define UPDATE_RKS(S) (S)->rks = rksTable[((S)->fnum)>>8][(S)->block][(S)->patch->KR]
831 #define UPDATE_WF(S)  (S)->sintbl = waveform[(S)->patch->WF]
832 #define UPDATE_EG(S)  (S)->eg_dphase = calc_eg_dphase(S)
833 #define UPDATE_ALL(S)\
834   UPDATE_PG(S);\
835   UPDATE_TLL(S);\
836   UPDATE_RKS(S);\
837   UPDATE_WF(S); \
838   UPDATE_EG(S)                  /* EG should be updated last. */
839 
840 
841 /* Slot key on  */
842 INLINE static void
slotOn(OPLL_SLOT * slot)843 slotOn (OPLL_SLOT * slot)
844 {
845   slot->eg_mode = ATTACK;
846   slot->eg_phase = 0;
847   slot->phase = 0;
848   UPDATE_EG(slot);
849 }
850 
851 /* Slot key on without reseting the phase */
852 INLINE static void
slotOn2(OPLL_SLOT * slot)853 slotOn2 (OPLL_SLOT * slot)
854 {
855   slot->eg_mode = ATTACK;
856   slot->eg_phase = 0;
857   UPDATE_EG(slot);
858 }
859 
860 /* Slot key off */
861 INLINE static void
slotOff(OPLL_SLOT * slot)862 slotOff (OPLL_SLOT * slot)
863 {
864   if (slot->eg_mode == ATTACK)
865     slot->eg_phase = EXPAND_BITS (AR_ADJUST_TABLE[HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS)], EG_BITS, EG_DP_BITS);
866   slot->eg_mode = RELEASE;
867   UPDATE_EG(slot);
868 }
869 
870 /* Channel key on */
871 INLINE static void
keyOn(OPLL * opll,e_int32 i)872 keyOn (OPLL * opll, e_int32 i)
873 {
874   if (!opll->slot_on_flag[i * 2])
875     slotOn (MOD(opll,i));
876   if (!opll->slot_on_flag[i * 2 + 1])
877     slotOn (CAR(opll,i));
878   opll->key_status[i] = 1;
879 }
880 
881 /* Channel key off */
882 INLINE static void
keyOff(OPLL * opll,e_int32 i)883 keyOff (OPLL * opll, e_int32 i)
884 {
885   if (opll->slot_on_flag[i * 2 + 1])
886     slotOff (CAR(opll,i));
887   opll->key_status[i] = 0;
888 }
889 
890 INLINE static void
keyOn_BD(OPLL * opll)891 keyOn_BD (OPLL * opll)
892 {
893   keyOn (opll, 6);
894 }
895 INLINE static void
keyOn_SD(OPLL * opll)896 keyOn_SD (OPLL * opll)
897 {
898   if (!opll->slot_on_flag[SLOT_SD])
899     slotOn (CAR(opll,7));
900 }
901 INLINE static void
keyOn_TOM(OPLL * opll)902 keyOn_TOM (OPLL * opll)
903 {
904   if (!opll->slot_on_flag[SLOT_TOM])
905     slotOn (MOD(opll,8));
906 }
907 INLINE static void
keyOn_HH(OPLL * opll)908 keyOn_HH (OPLL * opll)
909 {
910   if (!opll->slot_on_flag[SLOT_HH])
911     slotOn2 (MOD(opll,7));
912 }
913 INLINE static void
keyOn_CYM(OPLL * opll)914 keyOn_CYM (OPLL * opll)
915 {
916   if (!opll->slot_on_flag[SLOT_CYM])
917     slotOn2 (CAR(opll,8));
918 }
919 
920 /* Drum key off */
921 INLINE static void
keyOff_BD(OPLL * opll)922 keyOff_BD (OPLL * opll)
923 {
924   keyOff (opll, 6);
925 }
926 INLINE static void
keyOff_SD(OPLL * opll)927 keyOff_SD (OPLL * opll)
928 {
929   if (opll->slot_on_flag[SLOT_SD])
930     slotOff (CAR(opll,7));
931 }
932 INLINE static void
keyOff_TOM(OPLL * opll)933 keyOff_TOM (OPLL * opll)
934 {
935   if (opll->slot_on_flag[SLOT_TOM])
936     slotOff (MOD(opll,8));
937 }
938 INLINE static void
keyOff_HH(OPLL * opll)939 keyOff_HH (OPLL * opll)
940 {
941   if (opll->slot_on_flag[SLOT_HH])
942     slotOff (MOD(opll,7));
943 }
944 INLINE static void
keyOff_CYM(OPLL * opll)945 keyOff_CYM (OPLL * opll)
946 {
947   if (opll->slot_on_flag[SLOT_CYM])
948     slotOff (CAR(opll,8));
949 }
950 
951 /* Change a voice */
952 INLINE static void
setPatch(OPLL * opll,e_int32 i,e_int32 num)953 setPatch (OPLL * opll, e_int32 i, e_int32 num)
954 {
955   opll->patch_number[i] = num;
956   MOD(opll,i)->patch = &opll->patch[num * 2 + 0];
957   CAR(opll,i)->patch = &opll->patch[num * 2 + 1];
958 }
959 
960 /* Change a rhythm voice */
961 INLINE static void
setSlotPatch(OPLL_SLOT * slot,OPLL_PATCH * patch)962 setSlotPatch (OPLL_SLOT * slot, OPLL_PATCH * patch)
963 {
964   slot->patch = patch;
965 }
966 
967 /* Set sustine parameter */
968 INLINE static void
setSustine(OPLL * opll,e_int32 c,e_int32 sustine)969 setSustine (OPLL * opll, e_int32 c, e_int32 sustine)
970 {
971   CAR(opll,c)->sustine = sustine;
972   if (MOD(opll,c)->type)
973     MOD(opll,c)->sustine = sustine;
974 }
975 
976 /* Volume : 6bit ( Volume register << 2 ) */
977 INLINE static void
setVolume(OPLL * opll,e_int32 c,e_int32 volume)978 setVolume (OPLL * opll, e_int32 c, e_int32 volume)
979 {
980   CAR(opll,c)->volume = volume;
981 }
982 
983 INLINE static void
setSlotVolume(OPLL_SLOT * slot,e_int32 volume)984 setSlotVolume (OPLL_SLOT * slot, e_int32 volume)
985 {
986   slot->volume = volume;
987 }
988 
989 /* Set F-Number ( fnum : 9bit ) */
990 INLINE static void
setFnumber(OPLL * opll,e_int32 c,e_int32 fnum)991 setFnumber (OPLL * opll, e_int32 c, e_int32 fnum)
992 {
993   CAR(opll,c)->fnum = fnum;
994   MOD(opll,c)->fnum = fnum;
995 }
996 
997 /* Set Block data (block : 3bit ) */
998 INLINE static void
setBlock(OPLL * opll,e_int32 c,e_int32 block)999 setBlock (OPLL * opll, e_int32 c, e_int32 block)
1000 {
1001   CAR(opll,c)->block = block;
1002   MOD(opll,c)->block = block;
1003 }
1004 
1005 /* Change Rhythm Mode */
1006 INLINE static void
update_rhythm_mode(OPLL * opll)1007 update_rhythm_mode (OPLL * opll)
1008 {
1009   if (opll->patch_number[6] & 0x10)
1010   {
1011     if (!(opll->slot_on_flag[SLOT_BD2] | (opll->reg[0x0e] & 32)))
1012     {
1013       opll->slot[SLOT_BD1].eg_mode = FINISH;
1014       opll->slot[SLOT_BD2].eg_mode = FINISH;
1015       setPatch (opll, 6, opll->reg[0x36] >> 4);
1016     }
1017   }
1018   else if (opll->reg[0x0e] & 32)
1019   {
1020     opll->patch_number[6] = 16;
1021     opll->slot[SLOT_BD1].eg_mode = FINISH;
1022     opll->slot[SLOT_BD2].eg_mode = FINISH;
1023     setSlotPatch (&opll->slot[SLOT_BD1], &opll->patch[16 * 2 + 0]);
1024     setSlotPatch (&opll->slot[SLOT_BD2], &opll->patch[16 * 2 + 1]);
1025   }
1026 
1027   if (opll->patch_number[7] & 0x10)
1028   {
1029     if (!((opll->slot_on_flag[SLOT_HH] && opll->slot_on_flag[SLOT_SD]) | (opll->reg[0x0e] & 32)))
1030     {
1031       opll->slot[SLOT_HH].type = 0;
1032       opll->slot[SLOT_HH].eg_mode = FINISH;
1033       opll->slot[SLOT_SD].eg_mode = FINISH;
1034       setPatch (opll, 7, opll->reg[0x37] >> 4);
1035     }
1036   }
1037   else if (opll->reg[0x0e] & 32)
1038   {
1039     opll->patch_number[7] = 17;
1040     opll->slot[SLOT_HH].type = 1;
1041     opll->slot[SLOT_HH].eg_mode = FINISH;
1042     opll->slot[SLOT_SD].eg_mode = FINISH;
1043     setSlotPatch (&opll->slot[SLOT_HH], &opll->patch[17 * 2 + 0]);
1044     setSlotPatch (&opll->slot[SLOT_SD], &opll->patch[17 * 2 + 1]);
1045   }
1046 
1047   if (opll->patch_number[8] & 0x10)
1048   {
1049     if (!((opll->slot_on_flag[SLOT_CYM] && opll->slot_on_flag[SLOT_TOM]) | (opll->reg[0x0e] & 32)))
1050     {
1051       opll->slot[SLOT_TOM].type = 0;
1052       opll->slot[SLOT_TOM].eg_mode = FINISH;
1053       opll->slot[SLOT_CYM].eg_mode = FINISH;
1054       setPatch (opll, 8, opll->reg[0x38] >> 4);
1055     }
1056   }
1057   else if (opll->reg[0x0e] & 32)
1058   {
1059     opll->patch_number[8] = 18;
1060     opll->slot[SLOT_TOM].type = 1;
1061     opll->slot[SLOT_TOM].eg_mode = FINISH;
1062     opll->slot[SLOT_CYM].eg_mode = FINISH;
1063     setSlotPatch (&opll->slot[SLOT_TOM], &opll->patch[18 * 2 + 0]);
1064     setSlotPatch (&opll->slot[SLOT_CYM], &opll->patch[18 * 2 + 1]);
1065   }
1066 }
1067 
1068 INLINE static void
update_key_status(OPLL * opll)1069 update_key_status (OPLL * opll)
1070 {
1071   int ch;
1072 
1073   for (ch = 0; ch < 9; ch++)
1074     opll->slot_on_flag[ch * 2] = opll->slot_on_flag[ch * 2 + 1] = (opll->reg[0x20 + ch]) & 0x10;
1075 
1076   if (opll->reg[0x0e] & 32)
1077   {
1078     opll->slot_on_flag[SLOT_BD1] |= (opll->reg[0x0e] & 0x10);
1079     opll->slot_on_flag[SLOT_BD2] |= (opll->reg[0x0e] & 0x10);
1080     opll->slot_on_flag[SLOT_SD] |= (opll->reg[0x0e] & 0x08);
1081     opll->slot_on_flag[SLOT_HH] |= (opll->reg[0x0e] & 0x01);
1082     opll->slot_on_flag[SLOT_TOM] |= (opll->reg[0x0e] & 0x04);
1083     opll->slot_on_flag[SLOT_CYM] |= (opll->reg[0x0e] & 0x02);
1084   }
1085 }
1086 
1087 void
OPLL_copyPatch(OPLL * opll,e_int32 num,OPLL_PATCH * patch)1088 OPLL_copyPatch (OPLL * opll, e_int32 num, OPLL_PATCH * patch)
1089 {
1090   memcpy (&opll->patch[num], patch, sizeof (OPLL_PATCH));
1091 }
1092 
1093 /***********************************************************
1094 
1095                       Initializing
1096 
1097 ***********************************************************/
1098 
1099 static void
OPLL_SLOT_reset(OPLL_SLOT * slot,int type)1100 OPLL_SLOT_reset (OPLL_SLOT * slot, int type)
1101 {
1102   slot->type = type;
1103   slot->sintbl = waveform[0];
1104   slot->phase = 0;
1105   slot->dphase = 0;
1106   slot->output[0] = 0;
1107   slot->output[1] = 0;
1108   slot->feedback = 0;
1109   slot->eg_mode = FINISH;
1110   slot->eg_phase = EG_DP_WIDTH;
1111   slot->eg_dphase = 0;
1112   slot->rks = 0;
1113   slot->tll = 0;
1114   slot->sustine = 0;
1115   slot->fnum = 0;
1116   slot->block = 0;
1117   slot->volume = 0;
1118   slot->pgout = 0;
1119   slot->egout = 0;
1120   slot->patch = &null_patch;
1121 }
1122 
1123 static void
internal_refresh(void)1124 internal_refresh (void)
1125 {
1126   makeDphaseTable ();
1127   makeDphaseARTable ();
1128   makeDphaseDRTable ();
1129   pm_dphase = (e_uint32) RATE_ADJUST (PM_SPEED * PM_DP_WIDTH / (clk / 72));
1130   am_dphase = (e_uint32) RATE_ADJUST (AM_SPEED * AM_DP_WIDTH / (clk / 72));
1131 }
1132 
1133 static void
maketables(e_uint32 c,e_uint32 r)1134 maketables (e_uint32 c, e_uint32 r)
1135 {
1136   if (c != clk)
1137   {
1138     clk = c;
1139     makePmTable ();
1140     makeAmTable ();
1141     makeDB2LinTable ();
1142     makeAdjustTable ();
1143     makeTllTable ();
1144     makeRksTable ();
1145     makeSinTable ();
1146     makeDefaultPatch ();
1147   }
1148 
1149   if (r != rate)
1150   {
1151     rate = r;
1152     internal_refresh ();
1153   }
1154 }
1155 
1156 OPLL *
OPLL_new(e_uint32 clk,e_uint32 rate)1157 OPLL_new (e_uint32 clk, e_uint32 rate)
1158 {
1159   OPLL *opll;
1160   e_int32 i;
1161 
1162   maketables (clk, rate);
1163 
1164   opll = (OPLL *) calloc (sizeof (OPLL), 1);
1165   if (opll == nullptr)
1166     return nullptr;
1167 
1168   for (i = 0; i < 19 * 2; i++)
1169     memcpy(&opll->patch[i],&null_patch,sizeof(OPLL_PATCH));
1170 
1171   opll->mask = 0;
1172 
1173   OPLL_reset (opll);
1174   OPLL_reset_patch (opll, 0);
1175 
1176   return opll;
1177 }
1178 
1179 
1180 void
OPLL_delete(OPLL * opll)1181 OPLL_delete (OPLL * opll)
1182 {
1183   free (opll);
1184 }
1185 
1186 
1187 /* Reset patch datas by system default. */
1188 void
OPLL_reset_patch(OPLL * opll,e_int32 type)1189 OPLL_reset_patch (OPLL * opll, e_int32 type)
1190 {
1191   e_int32 i;
1192 
1193   for (i = 0; i < 19 * 2; i++)
1194     OPLL_copyPatch (opll, i, &default_patch[type % OPLL_TONE_NUM][i]);
1195 }
1196 
1197 /* Reset whole of OPLL except patch datas. */
1198 void
OPLL_reset(OPLL * opll)1199 OPLL_reset (OPLL * opll)
1200 {
1201   e_int32 i;
1202 
1203   if (!opll)
1204     return;
1205 
1206   opll->adr = 0;
1207   opll->out = 0;
1208 
1209   opll->pm_phase = 0;
1210   opll->am_phase = 0;
1211 
1212   opll->noise_seed = 0xffff;
1213   opll->mask = 0;
1214 
1215   for (i = 0; i <18; i++)
1216     OPLL_SLOT_reset(&opll->slot[i], i%2);
1217 
1218   for (i = 0; i < 9; i++)
1219   {
1220     opll->key_status[i] = 0;
1221     setPatch (opll, i, 0);
1222   }
1223 
1224   for (i = 0; i < 0x40; i++)
1225     OPLL_writeReg (opll, i, 0);
1226 
1227 #ifndef EMU2413_COMPACTION
1228   opll->realstep = (e_uint32) ((1 << 31) / rate);
1229   opll->opllstep = (e_uint32) ((1 << 31) / (clk / 72));
1230   opll->oplltime = 0;
1231   for (i = 0; i < 14; i++)
1232     opll->pan[i] = 127; /* Maxim: pan is 0..255 */
1233   opll->sprev[0] = opll->sprev[1] = 0;
1234   opll->snext[0] = opll->snext[1] = 0;
1235 #endif
1236 }
1237 
1238 /* Force Refresh (When external program changes some parameters). */
1239 void
OPLL_forceRefresh(OPLL * opll)1240 OPLL_forceRefresh (OPLL * opll)
1241 {
1242   e_int32 i;
1243 
1244   if (opll == nullptr)
1245     return;
1246 
1247   for (i = 0; i < 9; i++)
1248     setPatch(opll,i,opll->patch_number[i]);
1249 
1250   for (i = 0; i < 18; i++)
1251   {
1252     UPDATE_PG (&opll->slot[i]);
1253     UPDATE_RKS (&opll->slot[i]);
1254     UPDATE_TLL (&opll->slot[i]);
1255     UPDATE_WF (&opll->slot[i]);
1256     UPDATE_EG (&opll->slot[i]);
1257   }
1258 }
1259 
1260 void
OPLL_set_rate(OPLL * opll,e_uint32 r)1261 OPLL_set_rate (OPLL * opll, e_uint32 r)
1262 {
1263   if (opll->quality)
1264     rate = 49716;
1265   else
1266     rate = r;
1267   internal_refresh ();
1268   rate = r;
1269 }
1270 
1271 void
OPLL_set_quality(OPLL * opll,e_uint32 q)1272 OPLL_set_quality (OPLL * opll, e_uint32 q)
1273 {
1274   opll->quality = q;
1275   OPLL_set_rate (opll, rate);
1276 }
1277 
1278 /*********************************************************
1279 
1280                  Generate wave data
1281 
1282 *********************************************************/
1283 /* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 2PI). */
1284 #if ( SLOT_AMP_BITS - PG_BITS ) > 0
1285 #define wave2_2pi(e)  ( (e) >> ( SLOT_AMP_BITS - PG_BITS ))
1286 #else
1287 #define wave2_2pi(e)  ( (e) << ( PG_BITS - SLOT_AMP_BITS ))
1288 #endif
1289 
1290 /* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 4PI). */
1291 #if ( SLOT_AMP_BITS - PG_BITS - 1 ) == 0
1292 #define wave2_4pi(e)  (e)
1293 #elif ( SLOT_AMP_BITS - PG_BITS - 1 ) > 0
1294 #define wave2_4pi(e)  ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 1 ))
1295 #else
1296 #define wave2_4pi(e)  ( (e) << ( 1 + PG_BITS - SLOT_AMP_BITS ))
1297 #endif
1298 
1299 /* Convert Amp(0 to EG_HEIGHT) to Phase(0 to 8PI). */
1300 #if ( SLOT_AMP_BITS - PG_BITS - 2 ) == 0
1301 #define wave2_8pi(e)  (e)
1302 #elif ( SLOT_AMP_BITS - PG_BITS - 2 ) > 0
1303 #define wave2_8pi(e)  ( (e) >> ( SLOT_AMP_BITS - PG_BITS - 2 ))
1304 #else
1305 #define wave2_8pi(e)  ( (e) << ( 2 + PG_BITS - SLOT_AMP_BITS ))
1306 #endif
1307 
1308 /* Update AM, PM unit */
1309 static void
update_ampm(OPLL * opll)1310 update_ampm (OPLL * opll)
1311 {
1312   opll->pm_phase = (opll->pm_phase + pm_dphase) & (PM_DP_WIDTH - 1);
1313   opll->am_phase = (opll->am_phase + am_dphase) & (AM_DP_WIDTH - 1);
1314   opll->lfo_am = amtable[HIGHBITS (opll->am_phase, AM_DP_BITS - AM_PG_BITS)];
1315   opll->lfo_pm = pmtable[HIGHBITS (opll->pm_phase, PM_DP_BITS - PM_PG_BITS)];
1316 }
1317 
1318 /* PG */
1319 INLINE static void
calc_phase(OPLL_SLOT * slot,e_int32 lfo)1320 calc_phase (OPLL_SLOT * slot, e_int32 lfo)
1321 {
1322   if (slot->patch->PM)
1323     slot->phase += (slot->dphase * lfo) >> PM_AMP_BITS;
1324   else
1325     slot->phase += slot->dphase;
1326 
1327   slot->phase &= (DP_WIDTH - 1);
1328 
1329   slot->pgout = HIGHBITS (slot->phase, DP_BASE_BITS);
1330 }
1331 
1332 /* Update Noise unit */
1333 static void
update_noise(OPLL * opll)1334 update_noise (OPLL * opll)
1335 {
1336    if(opll->noise_seed&1) opll->noise_seed ^= 0x8003020;
1337    opll->noise_seed >>= 1;
1338 }
1339 
1340 /* EG */
1341 static void
calc_envelope(OPLL_SLOT * slot,e_int32 lfo)1342 calc_envelope (OPLL_SLOT * slot, e_int32 lfo)
1343 {
1344 #define S2E(x) (SL2EG((e_int32)(x/SL_STEP))<<(EG_DP_BITS-EG_BITS))
1345 
1346   static e_uint32 SL[16] = {
1347     S2E (0.0), S2E (3.0), S2E (6.0), S2E (9.0), S2E (12.0), S2E (15.0), S2E (18.0), S2E (21.0),
1348     S2E (24.0), S2E (27.0), S2E (30.0), S2E (33.0), S2E (36.0), S2E (39.0), S2E (42.0), S2E (48.0)
1349   };
1350 
1351   e_uint32 egout;
1352 
1353   switch (slot->eg_mode)
1354   {
1355   case ATTACK:
1356     egout = AR_ADJUST_TABLE[HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS)];
1357     slot->eg_phase += slot->eg_dphase;
1358     if((EG_DP_WIDTH & slot->eg_phase)||(slot->patch->AR==15))
1359     {
1360       egout = 0;
1361       slot->eg_phase = 0;
1362       slot->eg_mode = DECAY;
1363       UPDATE_EG (slot);
1364     }
1365     break;
1366 
1367   case DECAY:
1368     egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1369     slot->eg_phase += slot->eg_dphase;
1370     if (slot->eg_phase >= SL[slot->patch->SL])
1371     {
1372       if (slot->patch->EG)
1373       {
1374         slot->eg_phase = SL[slot->patch->SL];
1375         slot->eg_mode = SUSHOLD;
1376         UPDATE_EG (slot);
1377       }
1378       else
1379       {
1380         slot->eg_phase = SL[slot->patch->SL];
1381         slot->eg_mode = SUSTINE;
1382         UPDATE_EG (slot);
1383       }
1384     }
1385     break;
1386 
1387   case SUSHOLD:
1388     egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1389     if (slot->patch->EG == 0)
1390     {
1391       slot->eg_mode = SUSTINE;
1392       UPDATE_EG (slot);
1393     }
1394     break;
1395 
1396   case SUSTINE:
1397   case RELEASE:
1398     egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1399     slot->eg_phase += slot->eg_dphase;
1400     if (egout >= (1 << EG_BITS))
1401     {
1402       slot->eg_mode = FINISH;
1403       egout = (1 << EG_BITS) - 1;
1404     }
1405     break;
1406 
1407   case SETTLE:
1408     egout = HIGHBITS (slot->eg_phase, EG_DP_BITS - EG_BITS);
1409     slot->eg_phase += slot->eg_dphase;
1410     if (egout >= (1 << EG_BITS))
1411     {
1412       slot->eg_mode = ATTACK;
1413       egout = (1 << EG_BITS) - 1;
1414       UPDATE_EG(slot);
1415     }
1416     break;
1417 
1418   case FINISH:
1419     egout = (1 << EG_BITS) - 1;
1420     break;
1421 
1422   default:
1423     egout = (1 << EG_BITS) - 1;
1424     break;
1425   }
1426 
1427   if (slot->patch->AM)
1428     egout = EG2DB (egout + slot->tll) + lfo;
1429   else
1430     egout = EG2DB (egout + slot->tll);
1431 
1432   if (egout >= DB_MUTE)
1433     egout = DB_MUTE - 1;
1434 
1435   slot->egout = egout | 3;
1436 }
1437 
1438 /* CARRIOR */
1439 INLINE static e_int32
calc_slot_car(OPLL_SLOT * slot,e_int32 fm)1440 calc_slot_car (OPLL_SLOT * slot, e_int32 fm)
1441 {
1442   if (slot->egout >= (DB_MUTE - 1))
1443   {
1444     slot->output[0] = 0;
1445   }
1446   else
1447   {
1448     slot->output[0] = DB2LIN_TABLE[slot->sintbl[(slot->pgout+wave2_8pi(fm))&(PG_WIDTH-1)] + slot->egout];
1449   }
1450 
1451   slot->output[1] = (slot->output[1] + slot->output[0]) >> 1;
1452   return slot->output[1];
1453 }
1454 
1455 /* MODULATOR */
1456 INLINE static e_int32
calc_slot_mod(OPLL_SLOT * slot)1457 calc_slot_mod (OPLL_SLOT * slot)
1458 {
1459   e_int32 fm;
1460 
1461   slot->output[1] = slot->output[0];
1462 
1463   if (slot->egout >= (DB_MUTE - 1))
1464   {
1465     slot->output[0] = 0;
1466   }
1467   else if (slot->patch->FB != 0)
1468   {
1469     fm = wave2_4pi (slot->feedback) >> (7 - slot->patch->FB);
1470     slot->output[0] = DB2LIN_TABLE[slot->sintbl[(slot->pgout+fm)&(PG_WIDTH-1)] + slot->egout];
1471   }
1472   else
1473   {
1474     slot->output[0] = DB2LIN_TABLE[slot->sintbl[slot->pgout] + slot->egout];
1475   }
1476 
1477   slot->feedback = (slot->output[1] + slot->output[0]) >> 1;
1478 
1479   return slot->feedback;
1480 
1481 }
1482 
1483 /* TOM */
1484 INLINE static e_int32
calc_slot_tom(OPLL_SLOT * slot)1485 calc_slot_tom (OPLL_SLOT * slot)
1486 {
1487   if (slot->egout >= (DB_MUTE - 1))
1488     return 0;
1489 
1490   return DB2LIN_TABLE[slot->sintbl[slot->pgout] + slot->egout];
1491 
1492 }
1493 
1494 /* SNARE */
1495 INLINE static e_int32
calc_slot_snare(OPLL_SLOT * slot,e_uint32 noise)1496 calc_slot_snare (OPLL_SLOT * slot, e_uint32 noise)
1497 {
1498   if(slot->egout>=(DB_MUTE-1))
1499     return 0;
1500 
1501   if(BIT(slot->pgout,7))
1502     return DB2LIN_TABLE[(noise?DB_POS(0.0):DB_POS(15.0))+slot->egout];
1503   else
1504     return DB2LIN_TABLE[(noise?DB_NEG(0.0):DB_NEG(15.0))+slot->egout];
1505 }
1506 
1507 /*
1508   TOP-CYM
1509  */
1510 INLINE static e_int32
calc_slot_cym(OPLL_SLOT * slot,e_uint32 pgout_hh)1511 calc_slot_cym (OPLL_SLOT * slot, e_uint32 pgout_hh)
1512 {
1513   e_uint32 dbout;
1514 
1515   if (slot->egout >= (DB_MUTE - 1))
1516     return 0;
1517   else if(
1518       /* the same as fmopl.c */
1519       ((BIT(pgout_hh,PG_BITS-8)^BIT(pgout_hh,PG_BITS-1))|BIT(pgout_hh,PG_BITS-7)) ^
1520       /* different from fmopl.c */
1521      (BIT(slot->pgout,PG_BITS-7)&!BIT(slot->pgout,PG_BITS-5))
1522     )
1523     dbout = DB_NEG(3.0);
1524   else
1525     dbout = DB_POS(3.0);
1526 
1527   return DB2LIN_TABLE[dbout + slot->egout];
1528 }
1529 
1530 /*
1531   HI-HAT
1532 */
1533 INLINE static e_int32
calc_slot_hat(OPLL_SLOT * slot,e_int32 pgout_cym,e_uint32 noise)1534 calc_slot_hat (OPLL_SLOT *slot, e_int32 pgout_cym, e_uint32 noise)
1535 {
1536   e_uint32 dbout;
1537 
1538   if (slot->egout >= (DB_MUTE - 1))
1539     return 0;
1540   else if(
1541       /* the same as fmopl.c */
1542       ((BIT(slot->pgout,PG_BITS-8)^BIT(slot->pgout,PG_BITS-1))|BIT(slot->pgout,PG_BITS-7)) ^
1543       /* different from fmopl.c */
1544       (BIT(pgout_cym,PG_BITS-7)&!BIT(pgout_cym,PG_BITS-5))
1545     )
1546   {
1547     if(noise)
1548       dbout = DB_NEG(12.0);
1549     else
1550       dbout = DB_NEG(24.0);
1551   }
1552   else
1553   {
1554     if(noise)
1555       dbout = DB_POS(12.0);
1556     else
1557       dbout = DB_POS(24.0);
1558   }
1559 
1560   return DB2LIN_TABLE[dbout + slot->egout];
1561 }
1562 
1563 INLINE static e_int16
calc(OPLL * opll)1564 calc (OPLL * opll)
1565 {
1566   e_int32 inst = 0, perc = 0, out = 0;
1567   e_int32 i;
1568 
1569   update_ampm (opll);
1570   update_noise (opll);
1571 
1572   for (i = 0; i < 18; i++)
1573   {
1574     calc_phase(&opll->slot[i],opll->lfo_pm);
1575     calc_envelope(&opll->slot[i],opll->lfo_am);
1576   }
1577 
1578   for (i = 0; i < 6; i++)
1579     if (!(opll->mask & OPLL_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH))
1580       inst += calc_slot_car (CAR(opll,i), calc_slot_mod(MOD(opll,i)));
1581 
1582   /* CH6 */
1583   if (opll->patch_number[6] <= 15)
1584   {
1585     if (!(opll->mask & OPLL_MASK_CH (6)) && (CAR(opll,6)->eg_mode != FINISH))
1586       inst += calc_slot_car (CAR(opll,6), calc_slot_mod(MOD(opll,6)));
1587   }
1588   else
1589   {
1590     if (!(opll->mask & OPLL_MASK_BD) && (CAR(opll,6)->eg_mode != FINISH))
1591       perc += calc_slot_car (CAR(opll,6), calc_slot_mod(MOD(opll,6)));
1592   }
1593 
1594   /* CH7 */
1595   if (opll->patch_number[7] <= 15)
1596   {
1597     if (!(opll->mask & OPLL_MASK_CH (7)) && (CAR(opll,7)->eg_mode != FINISH))
1598       inst += calc_slot_car (CAR(opll,7), calc_slot_mod(MOD(opll,7)));
1599   }
1600   else
1601   {
1602     if (!(opll->mask & OPLL_MASK_HH) && (MOD(opll,7)->eg_mode != FINISH))
1603       perc += calc_slot_hat (MOD(opll,7), CAR(opll,8)->pgout, opll->noise_seed&1);
1604     if (!(opll->mask & OPLL_MASK_SD) && (CAR(opll,7)->eg_mode != FINISH))
1605       perc -= calc_slot_snare (CAR(opll,7), opll->noise_seed&1);
1606   }
1607 
1608   /* CH8 */
1609   if (opll->patch_number[8] <= 15)
1610   {
1611     if (!(opll->mask & OPLL_MASK_CH(8)) && (CAR(opll,8)->eg_mode != FINISH))
1612       inst += calc_slot_car (CAR(opll,8), calc_slot_mod (MOD(opll,8)));
1613   }
1614   else
1615   {
1616     if (!(opll->mask & OPLL_MASK_TOM) && (MOD(opll,8)->eg_mode != FINISH))
1617       perc += calc_slot_tom (MOD(opll,8));
1618     if (!(opll->mask & OPLL_MASK_CYM) && (CAR(opll,8)->eg_mode != FINISH))
1619       perc -= calc_slot_cym (CAR(opll,8), MOD(opll,7)->pgout);
1620   }
1621 
1622   out = inst + (perc << 1);
1623   return (e_int16) out << 3;
1624 }
1625 
1626 #ifdef EMU2413_COMPACTION
1627 e_int16
OPLL_calc(OPLL * opll)1628 OPLL_calc (OPLL * opll)
1629 {
1630   return calc (opll);
1631 }
1632 #else
1633 e_int16
OPLL_calc(OPLL * opll)1634 OPLL_calc (OPLL * opll)
1635 {
1636   if (!opll->quality)
1637     return calc (opll);
1638 
1639   while (opll->realstep > opll->oplltime)
1640   {
1641     opll->oplltime += opll->opllstep;
1642     opll->prev = opll->next;
1643     opll->next = calc (opll);
1644   }
1645 
1646   opll->oplltime -= opll->realstep;
1647   opll->out = (e_int16) (((double) opll->next * (opll->opllstep - opll->oplltime)
1648                           + (double) opll->prev * opll->oplltime) / opll->opllstep);
1649 
1650   return (e_int16) opll->out;
1651 }
1652 #endif
1653 
1654 e_uint32
OPLL_setMask(OPLL * opll,e_uint32 mask)1655 OPLL_setMask (OPLL * opll, e_uint32 mask)
1656 {
1657   e_uint32 ret;
1658 
1659   if (opll)
1660   {
1661     ret = opll->mask;
1662     opll->mask = mask;
1663     return ret;
1664   }
1665   else
1666     return 0;
1667 }
1668 
1669 e_uint32
OPLL_toggleMask(OPLL * opll,e_uint32 mask)1670 OPLL_toggleMask (OPLL * opll, e_uint32 mask)
1671 {
1672   e_uint32 ret;
1673 
1674   if (opll)
1675   {
1676     ret = opll->mask;
1677     opll->mask ^= mask;
1678     return ret;
1679   }
1680   else
1681     return 0;
1682 }
1683 
1684 /****************************************************
1685 
1686                        I/O Ctrl
1687 
1688 *****************************************************/
1689 
1690 void
OPLL_writeReg(OPLL * opll,e_uint32 reg,e_uint32 data)1691 OPLL_writeReg (OPLL * opll, e_uint32 reg, e_uint32 data)
1692 {
1693   e_int32 i, v, ch;
1694 
1695   data = data & 0xff;
1696   reg = reg & 0x3f;
1697   opll->reg[reg] = (e_uint8) data;
1698 
1699   switch (reg)
1700   {
1701   case 0x00:
1702     opll->patch[0].AM = (data >> 7) & 1;
1703     opll->patch[0].PM = (data >> 6) & 1;
1704     opll->patch[0].EG = (data >> 5) & 1;
1705     opll->patch[0].KR = (data >> 4) & 1;
1706     opll->patch[0].ML = (data) & 15;
1707     for (i = 0; i < 9; i++)
1708     {
1709       if (opll->patch_number[i] == 0)
1710       {
1711         UPDATE_PG (MOD(opll,i));
1712         UPDATE_RKS (MOD(opll,i));
1713         UPDATE_EG (MOD(opll,i));
1714       }
1715     }
1716     break;
1717 
1718   case 0x01:
1719     opll->patch[1].AM = (data >> 7) & 1;
1720     opll->patch[1].PM = (data >> 6) & 1;
1721     opll->patch[1].EG = (data >> 5) & 1;
1722     opll->patch[1].KR = (data >> 4) & 1;
1723     opll->patch[1].ML = (data) & 15;
1724     for (i = 0; i < 9; i++)
1725     {
1726       if (opll->patch_number[i] == 0)
1727       {
1728         UPDATE_PG (CAR(opll,i));
1729         UPDATE_RKS (CAR(opll,i));
1730         UPDATE_EG (CAR(opll,i));
1731       }
1732     }
1733     break;
1734 
1735   case 0x02:
1736     opll->patch[0].KL = (data >> 6) & 3;
1737     opll->patch[0].TL = (data) & 63;
1738     for (i = 0; i < 9; i++)
1739     {
1740       if (opll->patch_number[i] == 0)
1741       {
1742         UPDATE_TLL(MOD(opll,i));
1743       }
1744     }
1745     break;
1746 
1747   case 0x03:
1748     opll->patch[1].KL = (data >> 6) & 3;
1749     opll->patch[1].WF = (data >> 4) & 1;
1750     opll->patch[0].WF = (data >> 3) & 1;
1751     opll->patch[0].FB = (data) & 7;
1752     for (i = 0; i < 9; i++)
1753     {
1754       if (opll->patch_number[i] == 0)
1755       {
1756         UPDATE_WF(MOD(opll,i));
1757         UPDATE_WF(CAR(opll,i));
1758       }
1759     }
1760     break;
1761 
1762   case 0x04:
1763     opll->patch[0].AR = (data >> 4) & 15;
1764     opll->patch[0].DR = (data) & 15;
1765     for (i = 0; i < 9; i++)
1766     {
1767       if (opll->patch_number[i] == 0)
1768       {
1769         UPDATE_EG (MOD(opll,i));
1770       }
1771     }
1772     break;
1773 
1774   case 0x05:
1775     opll->patch[1].AR = (data >> 4) & 15;
1776     opll->patch[1].DR = (data) & 15;
1777     for (i = 0; i < 9; i++)
1778     {
1779       if (opll->patch_number[i] == 0)
1780       {
1781         UPDATE_EG(CAR(opll,i));
1782       }
1783     }
1784     break;
1785 
1786   case 0x06:
1787     opll->patch[0].SL = (data >> 4) & 15;
1788     opll->patch[0].RR = (data) & 15;
1789     for (i = 0; i < 9; i++)
1790     {
1791       if (opll->patch_number[i] == 0)
1792       {
1793         UPDATE_EG (MOD(opll,i));
1794       }
1795     }
1796     break;
1797 
1798   case 0x07:
1799     opll->patch[1].SL = (data >> 4) & 15;
1800     opll->patch[1].RR = (data) & 15;
1801     for (i = 0; i < 9; i++)
1802     {
1803       if (opll->patch_number[i] == 0)
1804       {
1805         UPDATE_EG (CAR(opll,i));
1806       }
1807     }
1808     break;
1809 
1810   case 0x0e:
1811     update_rhythm_mode (opll);
1812     if (data & 32)
1813     {
1814       if (data & 0x10)
1815         keyOn_BD (opll);
1816       else
1817         keyOff_BD (opll);
1818       if (data & 0x8)
1819         keyOn_SD (opll);
1820       else
1821         keyOff_SD (opll);
1822       if (data & 0x4)
1823         keyOn_TOM (opll);
1824       else
1825         keyOff_TOM (opll);
1826       if (data & 0x2)
1827         keyOn_CYM (opll);
1828       else
1829         keyOff_CYM (opll);
1830       if (data & 0x1)
1831         keyOn_HH (opll);
1832       else
1833         keyOff_HH (opll);
1834     }
1835     update_key_status (opll);
1836 
1837     UPDATE_ALL (MOD(opll,6));
1838     UPDATE_ALL (CAR(opll,6));
1839     UPDATE_ALL (MOD(opll,7));
1840     UPDATE_ALL (CAR(opll,7));
1841     UPDATE_ALL (MOD(opll,8));
1842     UPDATE_ALL (CAR(opll,8));
1843 
1844     break;
1845 
1846   case 0x0f:
1847     break;
1848 
1849   case 0x10:
1850   case 0x11:
1851   case 0x12:
1852   case 0x13:
1853   case 0x14:
1854   case 0x15:
1855   case 0x16:
1856   case 0x17:
1857   case 0x18:
1858     ch = reg - 0x10;
1859     setFnumber (opll, ch, data + ((opll->reg[0x20 + ch] & 1) << 8));
1860     UPDATE_ALL (MOD(opll,ch));
1861     UPDATE_ALL (CAR(opll,ch));
1862     break;
1863 
1864   case 0x20:
1865   case 0x21:
1866   case 0x22:
1867   case 0x23:
1868   case 0x24:
1869   case 0x25:
1870   case 0x26:
1871   case 0x27:
1872   case 0x28:
1873     ch = reg - 0x20;
1874     setFnumber (opll, ch, ((data & 1) << 8) + opll->reg[0x10 + ch]);
1875     setBlock (opll, ch, (data >> 1) & 7);
1876     setSustine (opll, ch, (data >> 5) & 1);
1877     if (data & 0x10)
1878       keyOn (opll, ch);
1879     else
1880       keyOff (opll, ch);
1881     UPDATE_ALL (MOD(opll,ch));
1882     UPDATE_ALL (CAR(opll,ch));
1883     update_key_status (opll);
1884     update_rhythm_mode (opll);
1885     break;
1886 
1887   case 0x30:
1888   case 0x31:
1889   case 0x32:
1890   case 0x33:
1891   case 0x34:
1892   case 0x35:
1893   case 0x36:
1894   case 0x37:
1895   case 0x38:
1896     i = (data >> 4) & 15;
1897     v = data & 15;
1898     if ((opll->reg[0x0e] & 32) && (reg >= 0x36))
1899     {
1900       switch (reg)
1901       {
1902       case 0x37:
1903         setSlotVolume (MOD(opll,7), i << 2);
1904         break;
1905       case 0x38:
1906         setSlotVolume (MOD(opll,8), i << 2);
1907         break;
1908       default:
1909         break;
1910       }
1911     }
1912     else
1913     {
1914       setPatch (opll, reg - 0x30, i);
1915     }
1916     setVolume (opll, reg - 0x30, v << 2);
1917     UPDATE_ALL (MOD(opll,reg - 0x30));
1918     UPDATE_ALL (CAR(opll,reg - 0x30));
1919     break;
1920 
1921   default:
1922     break;
1923 
1924   }
1925 }
1926 
1927 void
OPLL_writeIO(OPLL * opll,e_uint32 adr,e_uint32 val)1928 OPLL_writeIO (OPLL * opll, e_uint32 adr, e_uint32 val)
1929 {
1930   if (adr & 1)
1931     OPLL_writeReg (opll, opll->adr, val);
1932   else
1933     opll->adr = val;
1934 }
1935 
1936 #ifndef EMU2413_COMPACTION
1937 /* STEREO MODE (OPT) */
1938 void
OPLL_set_pan(OPLL * opll,e_uint32 ch,e_uint32 pan)1939 OPLL_set_pan (OPLL * opll, e_uint32 ch, e_uint32 pan)
1940 {
1941   opll->pan[ch & 15] = pan & 255; /* Maxim: pan is 0..255 */
1942 }
1943 
1944 static void
calc_stereo(OPLL * opll,e_int32 out[2])1945 calc_stereo (OPLL * opll, e_int32 out[2])
1946 {
1947   /* Maxim: changed panning to be 0..255, 127 is centre */
1948   e_int32 l=0,r=0;
1949 //  e_int32 b[4] = { 0, 0, 0, 0 };        /* Ignore, Right, Left, Center */
1950 //  e_int32 r[4] = { 0, 0, 0, 0 };        /* Ignore, Right, Left, Center */
1951   e_int32 i;
1952   e_int32 channel;
1953 
1954   update_ampm (opll);
1955   update_noise (opll);
1956 
1957   for(i=0;i<18;i++)
1958   {
1959     calc_phase(&opll->slot[i],opll->lfo_pm);
1960     calc_envelope(&opll->slot[i],opll->lfo_am);
1961   }
1962 
1963   for (i = 0; i < 6; i++)
1964     if (!(opll->mask & OPLL_MASK_CH (i)) && (CAR(opll,i)->eg_mode != FINISH))
1965     {
1966       channel = calc_slot_car (CAR(opll,i), calc_slot_mod (MOD(opll,i)));
1967       if ( opll->pan[i] == 127 )
1968       {
1969         l += channel;
1970         r += channel;
1971       }
1972       else
1973       {
1974         l += channel * (255-opll->pan[i]) / 127; // 0 -> 2, 127 -> 1, 255 -> 0 (nearly)
1975         r += channel * (    opll->pan[i]) / 127; // 255 -> 2, 127 -> 1, 0 -> 0 (nearly)
1976       }
1977     }
1978 
1979 
1980   if (opll->patch_number[6] <= 15)
1981   {
1982     if (!(opll->mask & OPLL_MASK_CH (6)) && (CAR(opll,6)->eg_mode != FINISH))
1983     {
1984       channel = calc_slot_car (CAR(opll,6), calc_slot_mod (MOD(opll,6)));
1985       if ( opll->pan[6] == 127 )
1986       {
1987         l += channel;
1988         r += channel;
1989       }
1990       else
1991       {
1992         l += channel * (255-opll->pan[6]) / 127; // 0 -> 2, 127 -> 1, 255 -> 0 (nearly)
1993         r += channel * (    opll->pan[6]) / 127; // 255 -> 2, 127 -> 1, 0 -> 0 (nearly)
1994       }
1995 
1996     }
1997   }
1998   else
1999   {
2000     if (!(opll->mask & OPLL_MASK_BD) && (CAR(opll,6)->eg_mode != FINISH))
2001     {
2002       channel = calc_slot_car (CAR(opll,6), calc_slot_mod (MOD(opll,6)));
2003       if ( opll->pan[9] == 127 )
2004       {
2005         l += channel;
2006         r += channel;
2007       }
2008       else
2009       {
2010         l += channel * (255-opll->pan[9]) / 127; // 0 -> 2, 127 -> 1, 255 -> 0 (nearly)
2011         r += channel * (    opll->pan[9]) / 127; // 255 -> 2, 127 -> 1, 0 -> 0 (nearly)
2012       }
2013     }
2014   }
2015 
2016   if (opll->patch_number[7] <= 15)
2017   {
2018     if (!(opll->mask & OPLL_MASK_CH (7)) && (CAR (opll,7)->eg_mode != FINISH))
2019     {
2020       channel = calc_slot_car (CAR (opll,7), calc_slot_mod (MOD (opll,7)));
2021       if ( opll->pan[7] == 127 )
2022       {
2023         l += channel;
2024         r += channel;
2025       }
2026       else
2027       {
2028         l += channel * (255-opll->pan[7]) / 127; // 0 -> 2, 127 -> 1, 255 -> 0 (nearly)
2029         r += channel * (    opll->pan[7]) / 127; // 255 -> 2, 127 -> 1, 0 -> 0 (nearly)
2030       }
2031     }
2032   }
2033   else
2034   {
2035     if (!(opll->mask & OPLL_MASK_HH) && (MOD (opll,7)->eg_mode != FINISH))
2036     {
2037       channel = calc_slot_hat (MOD (opll,7), CAR(opll,8)->pgout, opll->noise_seed&1);
2038       if ( opll->pan[10] == 127 )
2039       {
2040         l += channel;
2041         r += channel;
2042       }
2043       else
2044       {
2045         l += channel * (255-opll->pan[10]) / 127; // 0 -> 2, 127 -> 1, 255 -> 0 (nearly)
2046         r += channel * (    opll->pan[10]) / 127; // 255 -> 2, 127 -> 1, 0 -> 0 (nearly)
2047       }
2048     }
2049     if (!(opll->mask & OPLL_MASK_SD) && (CAR (opll,7)->eg_mode != FINISH))
2050     {
2051       channel = -calc_slot_snare (CAR (opll,7), opll->noise_seed&1); // this one is negated
2052       if ( opll->pan[11] == 127 )
2053       {
2054         l += channel;
2055         r += channel;
2056       }
2057       else
2058       {
2059         l += channel * (255-opll->pan[11]) / 127; // 0 -> 2, 127 -> 1, 255 -> 0 (nearly)
2060         r += channel * (    opll->pan[11]) / 127; // 255 -> 2, 127 -> 1, 0 -> 0 (nearly)
2061       }
2062     }
2063   }
2064 
2065   if (opll->patch_number[8] <= 15)
2066   {
2067     if (!(opll->mask & OPLL_MASK_CH (8)) && (CAR (opll,8)->eg_mode != FINISH))
2068     {
2069       channel = calc_slot_car (CAR (opll,8), calc_slot_mod (MOD (opll,8)));
2070       if ( opll->pan[8] == 127 )
2071       {
2072         l += channel;
2073         r += channel;
2074       }
2075       else
2076       {
2077         l += channel * (255-opll->pan[8]) / 127; // 0 -> 2, 127 -> 1, 255 -> 0 (nearly)
2078         r += channel * (    opll->pan[8]) / 127; // 255 -> 2, 127 -> 1, 0 -> 0 (nearly)
2079       }
2080     }
2081   }
2082   else
2083   {
2084     if (!(opll->mask & OPLL_MASK_TOM) && (MOD (opll,8)->eg_mode != FINISH))
2085     {
2086       channel = calc_slot_tom (MOD (opll,8));
2087       if ( opll->pan[12] == 127 )
2088       {
2089         l += channel;
2090         r += channel;
2091       }
2092       else
2093       {
2094         l += channel * (255-opll->pan[12]) / 127; // 0 -> 2, 127 -> 1, 255 -> 0 (nearly)
2095         r += channel * (    opll->pan[12]) / 127; // 255 -> 2, 127 -> 1, 0 -> 0 (nearly)
2096       }
2097     }
2098     if (!(opll->mask & OPLL_MASK_CYM) && (CAR (opll,8)->eg_mode != FINISH))
2099     {
2100       channel = -calc_slot_cym (CAR (opll,8), MOD(opll,7)->pgout); // negated
2101       if ( opll->pan[13] == 127 )
2102       {
2103         l += channel;
2104         r += channel;
2105       }
2106       else
2107       {
2108         l += channel * (255-opll->pan[13]) / 127; // 0 -> 2, 127 -> 1, 255 -> 0 (nearly)
2109         r += channel * (    opll->pan[13]) / 127; // 255 -> 2, 127 -> 1, 0 -> 0 (nearly)
2110       }
2111     }
2112   }
2113 /*
2114   out[1] = (b[1] + b[3] + ((r[1] + r[3]) << 1)) <<3;
2115   out[0] = (b[2] + b[3] + ((r[2] + r[3]) << 1)) <<3;
2116   */
2117   out[0] = l << 3;
2118   out[1] = r << 3;
2119 }
2120 
2121 void
OPLL_calc_stereo(OPLL * opll,e_int32 out[2])2122 OPLL_calc_stereo (OPLL * opll, e_int32 out[2])
2123 {
2124   if (!opll->quality)
2125   {
2126     calc_stereo (opll, out);
2127     return;
2128   }
2129 
2130   while (opll->realstep > opll->oplltime)
2131   {
2132     opll->oplltime += opll->opllstep;
2133     opll->sprev[0] = opll->snext[0];
2134     opll->sprev[1] = opll->snext[1];
2135     calc_stereo (opll, opll->snext);
2136   }
2137 
2138   opll->oplltime -= opll->realstep;
2139   out[0] = (e_int16) (((double) opll->snext[0] * (opll->opllstep - opll->oplltime)
2140                        + (double) opll->sprev[0] * opll->oplltime) / opll->opllstep);
2141   out[1] = (e_int16) (((double) opll->snext[1] * (opll->opllstep - opll->oplltime)
2142                        + (double) opll->sprev[1] * opll->oplltime) / opll->opllstep);
2143 }
2144 #endif /* EMU2413_COMPACTION */
2145 
2146 // Ym2413_Emu
2147 #include "Ym2413_Emu.h"
2148 
2149 #include <assert.h>
2150 
2151 static int use_count = 0;
2152 
~Ym2413_Emu()2153 Ym2413_Emu::~Ym2413_Emu()
2154 {
2155 	if ( opll )
2156 	{
2157 		use_count--;
2158 		OPLL_delete( opll );
2159 	}
2160 }
2161 
Ym2413_Emu()2162 Ym2413_Emu::Ym2413_Emu()
2163 {
2164 	opll = 0;
2165 }
2166 
set_rate(double sample_rate,double clock_rate)2167 int Ym2413_Emu::set_rate( double sample_rate, double clock_rate )
2168 {
2169 	if ( opll )
2170 	{
2171 		OPLL_delete( opll );
2172 		opll = 0;
2173 		use_count--;
2174 	}
2175 
2176 	// Only one YM2413 may be used at a time (emu2413 uses lots of global data)
2177 	assert( use_count == 0 );
2178 	use_count++;
2179 
2180 	opll = OPLL_new ((int) clock_rate, (int) sample_rate);
2181 	if ( !opll )
2182 		return 1;
2183 
2184 	reset();
2185 	return 0;
2186 }
2187 
reset()2188 void Ym2413_Emu::reset()
2189 {
2190 	OPLL_reset( opll );
2191 	OPLL_reset_patch( opll, 0 );
2192 	OPLL_setMask( opll, 0 );
2193 	OPLL_set_quality( opll, 0 );
2194 }
2195 
write(int addr,int data)2196 void Ym2413_Emu::write( int addr, int data )
2197 {
2198 	OPLL_writeReg( opll, addr, data );
2199 }
2200 
mute_voices(int mask)2201 void Ym2413_Emu::mute_voices( int mask )
2202 {
2203 	OPLL_setMask( opll, mask );
2204 }
2205 
run(int pair_count,sample_t * out)2206 void Ym2413_Emu::run( int pair_count, sample_t* out )
2207 {
2208 	while ( pair_count-- )
2209 	{
2210 		int s = OPLL_calc( opll );
2211 		out [0] = s;
2212 		out [1] = s;
2213 		out += 2;
2214 	}
2215 }
2216 
2217